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Merge branch 'for-2.6.35' into for-2.6.36
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-kirkwood / common.c
1 /*
2 * arch/arm/mach-kirkwood/common.c
3 *
4 * Core functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
21 #include <net/dsa.h>
22 #include <asm/page.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/audio.h>
29 #include <plat/cache-feroceon-l2.h>
30 #include <plat/ehci-orion.h>
31 #include <plat/mvsdio.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/orion_wdt.h>
35 #include <plat/time.h>
36 #include "common.h"
37
38 /*****************************************************************************
39 * I/O Address Mapping
40 ****************************************************************************/
41 static struct map_desc kirkwood_io_desc[] __initdata = {
42 {
43 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
44 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
45 .length = KIRKWOOD_PCIE_IO_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = KIRKWOOD_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
50 .length = KIRKWOOD_REGS_SIZE,
51 .type = MT_DEVICE,
52 },
53 };
54
55 void __init kirkwood_map_io(void)
56 {
57 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
58 }
59
60 /*
61 * Default clock control bits. Any bit _not_ set in this variable
62 * will be cleared from the hardware after platform devices have been
63 * registered. Some reserved bits must be set to 1.
64 */
65 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
66
67
68 /*****************************************************************************
69 * EHCI
70 ****************************************************************************/
71 static struct orion_ehci_data kirkwood_ehci_data = {
72 .dram = &kirkwood_mbus_dram_info,
73 .phy_version = EHCI_PHY_NA,
74 };
75
76 static u64 ehci_dmamask = 0xffffffffUL;
77
78
79 /*****************************************************************************
80 * EHCI0
81 ****************************************************************************/
82 static struct resource kirkwood_ehci_resources[] = {
83 {
84 .start = USB_PHYS_BASE,
85 .end = USB_PHYS_BASE + 0x0fff,
86 .flags = IORESOURCE_MEM,
87 }, {
88 .start = IRQ_KIRKWOOD_USB,
89 .end = IRQ_KIRKWOOD_USB,
90 .flags = IORESOURCE_IRQ,
91 },
92 };
93
94 static struct platform_device kirkwood_ehci = {
95 .name = "orion-ehci",
96 .id = 0,
97 .dev = {
98 .dma_mask = &ehci_dmamask,
99 .coherent_dma_mask = 0xffffffff,
100 .platform_data = &kirkwood_ehci_data,
101 },
102 .resource = kirkwood_ehci_resources,
103 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
104 };
105
106 void __init kirkwood_ehci_init(void)
107 {
108 kirkwood_clk_ctrl |= CGC_USB0;
109 platform_device_register(&kirkwood_ehci);
110 }
111
112
113 /*****************************************************************************
114 * GE00
115 ****************************************************************************/
116 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
117 .dram = &kirkwood_mbus_dram_info,
118 };
119
120 static struct resource kirkwood_ge00_shared_resources[] = {
121 {
122 .name = "ge00 base",
123 .start = GE00_PHYS_BASE + 0x2000,
124 .end = GE00_PHYS_BASE + 0x3fff,
125 .flags = IORESOURCE_MEM,
126 }, {
127 .name = "ge00 err irq",
128 .start = IRQ_KIRKWOOD_GE00_ERR,
129 .end = IRQ_KIRKWOOD_GE00_ERR,
130 .flags = IORESOURCE_IRQ,
131 },
132 };
133
134 static struct platform_device kirkwood_ge00_shared = {
135 .name = MV643XX_ETH_SHARED_NAME,
136 .id = 0,
137 .dev = {
138 .platform_data = &kirkwood_ge00_shared_data,
139 },
140 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
141 .resource = kirkwood_ge00_shared_resources,
142 };
143
144 static struct resource kirkwood_ge00_resources[] = {
145 {
146 .name = "ge00 irq",
147 .start = IRQ_KIRKWOOD_GE00_SUM,
148 .end = IRQ_KIRKWOOD_GE00_SUM,
149 .flags = IORESOURCE_IRQ,
150 },
151 };
152
153 static struct platform_device kirkwood_ge00 = {
154 .name = MV643XX_ETH_NAME,
155 .id = 0,
156 .num_resources = 1,
157 .resource = kirkwood_ge00_resources,
158 .dev = {
159 .coherent_dma_mask = 0xffffffff,
160 },
161 };
162
163 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
164 {
165 kirkwood_clk_ctrl |= CGC_GE0;
166 eth_data->shared = &kirkwood_ge00_shared;
167 kirkwood_ge00.dev.platform_data = eth_data;
168
169 platform_device_register(&kirkwood_ge00_shared);
170 platform_device_register(&kirkwood_ge00);
171 }
172
173
174 /*****************************************************************************
175 * GE01
176 ****************************************************************************/
177 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
178 .dram = &kirkwood_mbus_dram_info,
179 .shared_smi = &kirkwood_ge00_shared,
180 };
181
182 static struct resource kirkwood_ge01_shared_resources[] = {
183 {
184 .name = "ge01 base",
185 .start = GE01_PHYS_BASE + 0x2000,
186 .end = GE01_PHYS_BASE + 0x3fff,
187 .flags = IORESOURCE_MEM,
188 }, {
189 .name = "ge01 err irq",
190 .start = IRQ_KIRKWOOD_GE01_ERR,
191 .end = IRQ_KIRKWOOD_GE01_ERR,
192 .flags = IORESOURCE_IRQ,
193 },
194 };
195
196 static struct platform_device kirkwood_ge01_shared = {
197 .name = MV643XX_ETH_SHARED_NAME,
198 .id = 1,
199 .dev = {
200 .platform_data = &kirkwood_ge01_shared_data,
201 },
202 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
203 .resource = kirkwood_ge01_shared_resources,
204 };
205
206 static struct resource kirkwood_ge01_resources[] = {
207 {
208 .name = "ge01 irq",
209 .start = IRQ_KIRKWOOD_GE01_SUM,
210 .end = IRQ_KIRKWOOD_GE01_SUM,
211 .flags = IORESOURCE_IRQ,
212 },
213 };
214
215 static struct platform_device kirkwood_ge01 = {
216 .name = MV643XX_ETH_NAME,
217 .id = 1,
218 .num_resources = 1,
219 .resource = kirkwood_ge01_resources,
220 .dev = {
221 .coherent_dma_mask = 0xffffffff,
222 },
223 };
224
225 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
226 {
227 kirkwood_clk_ctrl |= CGC_GE1;
228 eth_data->shared = &kirkwood_ge01_shared;
229 kirkwood_ge01.dev.platform_data = eth_data;
230
231 platform_device_register(&kirkwood_ge01_shared);
232 platform_device_register(&kirkwood_ge01);
233 }
234
235
236 /*****************************************************************************
237 * Ethernet switch
238 ****************************************************************************/
239 static struct resource kirkwood_switch_resources[] = {
240 {
241 .start = 0,
242 .end = 0,
243 .flags = IORESOURCE_IRQ,
244 },
245 };
246
247 static struct platform_device kirkwood_switch_device = {
248 .name = "dsa",
249 .id = 0,
250 .num_resources = 0,
251 .resource = kirkwood_switch_resources,
252 };
253
254 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
255 {
256 int i;
257
258 if (irq != NO_IRQ) {
259 kirkwood_switch_resources[0].start = irq;
260 kirkwood_switch_resources[0].end = irq;
261 kirkwood_switch_device.num_resources = 1;
262 }
263
264 d->netdev = &kirkwood_ge00.dev;
265 for (i = 0; i < d->nr_chips; i++)
266 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
267 kirkwood_switch_device.dev.platform_data = d;
268
269 platform_device_register(&kirkwood_switch_device);
270 }
271
272
273 /*****************************************************************************
274 * NAND flash
275 ****************************************************************************/
276 static struct resource kirkwood_nand_resource = {
277 .flags = IORESOURCE_MEM,
278 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
279 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
280 KIRKWOOD_NAND_MEM_SIZE - 1,
281 };
282
283 static struct orion_nand_data kirkwood_nand_data = {
284 .cle = 0,
285 .ale = 1,
286 .width = 8,
287 };
288
289 static struct platform_device kirkwood_nand_flash = {
290 .name = "orion_nand",
291 .id = -1,
292 .dev = {
293 .platform_data = &kirkwood_nand_data,
294 },
295 .resource = &kirkwood_nand_resource,
296 .num_resources = 1,
297 };
298
299 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
300 int chip_delay)
301 {
302 kirkwood_clk_ctrl |= CGC_RUNIT;
303 kirkwood_nand_data.parts = parts;
304 kirkwood_nand_data.nr_parts = nr_parts;
305 kirkwood_nand_data.chip_delay = chip_delay;
306 platform_device_register(&kirkwood_nand_flash);
307 }
308
309 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
310 int (*dev_ready)(struct mtd_info *))
311 {
312 kirkwood_clk_ctrl |= CGC_RUNIT;
313 kirkwood_nand_data.parts = parts;
314 kirkwood_nand_data.nr_parts = nr_parts;
315 kirkwood_nand_data.dev_ready = dev_ready;
316 platform_device_register(&kirkwood_nand_flash);
317 }
318
319 /*****************************************************************************
320 * SoC RTC
321 ****************************************************************************/
322 static struct resource kirkwood_rtc_resource = {
323 .start = RTC_PHYS_BASE,
324 .end = RTC_PHYS_BASE + SZ_16 - 1,
325 .flags = IORESOURCE_MEM,
326 };
327
328 static void __init kirkwood_rtc_init(void)
329 {
330 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
331 }
332
333
334 /*****************************************************************************
335 * SATA
336 ****************************************************************************/
337 static struct resource kirkwood_sata_resources[] = {
338 {
339 .name = "sata base",
340 .start = SATA_PHYS_BASE,
341 .end = SATA_PHYS_BASE + 0x5000 - 1,
342 .flags = IORESOURCE_MEM,
343 }, {
344 .name = "sata irq",
345 .start = IRQ_KIRKWOOD_SATA,
346 .end = IRQ_KIRKWOOD_SATA,
347 .flags = IORESOURCE_IRQ,
348 },
349 };
350
351 static struct platform_device kirkwood_sata = {
352 .name = "sata_mv",
353 .id = 0,
354 .dev = {
355 .coherent_dma_mask = 0xffffffff,
356 },
357 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
358 .resource = kirkwood_sata_resources,
359 };
360
361 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
362 {
363 kirkwood_clk_ctrl |= CGC_SATA0;
364 if (sata_data->n_ports > 1)
365 kirkwood_clk_ctrl |= CGC_SATA1;
366 sata_data->dram = &kirkwood_mbus_dram_info;
367 kirkwood_sata.dev.platform_data = sata_data;
368 platform_device_register(&kirkwood_sata);
369 }
370
371
372 /*****************************************************************************
373 * SD/SDIO/MMC
374 ****************************************************************************/
375 static struct resource mvsdio_resources[] = {
376 [0] = {
377 .start = SDIO_PHYS_BASE,
378 .end = SDIO_PHYS_BASE + SZ_1K - 1,
379 .flags = IORESOURCE_MEM,
380 },
381 [1] = {
382 .start = IRQ_KIRKWOOD_SDIO,
383 .end = IRQ_KIRKWOOD_SDIO,
384 .flags = IORESOURCE_IRQ,
385 },
386 };
387
388 static u64 mvsdio_dmamask = 0xffffffffUL;
389
390 static struct platform_device kirkwood_sdio = {
391 .name = "mvsdio",
392 .id = -1,
393 .dev = {
394 .dma_mask = &mvsdio_dmamask,
395 .coherent_dma_mask = 0xffffffff,
396 },
397 .num_resources = ARRAY_SIZE(mvsdio_resources),
398 .resource = mvsdio_resources,
399 };
400
401 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
402 {
403 u32 dev, rev;
404
405 kirkwood_pcie_id(&dev, &rev);
406 if (rev == 0) /* catch all Kirkwood Z0's */
407 mvsdio_data->clock = 100000000;
408 else
409 mvsdio_data->clock = 200000000;
410 mvsdio_data->dram = &kirkwood_mbus_dram_info;
411 kirkwood_clk_ctrl |= CGC_SDIO;
412 kirkwood_sdio.dev.platform_data = mvsdio_data;
413 platform_device_register(&kirkwood_sdio);
414 }
415
416
417 /*****************************************************************************
418 * SPI
419 ****************************************************************************/
420 static struct orion_spi_info kirkwood_spi_plat_data = {
421 };
422
423 static struct resource kirkwood_spi_resources[] = {
424 {
425 .start = SPI_PHYS_BASE,
426 .end = SPI_PHYS_BASE + SZ_512 - 1,
427 .flags = IORESOURCE_MEM,
428 },
429 };
430
431 static struct platform_device kirkwood_spi = {
432 .name = "orion_spi",
433 .id = 0,
434 .resource = kirkwood_spi_resources,
435 .dev = {
436 .platform_data = &kirkwood_spi_plat_data,
437 },
438 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
439 };
440
441 void __init kirkwood_spi_init()
442 {
443 kirkwood_clk_ctrl |= CGC_RUNIT;
444 platform_device_register(&kirkwood_spi);
445 }
446
447
448 /*****************************************************************************
449 * I2C
450 ****************************************************************************/
451 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
452 .freq_m = 8, /* assumes 166 MHz TCLK */
453 .freq_n = 3,
454 .timeout = 1000, /* Default timeout of 1 second */
455 };
456
457 static struct resource kirkwood_i2c_resources[] = {
458 {
459 .start = I2C_PHYS_BASE,
460 .end = I2C_PHYS_BASE + 0x1f,
461 .flags = IORESOURCE_MEM,
462 }, {
463 .start = IRQ_KIRKWOOD_TWSI,
464 .end = IRQ_KIRKWOOD_TWSI,
465 .flags = IORESOURCE_IRQ,
466 },
467 };
468
469 static struct platform_device kirkwood_i2c = {
470 .name = MV64XXX_I2C_CTLR_NAME,
471 .id = 0,
472 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
473 .resource = kirkwood_i2c_resources,
474 .dev = {
475 .platform_data = &kirkwood_i2c_pdata,
476 },
477 };
478
479 void __init kirkwood_i2c_init(void)
480 {
481 platform_device_register(&kirkwood_i2c);
482 }
483
484
485 /*****************************************************************************
486 * UART0
487 ****************************************************************************/
488 static struct plat_serial8250_port kirkwood_uart0_data[] = {
489 {
490 .mapbase = UART0_PHYS_BASE,
491 .membase = (char *)UART0_VIRT_BASE,
492 .irq = IRQ_KIRKWOOD_UART_0,
493 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
494 .iotype = UPIO_MEM,
495 .regshift = 2,
496 .uartclk = 0,
497 }, {
498 },
499 };
500
501 static struct resource kirkwood_uart0_resources[] = {
502 {
503 .start = UART0_PHYS_BASE,
504 .end = UART0_PHYS_BASE + 0xff,
505 .flags = IORESOURCE_MEM,
506 }, {
507 .start = IRQ_KIRKWOOD_UART_0,
508 .end = IRQ_KIRKWOOD_UART_0,
509 .flags = IORESOURCE_IRQ,
510 },
511 };
512
513 static struct platform_device kirkwood_uart0 = {
514 .name = "serial8250",
515 .id = 0,
516 .dev = {
517 .platform_data = kirkwood_uart0_data,
518 },
519 .resource = kirkwood_uart0_resources,
520 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
521 };
522
523 void __init kirkwood_uart0_init(void)
524 {
525 platform_device_register(&kirkwood_uart0);
526 }
527
528
529 /*****************************************************************************
530 * UART1
531 ****************************************************************************/
532 static struct plat_serial8250_port kirkwood_uart1_data[] = {
533 {
534 .mapbase = UART1_PHYS_BASE,
535 .membase = (char *)UART1_VIRT_BASE,
536 .irq = IRQ_KIRKWOOD_UART_1,
537 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
538 .iotype = UPIO_MEM,
539 .regshift = 2,
540 .uartclk = 0,
541 }, {
542 },
543 };
544
545 static struct resource kirkwood_uart1_resources[] = {
546 {
547 .start = UART1_PHYS_BASE,
548 .end = UART1_PHYS_BASE + 0xff,
549 .flags = IORESOURCE_MEM,
550 }, {
551 .start = IRQ_KIRKWOOD_UART_1,
552 .end = IRQ_KIRKWOOD_UART_1,
553 .flags = IORESOURCE_IRQ,
554 },
555 };
556
557 static struct platform_device kirkwood_uart1 = {
558 .name = "serial8250",
559 .id = 1,
560 .dev = {
561 .platform_data = kirkwood_uart1_data,
562 },
563 .resource = kirkwood_uart1_resources,
564 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
565 };
566
567 void __init kirkwood_uart1_init(void)
568 {
569 platform_device_register(&kirkwood_uart1);
570 }
571
572
573 /*****************************************************************************
574 * Cryptographic Engines and Security Accelerator (CESA)
575 ****************************************************************************/
576
577 static struct resource kirkwood_crypto_res[] = {
578 {
579 .name = "regs",
580 .start = CRYPTO_PHYS_BASE,
581 .end = CRYPTO_PHYS_BASE + 0xffff,
582 .flags = IORESOURCE_MEM,
583 }, {
584 .name = "sram",
585 .start = KIRKWOOD_SRAM_PHYS_BASE,
586 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
587 .flags = IORESOURCE_MEM,
588 }, {
589 .name = "crypto interrupt",
590 .start = IRQ_KIRKWOOD_CRYPTO,
591 .end = IRQ_KIRKWOOD_CRYPTO,
592 .flags = IORESOURCE_IRQ,
593 },
594 };
595
596 static struct platform_device kirkwood_crypto_device = {
597 .name = "mv_crypto",
598 .id = -1,
599 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
600 .resource = kirkwood_crypto_res,
601 };
602
603 void __init kirkwood_crypto_init(void)
604 {
605 kirkwood_clk_ctrl |= CGC_CRYPTO;
606 platform_device_register(&kirkwood_crypto_device);
607 }
608
609
610 /*****************************************************************************
611 * XOR
612 ****************************************************************************/
613 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
614 .dram = &kirkwood_mbus_dram_info,
615 };
616
617 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
618
619
620 /*****************************************************************************
621 * XOR0
622 ****************************************************************************/
623 static struct resource kirkwood_xor0_shared_resources[] = {
624 {
625 .name = "xor 0 low",
626 .start = XOR0_PHYS_BASE,
627 .end = XOR0_PHYS_BASE + 0xff,
628 .flags = IORESOURCE_MEM,
629 }, {
630 .name = "xor 0 high",
631 .start = XOR0_HIGH_PHYS_BASE,
632 .end = XOR0_HIGH_PHYS_BASE + 0xff,
633 .flags = IORESOURCE_MEM,
634 },
635 };
636
637 static struct platform_device kirkwood_xor0_shared = {
638 .name = MV_XOR_SHARED_NAME,
639 .id = 0,
640 .dev = {
641 .platform_data = &kirkwood_xor_shared_data,
642 },
643 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
644 .resource = kirkwood_xor0_shared_resources,
645 };
646
647 static struct resource kirkwood_xor00_resources[] = {
648 [0] = {
649 .start = IRQ_KIRKWOOD_XOR_00,
650 .end = IRQ_KIRKWOOD_XOR_00,
651 .flags = IORESOURCE_IRQ,
652 },
653 };
654
655 static struct mv_xor_platform_data kirkwood_xor00_data = {
656 .shared = &kirkwood_xor0_shared,
657 .hw_id = 0,
658 .pool_size = PAGE_SIZE,
659 };
660
661 static struct platform_device kirkwood_xor00_channel = {
662 .name = MV_XOR_NAME,
663 .id = 0,
664 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
665 .resource = kirkwood_xor00_resources,
666 .dev = {
667 .dma_mask = &kirkwood_xor_dmamask,
668 .coherent_dma_mask = DMA_BIT_MASK(64),
669 .platform_data = &kirkwood_xor00_data,
670 },
671 };
672
673 static struct resource kirkwood_xor01_resources[] = {
674 [0] = {
675 .start = IRQ_KIRKWOOD_XOR_01,
676 .end = IRQ_KIRKWOOD_XOR_01,
677 .flags = IORESOURCE_IRQ,
678 },
679 };
680
681 static struct mv_xor_platform_data kirkwood_xor01_data = {
682 .shared = &kirkwood_xor0_shared,
683 .hw_id = 1,
684 .pool_size = PAGE_SIZE,
685 };
686
687 static struct platform_device kirkwood_xor01_channel = {
688 .name = MV_XOR_NAME,
689 .id = 1,
690 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
691 .resource = kirkwood_xor01_resources,
692 .dev = {
693 .dma_mask = &kirkwood_xor_dmamask,
694 .coherent_dma_mask = DMA_BIT_MASK(64),
695 .platform_data = &kirkwood_xor01_data,
696 },
697 };
698
699 static void __init kirkwood_xor0_init(void)
700 {
701 kirkwood_clk_ctrl |= CGC_XOR0;
702 platform_device_register(&kirkwood_xor0_shared);
703
704 /*
705 * two engines can't do memset simultaneously, this limitation
706 * satisfied by removing memset support from one of the engines.
707 */
708 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
709 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
710 platform_device_register(&kirkwood_xor00_channel);
711
712 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
713 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
714 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
715 platform_device_register(&kirkwood_xor01_channel);
716 }
717
718
719 /*****************************************************************************
720 * XOR1
721 ****************************************************************************/
722 static struct resource kirkwood_xor1_shared_resources[] = {
723 {
724 .name = "xor 1 low",
725 .start = XOR1_PHYS_BASE,
726 .end = XOR1_PHYS_BASE + 0xff,
727 .flags = IORESOURCE_MEM,
728 }, {
729 .name = "xor 1 high",
730 .start = XOR1_HIGH_PHYS_BASE,
731 .end = XOR1_HIGH_PHYS_BASE + 0xff,
732 .flags = IORESOURCE_MEM,
733 },
734 };
735
736 static struct platform_device kirkwood_xor1_shared = {
737 .name = MV_XOR_SHARED_NAME,
738 .id = 1,
739 .dev = {
740 .platform_data = &kirkwood_xor_shared_data,
741 },
742 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
743 .resource = kirkwood_xor1_shared_resources,
744 };
745
746 static struct resource kirkwood_xor10_resources[] = {
747 [0] = {
748 .start = IRQ_KIRKWOOD_XOR_10,
749 .end = IRQ_KIRKWOOD_XOR_10,
750 .flags = IORESOURCE_IRQ,
751 },
752 };
753
754 static struct mv_xor_platform_data kirkwood_xor10_data = {
755 .shared = &kirkwood_xor1_shared,
756 .hw_id = 0,
757 .pool_size = PAGE_SIZE,
758 };
759
760 static struct platform_device kirkwood_xor10_channel = {
761 .name = MV_XOR_NAME,
762 .id = 2,
763 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
764 .resource = kirkwood_xor10_resources,
765 .dev = {
766 .dma_mask = &kirkwood_xor_dmamask,
767 .coherent_dma_mask = DMA_BIT_MASK(64),
768 .platform_data = &kirkwood_xor10_data,
769 },
770 };
771
772 static struct resource kirkwood_xor11_resources[] = {
773 [0] = {
774 .start = IRQ_KIRKWOOD_XOR_11,
775 .end = IRQ_KIRKWOOD_XOR_11,
776 .flags = IORESOURCE_IRQ,
777 },
778 };
779
780 static struct mv_xor_platform_data kirkwood_xor11_data = {
781 .shared = &kirkwood_xor1_shared,
782 .hw_id = 1,
783 .pool_size = PAGE_SIZE,
784 };
785
786 static struct platform_device kirkwood_xor11_channel = {
787 .name = MV_XOR_NAME,
788 .id = 3,
789 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
790 .resource = kirkwood_xor11_resources,
791 .dev = {
792 .dma_mask = &kirkwood_xor_dmamask,
793 .coherent_dma_mask = DMA_BIT_MASK(64),
794 .platform_data = &kirkwood_xor11_data,
795 },
796 };
797
798 static void __init kirkwood_xor1_init(void)
799 {
800 kirkwood_clk_ctrl |= CGC_XOR1;
801 platform_device_register(&kirkwood_xor1_shared);
802
803 /*
804 * two engines can't do memset simultaneously, this limitation
805 * satisfied by removing memset support from one of the engines.
806 */
807 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
808 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
809 platform_device_register(&kirkwood_xor10_channel);
810
811 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
812 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
813 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
814 platform_device_register(&kirkwood_xor11_channel);
815 }
816
817
818 /*****************************************************************************
819 * Watchdog
820 ****************************************************************************/
821 static struct orion_wdt_platform_data kirkwood_wdt_data = {
822 .tclk = 0,
823 };
824
825 static struct platform_device kirkwood_wdt_device = {
826 .name = "orion_wdt",
827 .id = -1,
828 .dev = {
829 .platform_data = &kirkwood_wdt_data,
830 },
831 .num_resources = 0,
832 };
833
834 static void __init kirkwood_wdt_init(void)
835 {
836 kirkwood_wdt_data.tclk = kirkwood_tclk;
837 platform_device_register(&kirkwood_wdt_device);
838 }
839
840
841 /*****************************************************************************
842 * Time handling
843 ****************************************************************************/
844 int kirkwood_tclk;
845
846 int __init kirkwood_find_tclk(void)
847 {
848 u32 dev, rev;
849
850 kirkwood_pcie_id(&dev, &rev);
851 if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
852 rev == MV88F6281_REV_A1))
853 return 200000000;
854
855 return 166666667;
856 }
857
858 static void __init kirkwood_timer_init(void)
859 {
860 kirkwood_tclk = kirkwood_find_tclk();
861 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
862 }
863
864 struct sys_timer kirkwood_timer = {
865 .init = kirkwood_timer_init,
866 };
867
868 /*****************************************************************************
869 * Audio
870 ****************************************************************************/
871 static struct resource kirkwood_i2s_resources[] = {
872 [0] = {
873 .start = AUDIO_PHYS_BASE,
874 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
875 .flags = IORESOURCE_MEM,
876 },
877 [1] = {
878 .start = IRQ_KIRKWOOD_I2S,
879 .end = IRQ_KIRKWOOD_I2S,
880 .flags = IORESOURCE_IRQ,
881 },
882 };
883
884 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
885 .dram = &kirkwood_mbus_dram_info,
886 .burst = 128,
887 };
888
889 static struct platform_device kirkwood_i2s_device = {
890 .name = "kirkwood-i2s",
891 .id = -1,
892 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
893 .resource = kirkwood_i2s_resources,
894 .dev = {
895 .platform_data = &kirkwood_i2s_data,
896 },
897 };
898
899 void __init kirkwood_audio_init(void)
900 {
901 kirkwood_clk_ctrl |= CGC_AUDIO;
902 platform_device_register(&kirkwood_i2s_device);
903 }
904
905 /*****************************************************************************
906 * General
907 ****************************************************************************/
908 /*
909 * Identify device ID and revision.
910 */
911 static char * __init kirkwood_id(void)
912 {
913 u32 dev, rev;
914
915 kirkwood_pcie_id(&dev, &rev);
916
917 if (dev == MV88F6281_DEV_ID) {
918 if (rev == MV88F6281_REV_Z0)
919 return "MV88F6281-Z0";
920 else if (rev == MV88F6281_REV_A0)
921 return "MV88F6281-A0";
922 else if (rev == MV88F6281_REV_A1)
923 return "MV88F6281-A1";
924 else
925 return "MV88F6281-Rev-Unsupported";
926 } else if (dev == MV88F6192_DEV_ID) {
927 if (rev == MV88F6192_REV_Z0)
928 return "MV88F6192-Z0";
929 else if (rev == MV88F6192_REV_A0)
930 return "MV88F6192-A0";
931 else
932 return "MV88F6192-Rev-Unsupported";
933 } else if (dev == MV88F6180_DEV_ID) {
934 if (rev == MV88F6180_REV_A0)
935 return "MV88F6180-Rev-A0";
936 else
937 return "MV88F6180-Rev-Unsupported";
938 } else {
939 return "Device-Unknown";
940 }
941 }
942
943 static void __init kirkwood_l2_init(void)
944 {
945 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
946 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
947 feroceon_l2_init(1);
948 #else
949 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
950 feroceon_l2_init(0);
951 #endif
952 }
953
954 void __init kirkwood_init(void)
955 {
956 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
957 kirkwood_id(), kirkwood_tclk);
958 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
959 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
960 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
961 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
962 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
963 kirkwood_i2s_data.tclk = kirkwood_tclk;
964
965 /*
966 * Disable propagation of mbus errors to the CPU local bus,
967 * as this causes mbus errors (which can occur for example
968 * for PCI aborts) to throw CPU aborts, which we're not set
969 * up to deal with.
970 */
971 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
972
973 kirkwood_setup_cpu_mbus();
974
975 #ifdef CONFIG_CACHE_FEROCEON_L2
976 kirkwood_l2_init();
977 #endif
978
979 /* internal devices that every board has */
980 kirkwood_rtc_init();
981 kirkwood_wdt_init();
982 kirkwood_xor0_init();
983 kirkwood_xor1_init();
984 kirkwood_crypto_init();
985 }
986
987 static int __init kirkwood_clock_gate(void)
988 {
989 unsigned int curr = readl(CLOCK_GATING_CTRL);
990
991 printk(KERN_DEBUG "Gating clock of unused units\n");
992 printk(KERN_DEBUG "before: 0x%08x\n", curr);
993
994 /* Make sure those units are accessible */
995 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
996
997 /* For SATA: first shutdown the phy */
998 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
999 /* Disable PLL and IVREF */
1000 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
1001 /* Disable PHY */
1002 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
1003 }
1004 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
1005 /* Disable PLL and IVREF */
1006 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
1007 /* Disable PHY */
1008 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
1009 }
1010
1011 /* For PCIe: first shutdown the phy */
1012 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
1013 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
1014 while (1)
1015 if (readl(PCIE_STATUS) & 0x1)
1016 break;
1017 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
1018 }
1019
1020 /* Now gate clock the required units */
1021 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
1022 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
1023
1024 return 0;
1025 }
1026 late_initcall(kirkwood_clock_gate);
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