arch/arm/mach-msm/board-msm8x60.c

   1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15  * 02110-1301, USA.
  16  *
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/irq.h>
  23
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/hardware/gic.h>
  27
  28 #include <mach/board.h>
  29 #include <mach/msm_iomap.h>
  30
  31
  32 static void __init msm8x60_map_io(void)
  33 {
  34         msm_map_msm8x60_io();
  35 }
  36
  37 static void __init msm8x60_init_irq(void)
  38 {
  39         unsigned int i;
  40
  41         gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
  42                  (void *)MSM_QGIC_CPU_BASE);
  43
  44         /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
  45         writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
  46
  47         /* RUMI does not adhere to GIC spec by enabling STIs by default.
  48          * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
  49          */
  50         if (!machine_is_msm8x60_sim())
  51                 writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
  52
  53         /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
  54          * as they are configured as level, which does not play nice with
  55          * handle_percpu_irq.
  56          */
  57         for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
  58                 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
  59                         set_irq_handler(i, handle_percpu_irq);
  60         }
  61 }
  62
  63 static void __init msm8x60_init(void)
  64 {
  65 }
  66
  67 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
  68         .map_io = msm8x60_map_io,
  69         .init_irq = msm8x60_init_irq,
  70         .init_machine = msm8x60_init,
  71         .timer = &msm_timer,
  72 MACHINE_END
  73
  74 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
  75         .map_io = msm8x60_map_io,
  76         .init_irq = msm8x60_init_irq,
  77         .init_machine = msm8x60_init,
  78         .timer = &msm_timer,
  79 MACHINE_END
  80
  81 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
  82         .map_io = msm8x60_map_io,
  83         .init_irq = msm8x60_init_irq,
  84         .init_machine = msm8x60_init,
  85         .timer = &msm_timer,
  86 MACHINE_END
  87
  88 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
  89         .map_io = msm8x60_map_io,
  90         .init_irq = msm8x60_init_irq,
  91         .init_machine = msm8x60_init,
  92         .timer = &msm_timer,
  93 MACHINE_END