arch/arm/mach-mx2/pcm038.c

   1 /*
   2  * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
   3  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19
  20 #include <linux/platform_device.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <asm/mach/arch.h>
  23 #include <asm/mach-types.h>
  24 #include <mach/common.h>
  25 #include <mach/hardware.h>
  26 #include <mach/iomux-mx1-mx2.h>
  27 #include <asm/mach/time.h>
  28 #include <mach/imx-uart.h>
  29 #include <mach/board-pcm038.h>
  30
  31 #include "devices.h"
  32
  33 /*
  34  * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
  35  * 16 bit width
  36  */
  37 static struct physmap_flash_data pcm038_flash_data = {
  38         .width = 2,
  39 };
  40
  41 static struct resource pcm038_flash_resource = {
  42         .start = 0xc0000000,
  43         .end   = 0xc1ffffff,
  44         .flags = IORESOURCE_MEM,
  45 };
  46
  47 static struct platform_device pcm038_nor_mtd_device = {
  48         .name = "physmap-flash",
  49         .id = 0,
  50         .dev = {
  51                 .platform_data = &pcm038_flash_data,
  52         },
  53         .num_resources = 1,
  54         .resource = &pcm038_flash_resource,
  55 };
  56
  57 static int mxc_uart0_pins[] = {
  58         PE12_PF_UART1_TXD,
  59         PE13_PF_UART1_RXD,
  60         PE14_PF_UART1_CTS,
  61         PE15_PF_UART1_RTS
  62 };
  63
  64 static int uart_mxc_port0_init(struct platform_device *pdev)
  65 {
  66         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  67                         ARRAY_SIZE(mxc_uart0_pins),
  68                         MXC_GPIO_ALLOC_MODE_NORMAL, "UART0");
  69 }
  70
  71 static int uart_mxc_port0_exit(struct platform_device *pdev)
  72 {
  73         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  74                         ARRAY_SIZE(mxc_uart0_pins),
  75                         MXC_GPIO_ALLOC_MODE_RELEASE, "UART0");
  76 }
  77
  78 static int mxc_uart1_pins[] = {
  79         PE3_PF_UART2_CTS,
  80         PE4_PF_UART2_RTS,
  81         PE6_PF_UART2_TXD,
  82         PE7_PF_UART2_RXD
  83 };
  84
  85 static int uart_mxc_port1_init(struct platform_device *pdev)
  86 {
  87         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  88                         ARRAY_SIZE(mxc_uart1_pins),
  89                         MXC_GPIO_ALLOC_MODE_NORMAL, "UART1");
  90 }
  91
  92 static int uart_mxc_port1_exit(struct platform_device *pdev)
  93 {
  94         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  95                         ARRAY_SIZE(mxc_uart1_pins),
  96                         MXC_GPIO_ALLOC_MODE_RELEASE, "UART1");
  97 }
  98
  99 static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
 100                                 PE9_PF_UART3_RXD,
 101                                 PE10_PF_UART3_CTS,
 102                                 PE9_PF_UART3_RXD };
 103
 104 static int uart_mxc_port2_init(struct platform_device *pdev)
 105 {
 106         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
 107                         ARRAY_SIZE(mxc_uart2_pins),
 108                         MXC_GPIO_ALLOC_MODE_NORMAL, "UART2");
 109 }
 110
 111 static int uart_mxc_port2_exit(struct platform_device *pdev)
 112 {
 113         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
 114                         ARRAY_SIZE(mxc_uart2_pins),
 115                         MXC_GPIO_ALLOC_MODE_RELEASE, "UART2");
 116 }
 117
 118 static struct imxuart_platform_data uart_pdata[] = {
 119         {
 120                 .init = uart_mxc_port0_init,
 121                 .exit = uart_mxc_port0_exit,
 122                 .flags = IMXUART_HAVE_RTSCTS,
 123         }, {
 124                 .init = uart_mxc_port1_init,
 125                 .exit = uart_mxc_port1_exit,
 126                 .flags = IMXUART_HAVE_RTSCTS,
 127         }, {
 128                 .init = uart_mxc_port2_init,
 129                 .exit = uart_mxc_port2_exit,
 130                 .flags = IMXUART_HAVE_RTSCTS,
 131         },
 132 };
 133
 134 static int mxc_fec_pins[] = {
 135         PD0_AIN_FEC_TXD0,
 136         PD1_AIN_FEC_TXD1,
 137         PD2_AIN_FEC_TXD2,
 138         PD3_AIN_FEC_TXD3,
 139         PD4_AOUT_FEC_RX_ER,
 140         PD5_AOUT_FEC_RXD1,
 141         PD6_AOUT_FEC_RXD2,
 142         PD7_AOUT_FEC_RXD3,
 143         PD8_AF_FEC_MDIO,
 144         PD9_AIN_FEC_MDC,
 145         PD10_AOUT_FEC_CRS,
 146         PD11_AOUT_FEC_TX_CLK,
 147         PD12_AOUT_FEC_RXD0,
 148         PD13_AOUT_FEC_RX_DV,
 149         PD14_AOUT_FEC_CLR,
 150         PD15_AOUT_FEC_COL,
 151         PD16_AIN_FEC_TX_ER,
 152         PF23_AIN_FEC_TX_EN
 153 };
 154
 155 static void gpio_fec_active(void)
 156 {
 157         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
 158                         ARRAY_SIZE(mxc_fec_pins),
 159                         MXC_GPIO_ALLOC_MODE_NORMAL, "FEC");
 160 }
 161
 162 static void gpio_fec_inactive(void)
 163 {
 164         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
 165                         ARRAY_SIZE(mxc_fec_pins),
 166                         MXC_GPIO_ALLOC_MODE_RELEASE, "FEC");
 167 }
 168
 169 static struct platform_device *platform_devices[] __initdata = {
 170         &pcm038_nor_mtd_device,
 171 };
 172
 173 static void __init pcm038_init(void)
 174 {
 175         gpio_fec_active();
 176
 177         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
 178         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
 179         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 180
 181         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 182
 183 #ifdef CONFIG_MACH_PCM970_BASEBOARD
 184         pcm970_baseboard_init();
 185 #endif
 186 }
 187
 188 static void __init pcm038_timer_init(void)
 189 {
 190         mxc_clocks_init(26000000);
 191         mxc_timer_init("gpt_clk.0");
 192 }
 193
 194 struct sys_timer pcm038_timer = {
 195         .init = pcm038_timer_init,
 196 };
 197
 198 MACHINE_START(PCM038, "phyCORE-i.MX27")
 199         .phys_io        = AIPI_BASE_ADDR,
 200         .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
 201         .boot_params    = PHYS_OFFSET + 0x100,
 202         .map_io         = mxc_map_io,
 203         .init_irq       = mxc_init_irq,
 204         .init_machine   = pcm038_init,
 205         .timer          = &pcm038_timer,
 206 MACHINE_END