2 * Copyright (C) 2008 Sascha Hauer, Pengutronix
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35 #include <linux/can/platform/sja1000.h>
36 #include <linux/usb/otg.h>
37 #include <linux/usb/ulpi.h>
38 #include <linux/fsl_devices.h>
39 #include <linux/gfp.h>
41 #include <media/soc_camera.h>
43 #include <asm/mach-types.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/time.h>
46 #include <asm/mach/map.h>
47 #include <mach/board-pcm037.h>
48 #include <mach/common.h>
49 #include <mach/hardware.h>
51 #include <mach/imx-uart.h>
52 #include <mach/iomux-mx3.h>
55 #include <mach/mx3_camera.h>
56 #include <mach/mx3fb.h>
57 #include <mach/mxc_nand.h>
58 #include <mach/mxc_ehci.h>
59 #include <mach/ulpi.h>
64 static enum pcm037_board_variant pcm037_instance
= PCM037_PCM970
;
66 static int __init
pcm037_variant_setup(char *str
)
68 if (!strcmp("eet", str
))
69 pcm037_instance
= PCM037_EET
;
70 else if (strcmp("pcm970", str
))
71 pr_warning("Unknown pcm037 baseboard variant %s\n", str
);
76 /* Supported values: "pcm970" (default) and "eet" */
77 __setup("pcm037_variant=", pcm037_variant_setup
);
79 enum pcm037_board_variant
pcm037_variant(void)
81 return pcm037_instance
;
84 /* UART1 with RTS/CTS handshake signals */
85 static unsigned int pcm037_uart1_handshake_pins
[] = {
92 /* UART1 without RTS/CTS handshake signals */
93 static unsigned int pcm037_uart1_pins
[] = {
98 static unsigned int pcm037_pins
[] = {
100 MX31_PIN_CSPI2_MOSI__SCL
,
101 MX31_PIN_CSPI2_MISO__SDA
,
102 MX31_PIN_CSPI2_SS2__I2C3_SDA
,
103 MX31_PIN_CSPI2_SCLK__I2C3_SCL
,
105 MX31_PIN_SD1_DATA3__SD1_DATA3
,
106 MX31_PIN_SD1_DATA2__SD1_DATA2
,
107 MX31_PIN_SD1_DATA1__SD1_DATA1
,
108 MX31_PIN_SD1_DATA0__SD1_DATA0
,
109 MX31_PIN_SD1_CLK__SD1_CLK
,
110 MX31_PIN_SD1_CMD__SD1_CMD
,
111 IOMUX_MODE(MX31_PIN_SCK6
, IOMUX_CONFIG_GPIO
), /* card detect */
112 IOMUX_MODE(MX31_PIN_SFS6
, IOMUX_CONFIG_GPIO
), /* write protect */
114 MX31_PIN_CSPI1_MOSI__MOSI
,
115 MX31_PIN_CSPI1_MISO__MISO
,
116 MX31_PIN_CSPI1_SCLK__SCLK
,
117 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY
,
118 MX31_PIN_CSPI1_SS0__SS0
,
119 MX31_PIN_CSPI1_SS1__SS1
,
120 MX31_PIN_CSPI1_SS2__SS2
,
127 MX31_PIN_CSPI3_MOSI__RXD3
,
128 MX31_PIN_CSPI3_MISO__TXD3
,
129 MX31_PIN_CSPI3_SCLK__RTS3
,
130 MX31_PIN_CSPI3_SPI_RDY__CTS3
,
131 /* LAN9217 irq pin */
132 IOMUX_MODE(MX31_PIN_GPIO3_1
, IOMUX_CONFIG_GPIO
),
134 MX31_PIN_BATT_LINE__OWIRE
,
154 MX31_PIN_VSYNC3__VSYNC3
,
155 MX31_PIN_HSYNC__HSYNC
,
156 MX31_PIN_FPSHIFT__FPSHIFT
,
157 MX31_PIN_DRDY0__DRDY0
,
158 MX31_PIN_D3_REV__D3_REV
,
159 MX31_PIN_CONTRAST__CONTRAST
,
160 MX31_PIN_D3_SPL__D3_SPL
,
161 MX31_PIN_D3_CLS__D3_CLS
,
162 MX31_PIN_LCS0__GPI03_23
,
164 IOMUX_MODE(MX31_PIN_CSI_D5
, IOMUX_CONFIG_GPIO
),
165 MX31_PIN_CSI_D6__CSI_D6
,
166 MX31_PIN_CSI_D7__CSI_D7
,
167 MX31_PIN_CSI_D8__CSI_D8
,
168 MX31_PIN_CSI_D9__CSI_D9
,
169 MX31_PIN_CSI_D10__CSI_D10
,
170 MX31_PIN_CSI_D11__CSI_D11
,
171 MX31_PIN_CSI_D12__CSI_D12
,
172 MX31_PIN_CSI_D13__CSI_D13
,
173 MX31_PIN_CSI_D14__CSI_D14
,
174 MX31_PIN_CSI_D15__CSI_D15
,
175 MX31_PIN_CSI_HSYNC__CSI_HSYNC
,
176 MX31_PIN_CSI_MCLK__CSI_MCLK
,
177 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK
,
178 MX31_PIN_CSI_VSYNC__CSI_VSYNC
,
180 IOMUX_MODE(MX31_PIN_ATA_DMACK
, IOMUX_CONFIG_GPIO
),
182 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0
,
183 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1
,
184 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2
,
185 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3
,
186 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4
,
187 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5
,
188 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6
,
189 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7
,
190 MX31_PIN_USBOTG_CLK__USBOTG_CLK
,
191 MX31_PIN_USBOTG_DIR__USBOTG_DIR
,
192 MX31_PIN_USBOTG_NXT__USBOTG_NXT
,
193 MX31_PIN_USBOTG_STP__USBOTG_STP
,
195 IOMUX_MODE(MX31_PIN_USBH2_CLK
, IOMUX_CONFIG_FUNC
),
196 IOMUX_MODE(MX31_PIN_USBH2_DIR
, IOMUX_CONFIG_FUNC
),
197 IOMUX_MODE(MX31_PIN_USBH2_NXT
, IOMUX_CONFIG_FUNC
),
198 IOMUX_MODE(MX31_PIN_USBH2_STP
, IOMUX_CONFIG_FUNC
),
199 IOMUX_MODE(MX31_PIN_USBH2_DATA0
, IOMUX_CONFIG_FUNC
),
200 IOMUX_MODE(MX31_PIN_USBH2_DATA1
, IOMUX_CONFIG_FUNC
),
201 IOMUX_MODE(MX31_PIN_STXD3
, IOMUX_CONFIG_FUNC
),
202 IOMUX_MODE(MX31_PIN_SRXD3
, IOMUX_CONFIG_FUNC
),
203 IOMUX_MODE(MX31_PIN_SCK3
, IOMUX_CONFIG_FUNC
),
204 IOMUX_MODE(MX31_PIN_SFS3
, IOMUX_CONFIG_FUNC
),
205 IOMUX_MODE(MX31_PIN_STXD6
, IOMUX_CONFIG_FUNC
),
206 IOMUX_MODE(MX31_PIN_SRXD6
, IOMUX_CONFIG_FUNC
),
209 static struct physmap_flash_data pcm037_flash_data
= {
213 static struct resource pcm037_flash_resource
= {
216 .flags
= IORESOURCE_MEM
,
219 static struct platform_device pcm037_flash
= {
220 .name
= "physmap-flash",
223 .platform_data
= &pcm037_flash_data
,
225 .resource
= &pcm037_flash_resource
,
229 static struct imxuart_platform_data uart_pdata
= {
230 .flags
= IMXUART_HAVE_RTSCTS
,
233 static struct resource smsc911x_resources
[] = {
235 .start
= MX31_CS1_BASE_ADDR
+ 0x300,
236 .end
= MX31_CS1_BASE_ADDR
+ 0x300 + SZ_64K
- 1,
237 .flags
= IORESOURCE_MEM
,
239 .start
= IOMUX_TO_IRQ(MX31_PIN_GPIO3_1
),
240 .end
= IOMUX_TO_IRQ(MX31_PIN_GPIO3_1
),
241 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_LOWLEVEL
,
245 static struct smsc911x_platform_config smsc911x_info
= {
246 .flags
= SMSC911X_USE_32BIT
| SMSC911X_FORCE_INTERNAL_PHY
|
247 SMSC911X_SAVE_MAC_ADDRESS
,
248 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_LOW
,
249 .irq_type
= SMSC911X_IRQ_TYPE_OPEN_DRAIN
,
250 .phy_interface
= PHY_INTERFACE_MODE_MII
,
253 static struct platform_device pcm037_eth
= {
256 .num_resources
= ARRAY_SIZE(smsc911x_resources
),
257 .resource
= smsc911x_resources
,
259 .platform_data
= &smsc911x_info
,
263 static struct platdata_mtd_ram pcm038_sram_data
= {
267 static struct resource pcm038_sram_resource
= {
268 .start
= MX31_CS4_BASE_ADDR
,
269 .end
= MX31_CS4_BASE_ADDR
+ 512 * 1024 - 1,
270 .flags
= IORESOURCE_MEM
,
273 static struct platform_device pcm037_sram_device
= {
277 .platform_data
= &pcm038_sram_data
,
280 .resource
= &pcm038_sram_resource
,
283 static struct mxc_nand_platform_data pcm037_nand_board_info
= {
288 static struct imxi2c_platform_data pcm037_i2c_1_data
= {
292 static struct imxi2c_platform_data pcm037_i2c_2_data
= {
296 static struct at24_platform_data board_eeprom
= {
299 .flags
= AT24_FLAG_ADDR16
,
302 static int pcm037_camera_power(struct device
*dev
, int on
)
304 /* disable or enable the camera in X7 or X8 PCM970 connector */
305 gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5
), !on
);
309 static struct i2c_board_info pcm037_i2c_camera
[] = {
311 I2C_BOARD_INFO("mt9t031", 0x5d),
313 I2C_BOARD_INFO("mt9v022", 0x48),
317 static struct soc_camera_link iclink_mt9v022
= {
318 .bus_id
= 0, /* Must match with the camera ID */
319 .board_info
= &pcm037_i2c_camera
[1],
321 .module_name
= "mt9v022",
324 static struct soc_camera_link iclink_mt9t031
= {
325 .bus_id
= 0, /* Must match with the camera ID */
326 .power
= pcm037_camera_power
,
327 .board_info
= &pcm037_i2c_camera
[0],
329 .module_name
= "mt9t031",
332 static struct i2c_board_info pcm037_i2c_devices
[] = {
334 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
335 .platform_data
= &board_eeprom
,
337 I2C_BOARD_INFO("pcf8563", 0x51),
341 static struct platform_device pcm037_mt9t031
= {
342 .name
= "soc-camera-pdrv",
345 .platform_data
= &iclink_mt9t031
,
349 static struct platform_device pcm037_mt9v022
= {
350 .name
= "soc-camera-pdrv",
353 .platform_data
= &iclink_mt9v022
,
357 /* Not connected by default */
358 #ifdef PCM970_SDHC_RW_SWITCH
359 static int pcm970_sdhc1_get_ro(struct device
*dev
)
361 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6
));
365 #define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
366 #define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
368 static int pcm970_sdhc1_init(struct device
*dev
, irq_handler_t detect_irq
,
373 ret
= gpio_request(SDHC1_GPIO_DET
, "sdhc-detect");
377 gpio_direction_input(SDHC1_GPIO_DET
);
379 #ifdef PCM970_SDHC_RW_SWITCH
380 ret
= gpio_request(SDHC1_GPIO_WP
, "sdhc-wp");
383 gpio_direction_input(SDHC1_GPIO_WP
);
386 ret
= request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6
), detect_irq
,
387 IRQF_DISABLED
| IRQF_TRIGGER_FALLING
,
388 "sdhc-detect", data
);
390 goto err_gpio_free_2
;
395 #ifdef PCM970_SDHC_RW_SWITCH
396 gpio_free(SDHC1_GPIO_WP
);
399 gpio_free(SDHC1_GPIO_DET
);
404 static void pcm970_sdhc1_exit(struct device
*dev
, void *data
)
406 free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6
), data
);
407 gpio_free(SDHC1_GPIO_DET
);
408 gpio_free(SDHC1_GPIO_WP
);
411 static struct imxmmc_platform_data sdhc_pdata
= {
412 #ifdef PCM970_SDHC_RW_SWITCH
413 .get_ro
= pcm970_sdhc1_get_ro
,
415 .init
= pcm970_sdhc1_init
,
416 .exit
= pcm970_sdhc1_exit
,
419 struct mx3_camera_pdata camera_pdata
= {
420 .dma_dev
= &mx3_ipu
.dev
,
421 .flags
= MX3_CAMERA_DATAWIDTH_8
| MX3_CAMERA_DATAWIDTH_10
,
425 static int __init
pcm037_camera_alloc_dma(const size_t buf_size
)
427 dma_addr_t dma_handle
;
431 if (buf_size
< 2 * 1024 * 1024)
434 buf
= dma_alloc_coherent(NULL
, buf_size
, &dma_handle
, GFP_KERNEL
);
436 pr_err("%s: cannot allocate camera buffer-memory\n", __func__
);
440 memset(buf
, 0, buf_size
);
442 dma
= dma_declare_coherent_memory(&mx3_camera
.dev
,
443 dma_handle
, dma_handle
, buf_size
,
444 DMA_MEMORY_MAP
| DMA_MEMORY_EXCLUSIVE
);
446 /* The way we call dma_declare_coherent_memory only a malloc can fail */
447 return dma
& DMA_MEMORY_MAP
? 0 : -ENOMEM
;
450 static struct platform_device
*devices
[] __initdata
= {
457 static struct ipu_platform_data mx3_ipu_data
= {
458 .irq_base
= MXC_IPU_IRQ_START
,
461 static const struct fb_videomode fb_modedb
[] = {
463 /* 240x320 @ 60 Hz Sharp */
464 .name
= "Sharp-LQ035Q7DH06-QVGA",
475 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_SHARP_MODE
|
476 FB_SYNC_CLK_INVERT
| FB_SYNC_CLK_IDLE_EN
,
477 .vmode
= FB_VMODE_NONINTERLACED
,
480 /* 240x320 @ 60 Hz */
492 .sync
= FB_SYNC_VERT_HIGH_ACT
| FB_SYNC_OE_ACT_HIGH
,
493 .vmode
= FB_VMODE_NONINTERLACED
,
496 /* 240x320 @ 60 Hz */
508 .sync
= FB_SYNC_OE_ACT_HIGH
| FB_SYNC_CLK_INVERT
,
509 .vmode
= FB_VMODE_NONINTERLACED
,
514 static struct mx3fb_platform_data mx3fb_pdata
= {
515 .dma_dev
= &mx3_ipu
.dev
,
516 .name
= "Sharp-LQ035Q7DH06-QVGA",
518 .num_modes
= ARRAY_SIZE(fb_modedb
),
521 static struct resource pcm970_sja1000_resources
[] = {
523 .start
= MX31_CS5_BASE_ADDR
,
524 .end
= MX31_CS5_BASE_ADDR
+ 0x100 - 1,
525 .flags
= IORESOURCE_MEM
,
527 .start
= IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
528 .end
= IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
529 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_LOWEDGE
,
533 struct sja1000_platform_data pcm970_sja1000_platform_data
= {
534 .clock
= 16000000 / 2,
539 static struct platform_device pcm970_sja1000
= {
540 .name
= "sja1000_platform",
542 .platform_data
= &pcm970_sja1000_platform_data
,
544 .resource
= pcm970_sja1000_resources
,
545 .num_resources
= ARRAY_SIZE(pcm970_sja1000_resources
),
548 static struct mxc_usbh_platform_data otg_pdata
= {
549 .portsc
= MXC_EHCI_MODE_ULPI
,
550 .flags
= MXC_EHCI_INTERFACE_DIFF_UNI
,
553 static struct mxc_usbh_platform_data usbh2_pdata
= {
554 .portsc
= MXC_EHCI_MODE_ULPI
,
555 .flags
= MXC_EHCI_INTERFACE_DIFF_UNI
,
558 static struct fsl_usb2_platform_data otg_device_pdata
= {
559 .operating_mode
= FSL_USB2_DR_DEVICE
,
560 .phy_mode
= FSL_USB2_PHY_ULPI
,
563 static int otg_mode_host
;
565 static int __init
pcm037_otg_mode(char *options
)
567 if (!strcmp(options
, "host"))
569 else if (!strcmp(options
, "device"))
572 pr_info("otg_mode neither \"host\" nor \"device\". "
573 "Defaulting to device\n");
576 __setup("otg_mode=", pcm037_otg_mode
);
579 * Board specific initialization.
581 static void __init
mxc_board_init(void)
586 mxc_iomux_set_gpr(MUX_PGP_UH2
, 1);
588 mxc_iomux_setup_multiple_pins(pcm037_pins
, ARRAY_SIZE(pcm037_pins
),
591 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
592 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
594 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK
, H2_PAD_CFG
);
595 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR
, H2_PAD_CFG
);
596 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT
, H2_PAD_CFG
);
597 mxc_iomux_set_pad(MX31_PIN_USBH2_STP
, H2_PAD_CFG
);
598 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0
, H2_PAD_CFG
); /* USBH2_DATA0 */
599 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1
, H2_PAD_CFG
); /* USBH2_DATA1 */
600 mxc_iomux_set_pad(MX31_PIN_SRXD6
, H2_PAD_CFG
); /* USBH2_DATA2 */
601 mxc_iomux_set_pad(MX31_PIN_STXD6
, H2_PAD_CFG
); /* USBH2_DATA3 */
602 mxc_iomux_set_pad(MX31_PIN_SFS3
, H2_PAD_CFG
); /* USBH2_DATA4 */
603 mxc_iomux_set_pad(MX31_PIN_SCK3
, H2_PAD_CFG
); /* USBH2_DATA5 */
604 mxc_iomux_set_pad(MX31_PIN_SRXD3
, H2_PAD_CFG
); /* USBH2_DATA6 */
605 mxc_iomux_set_pad(MX31_PIN_STXD3
, H2_PAD_CFG
); /* USBH2_DATA7 */
607 if (pcm037_variant() == PCM037_EET
)
608 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins
,
609 ARRAY_SIZE(pcm037_uart1_pins
), "pcm037_uart1");
611 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins
,
612 ARRAY_SIZE(pcm037_uart1_handshake_pins
),
615 platform_add_devices(devices
, ARRAY_SIZE(devices
));
617 mxc_register_device(&mxc_uart_device0
, &uart_pdata
);
618 mxc_register_device(&mxc_uart_device1
, &uart_pdata
);
619 mxc_register_device(&mxc_uart_device2
, &uart_pdata
);
621 mxc_register_device(&mxc_w1_master_device
, NULL
);
623 /* LAN9217 IRQ pin */
624 ret
= gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1
), "lan9217-irq");
626 pr_warning("could not get LAN irq gpio\n");
628 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1
));
629 platform_device_register(&pcm037_eth
);
633 /* I2C adapters and devices */
634 i2c_register_board_info(1, pcm037_i2c_devices
,
635 ARRAY_SIZE(pcm037_i2c_devices
));
637 mxc_register_device(&mxc_i2c_device1
, &pcm037_i2c_1_data
);
638 mxc_register_device(&mxc_i2c_device2
, &pcm037_i2c_2_data
);
640 mxc_register_device(&mxc_nand_device
, &pcm037_nand_board_info
);
641 mxc_register_device(&mxcsdhc_device0
, &sdhc_pdata
);
642 mxc_register_device(&mx3_ipu
, &mx3_ipu_data
);
643 mxc_register_device(&mx3_fb
, &mx3fb_pdata
);
646 /* Camera power: default - off */
647 ret
= gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5
), "mt9t031-power");
649 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5
), 1);
651 iclink_mt9t031
.power
= NULL
;
653 if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
654 mxc_register_device(&mx3_camera
, &camera_pdata
);
656 platform_device_register(&pcm970_sja1000
);
658 #if defined(CONFIG_USB_ULPI)
660 otg_pdata
.otg
= otg_ulpi_create(&mxc_ulpi_access_ops
,
661 USB_OTG_DRV_VBUS
| USB_OTG_DRV_VBUS_EXT
);
663 mxc_register_device(&mxc_otg_host
, &otg_pdata
);
666 usbh2_pdata
.otg
= otg_ulpi_create(&mxc_ulpi_access_ops
,
667 USB_OTG_DRV_VBUS
| USB_OTG_DRV_VBUS_EXT
);
669 mxc_register_device(&mxc_usbh2
, &usbh2_pdata
);
672 mxc_register_device(&mxc_otg_udc_device
, &otg_device_pdata
);
676 static void __init
pcm037_timer_init(void)
678 mx31_clocks_init(26000000);
681 struct sys_timer pcm037_timer
= {
682 .init
= pcm037_timer_init
,
685 MACHINE_START(PCM037
, "Phytec Phycore pcm037")
686 /* Maintainer: Pengutronix */
687 .phys_io
= MX31_AIPS1_BASE_ADDR
,
688 .io_pg_offst
= (MX31_AIPS1_BASE_ADDR_VIRT
>> 18) & 0xfffc,
689 .boot_params
= MX3x_PHYS_OFFSET
+ 0x100,
690 .map_io
= mx31_map_io
,
691 .init_irq
= mx31_init_irq
,
692 .init_machine
= mxc_board_init
,
693 .timer
= &pcm037_timer
,