arch/arm/mach-mxs/mach-mxs.c

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2012 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/can/platform/flexcan.h>
  16 #include <linux/delay.h>
  17 #include <linux/err.h>
  18 #include <linux/gpio.h>
  19 #include <linux/init.h>
  20 #include <linux/micrel_phy.h>
  21 #include <linux/mxsfb.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/phy.h>
  24 #include <linux/pinctrl/consumer.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/common.h>
  28 #include <mach/digctl.h>
  29 #include <mach/mxs.h>
  30
  31 static struct fb_videomode mx23evk_video_modes[] = {
  32         {
  33                 .name           = "Samsung-LMS430HF02",
  34                 .refresh        = 60,
  35                 .xres           = 480,
  36                 .yres           = 272,
  37                 .pixclock       = 108096, /* picosecond (9.2 MHz) */
  38                 .left_margin    = 15,
  39                 .right_margin   = 8,
  40                 .upper_margin   = 12,
  41                 .lower_margin   = 4,
  42                 .hsync_len      = 1,
  43                 .vsync_len      = 1,
  44         },
  45 };
  46
  47 static struct fb_videomode mx28evk_video_modes[] = {
  48         {
  49                 .name           = "Seiko-43WVF1G",
  50                 .refresh        = 60,
  51                 .xres           = 800,
  52                 .yres           = 480,
  53                 .pixclock       = 29851, /* picosecond (33.5 MHz) */
  54                 .left_margin    = 89,
  55                 .right_margin   = 164,
  56                 .upper_margin   = 23,
  57                 .lower_margin   = 10,
  58                 .hsync_len      = 10,
  59                 .vsync_len      = 10,
  60         },
  61 };
  62
  63 static struct fb_videomode m28evk_video_modes[] = {
  64         {
  65                 .name           = "Ampire AM-800480R2TMQW-T01H",
  66                 .refresh        = 60,
  67                 .xres           = 800,
  68                 .yres           = 480,
  69                 .pixclock       = 30066, /* picosecond (33.26 MHz) */
  70                 .left_margin    = 0,
  71                 .right_margin   = 256,
  72                 .upper_margin   = 0,
  73                 .lower_margin   = 45,
  74                 .hsync_len      = 1,
  75                 .vsync_len      = 1,
  76         },
  77 };
  78
  79 static struct fb_videomode apx4devkit_video_modes[] = {
  80         {
  81                 .name           = "HannStar PJ70112A",
  82                 .refresh        = 60,
  83                 .xres           = 800,
  84                 .yres           = 480,
  85                 .pixclock       = 33333, /* picosecond (30.00 MHz) */
  86                 .left_margin    = 88,
  87                 .right_margin   = 40,
  88                 .upper_margin   = 32,
  89                 .lower_margin   = 13,
  90                 .hsync_len      = 48,
  91                 .vsync_len      = 3,
  92                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  93         },
  94 };
  95
  96 static struct fb_videomode apf28dev_video_modes[] = {
  97         {
  98                 .name = "LW700",
  99                 .refresh = 60,
 100                 .xres = 800,
 101                 .yres = 480,
 102                 .pixclock = 30303, /* picosecond */
 103                 .left_margin = 96,
 104                 .right_margin = 96, /* at least 3 & 1 */
 105                 .upper_margin = 0x14,
 106                 .lower_margin = 0x15,
 107                 .hsync_len = 64,
 108                 .vsync_len = 4,
 109                 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 110         },
 111 };
 112
 113 static struct fb_videomode cfa10049_video_modes[] = {
 114         {
 115                 .name           = "Himax HX8357-B",
 116                 .refresh        = 60,
 117                 .xres           = 320,
 118                 .yres           = 480,
 119                 .pixclock       = 108506, /* picosecond (9.216 MHz) */
 120                 .left_margin    = 2,
 121                 .right_margin   = 2,
 122                 .upper_margin   = 2,
 123                 .lower_margin   = 2,
 124                 .hsync_len      = 15,
 125                 .vsync_len      = 15,
 126         },
 127 };
 128
 129 static struct mxsfb_platform_data mxsfb_pdata __initdata;
 130
 131 /*
 132  * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
 133  */
 134 #define MX28EVK_FLEXCAN_SWITCH  MXS_GPIO_NR(2, 13)
 135
 136 static int flexcan0_en, flexcan1_en;
 137
 138 static void mx28evk_flexcan_switch(void)
 139 {
 140         if (flexcan0_en || flexcan1_en)
 141                 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
 142         else
 143                 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
 144 }
 145
 146 static void mx28evk_flexcan0_switch(int enable)
 147 {
 148         flexcan0_en = enable;
 149         mx28evk_flexcan_switch();
 150 }
 151
 152 static void mx28evk_flexcan1_switch(int enable)
 153 {
 154         flexcan1_en = enable;
 155         mx28evk_flexcan_switch();
 156 }
 157
 158 static struct flexcan_platform_data flexcan_pdata[2];
 159
 160 static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
 161         OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
 162         OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
 163         OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
 164         OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
 165         { /* sentinel */ }
 166 };
 167
 168 static void __init imx23_timer_init(void)
 169 {
 170         mx23_clocks_init();
 171 }
 172
 173 static void __init imx28_timer_init(void)
 174 {
 175         mx28_clocks_init();
 176 }
 177
 178 enum mac_oui {
 179         OUI_FSL,
 180         OUI_DENX,
 181         OUI_CRYSTALFONTZ,
 182 };
 183
 184 static void __init update_fec_mac_prop(enum mac_oui oui)
 185 {
 186         struct device_node *np, *from = NULL;
 187         struct property *newmac;
 188         const u32 *ocotp = mxs_get_ocotp();
 189         u8 *macaddr;
 190         u32 val;
 191         int i;
 192
 193         for (i = 0; i < 2; i++) {
 194                 np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
 195                 if (!np)
 196                         return;
 197
 198                 from = np;
 199
 200                 if (of_get_property(np, "local-mac-address", NULL))
 201                         continue;
 202
 203                 newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
 204                 if (!newmac)
 205                         return;
 206                 newmac->value = newmac + 1;
 207                 newmac->length = 6;
 208
 209                 newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
 210                 if (!newmac->name) {
 211                         kfree(newmac);
 212                         return;
 213                 }
 214
 215                 /*
 216                  * OCOTP only stores the last 4 octets for each mac address,
 217                  * so hard-code OUI here.
 218                  */
 219                 macaddr = newmac->value;
 220                 switch (oui) {
 221                 case OUI_FSL:
 222                         macaddr[0] = 0x00;
 223                         macaddr[1] = 0x04;
 224                         macaddr[2] = 0x9f;
 225                         break;
 226                 case OUI_DENX:
 227                         macaddr[0] = 0xc0;
 228                         macaddr[1] = 0xe5;
 229                         macaddr[2] = 0x4e;
 230                         break;
 231                 case OUI_CRYSTALFONTZ:
 232                         macaddr[0] = 0x58;
 233                         macaddr[1] = 0xb9;
 234                         macaddr[2] = 0xe1;
 235                         break;
 236                 }
 237                 val = ocotp[i];
 238                 macaddr[3] = (val >> 16) & 0xff;
 239                 macaddr[4] = (val >> 8) & 0xff;
 240                 macaddr[5] = (val >> 0) & 0xff;
 241
 242                 of_update_property(np, newmac);
 243         }
 244 }
 245
 246 static void __init imx23_evk_init(void)
 247 {
 248         mxsfb_pdata.mode_list = mx23evk_video_modes;
 249         mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
 250         mxsfb_pdata.default_bpp = 32;
 251         mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
 252         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
 253                                 MXSFB_SYNC_DOTCLK_FAILING_ACT;
 254 }
 255
 256 static inline void enable_clk_enet_out(void)
 257 {
 258         struct clk *clk = clk_get_sys("enet_out", NULL);
 259
 260         if (!IS_ERR(clk))
 261                 clk_prepare_enable(clk);
 262 }
 263
 264 static void __init imx28_evk_init(void)
 265 {
 266         enable_clk_enet_out();
 267         update_fec_mac_prop(OUI_FSL);
 268
 269         mxsfb_pdata.mode_list = mx28evk_video_modes;
 270         mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
 271         mxsfb_pdata.default_bpp = 32;
 272         mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
 273         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
 274                                 MXSFB_SYNC_DOTCLK_FAILING_ACT;
 275
 276         mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
 277 }
 278
 279 static void __init imx28_evk_post_init(void)
 280 {
 281         if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
 282                               "flexcan-switch")) {
 283                 flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
 284                 flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
 285         }
 286 }
 287
 288 static void __init m28evk_init(void)
 289 {
 290         mxsfb_pdata.mode_list = m28evk_video_modes;
 291         mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
 292         mxsfb_pdata.default_bpp = 16;
 293         mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
 294         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
 295 }
 296
 297 static void __init sc_sps1_init(void)
 298 {
 299         enable_clk_enet_out();
 300 }
 301
 302 static int apx4devkit_phy_fixup(struct phy_device *phy)
 303 {
 304         phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
 305         return 0;
 306 }
 307
 308 static void __init apx4devkit_init(void)
 309 {
 310         enable_clk_enet_out();
 311
 312         if (IS_BUILTIN(CONFIG_PHYLIB))
 313                 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
 314                                            apx4devkit_phy_fixup);
 315
 316         mxsfb_pdata.mode_list = apx4devkit_video_modes;
 317         mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
 318         mxsfb_pdata.default_bpp = 32;
 319         mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
 320         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
 321                                 MXSFB_SYNC_DOTCLK_FAILING_ACT;
 322 }
 323
 324 #define ENET0_MDC__GPIO_4_0     MXS_GPIO_NR(4, 0)
 325 #define ENET0_MDIO__GPIO_4_1    MXS_GPIO_NR(4, 1)
 326 #define ENET0_RX_EN__GPIO_4_2   MXS_GPIO_NR(4, 2)
 327 #define ENET0_RXD0__GPIO_4_3    MXS_GPIO_NR(4, 3)
 328 #define ENET0_RXD1__GPIO_4_4    MXS_GPIO_NR(4, 4)
 329 #define ENET0_TX_EN__GPIO_4_6   MXS_GPIO_NR(4, 6)
 330 #define ENET0_TXD0__GPIO_4_7    MXS_GPIO_NR(4, 7)
 331 #define ENET0_TXD1__GPIO_4_8    MXS_GPIO_NR(4, 8)
 332 #define ENET_CLK__GPIO_4_16     MXS_GPIO_NR(4, 16)
 333
 334 #define TX28_FEC_PHY_POWER      MXS_GPIO_NR(3, 29)
 335 #define TX28_FEC_PHY_RESET      MXS_GPIO_NR(4, 13)
 336 #define TX28_FEC_nINT           MXS_GPIO_NR(4, 5)
 337
 338 static const struct gpio tx28_gpios[] __initconst = {
 339         { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
 340         { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
 341         { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
 342         { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
 343         { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
 344         { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
 345         { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
 346         { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
 347         { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
 348         { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
 349         { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
 350         { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
 351 };
 352
 353 static void __init tx28_post_init(void)
 354 {
 355         struct device_node *np;
 356         struct platform_device *pdev;
 357         struct pinctrl *pctl;
 358         int ret;
 359
 360         enable_clk_enet_out();
 361
 362         np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
 363         pdev = of_find_device_by_node(np);
 364         if (!pdev) {
 365                 pr_err("%s: failed to find fec device\n", __func__);
 366                 return;
 367         }
 368
 369         pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
 370         if (IS_ERR(pctl)) {
 371                 pr_err("%s: failed to get pinctrl state\n", __func__);
 372                 return;
 373         }
 374
 375         ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
 376         if (ret) {
 377                 pr_err("%s: failed to request gpios: %d\n", __func__, ret);
 378                 return;
 379         }
 380
 381         /* Power up fec phy */
 382         gpio_set_value(TX28_FEC_PHY_POWER, 1);
 383         msleep(26); /* 25ms according to data sheet */
 384
 385         /* Mode strap pins */
 386         gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
 387         gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
 388         gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
 389
 390         udelay(100); /* minimum assertion time for nRST */
 391
 392         /* Deasserting FEC PHY RESET */
 393         gpio_set_value(TX28_FEC_PHY_RESET, 1);
 394
 395         pinctrl_put(pctl);
 396 }
 397
 398 static void __init cfa10049_init(void)
 399 {
 400         enable_clk_enet_out();
 401         update_fec_mac_prop(OUI_CRYSTALFONTZ);
 402
 403         mxsfb_pdata.mode_list = cfa10049_video_modes;
 404         mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
 405         mxsfb_pdata.default_bpp = 32;
 406         mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
 407         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
 408 }
 409
 410 static void __init cfa10037_init(void)
 411 {
 412         enable_clk_enet_out();
 413         update_fec_mac_prop(OUI_CRYSTALFONTZ);
 414 }
 415
 416 static void __init apf28_init(void)
 417 {
 418         enable_clk_enet_out();
 419
 420         mxsfb_pdata.mode_list = apf28dev_video_modes;
 421         mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
 422         mxsfb_pdata.default_bpp = 16;
 423         mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
 424         mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
 425                                 MXSFB_SYNC_DOTCLK_FAILING_ACT;
 426 }
 427
 428 static void __init mxs_machine_init(void)
 429 {
 430         if (of_machine_is_compatible("fsl,imx28-evk"))
 431                 imx28_evk_init();
 432         else if (of_machine_is_compatible("fsl,imx23-evk"))
 433                 imx23_evk_init();
 434         else if (of_machine_is_compatible("denx,m28evk"))
 435                 m28evk_init();
 436         else if (of_machine_is_compatible("bluegiga,apx4devkit"))
 437                 apx4devkit_init();
 438         else if (of_machine_is_compatible("crystalfontz,cfa10037"))
 439                 cfa10037_init();
 440         else if (of_machine_is_compatible("crystalfontz,cfa10049"))
 441                 cfa10049_init();
 442         else if (of_machine_is_compatible("armadeus,imx28-apf28"))
 443                 apf28_init();
 444         else if (of_machine_is_compatible("schulercontrol,imx28-sps1"))
 445                 sc_sps1_init();
 446
 447         of_platform_populate(NULL, of_default_bus_match_table,
 448                              mxs_auxdata_lookup, NULL);
 449
 450         if (of_machine_is_compatible("karo,tx28"))
 451                 tx28_post_init();
 452
 453         if (of_machine_is_compatible("fsl,imx28-evk"))
 454                 imx28_evk_post_init();
 455 }
 456
 457 static const char *imx23_dt_compat[] __initdata = {
 458         "fsl,imx23",
 459         NULL,
 460 };
 461
 462 static const char *imx28_dt_compat[] __initdata = {
 463         "fsl,imx28",
 464         NULL,
 465 };
 466
 467 DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
 468         .map_io         = mx23_map_io,
 469         .init_irq       = icoll_init_irq,
 470         .handle_irq     = icoll_handle_irq,
 471         .init_time      = imx23_timer_init,
 472         .init_machine   = mxs_machine_init,
 473         .dt_compat      = imx23_dt_compat,
 474         .restart        = mxs_restart,
 475 MACHINE_END
 476
 477 DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
 478         .map_io         = mx28_map_io,
 479         .init_irq       = icoll_init_irq,
 480         .handle_irq     = icoll_handle_irq,
 481         .init_time      = imx28_timer_init,
 482         .init_machine   = mxs_machine_init,
 483         .dt_compat      = imx28_dt_compat,
 484         .restart        = mxs_restart,
 485 MACHINE_END