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[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-omap1 / lcd_dma.c
1 /*
2 * linux/arch/arm/mach-omap1/lcd_dma.c
3 *
4 * Extracted from arch/arm/plat-omap/dma.c
5 * Copyright (C) 2003 - 2008 Nokia Corporation
6 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
7 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
8 * Graphics DMA and LCD DMA graphics tranformations
9 * by Imre Deak <imre.deak@nokia.com>
10 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
11 * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
12 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
13 *
14 * Copyright (C) 2009 Texas Instruments
15 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
16 *
17 * Support functions for the OMAP internal DMA channels.
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/spinlock.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29
30 #include <linux/omap-dma.h>
31
32 #include <mach/hardware.h>
33 #include <mach/lcdc.h>
34
35 #include "dma.h"
36
37 int omap_lcd_dma_running(void)
38 {
39 /*
40 * On OMAP1510, internal LCD controller will start the transfer
41 * when it gets enabled, so assume DMA running if LCD enabled.
42 */
43 if (cpu_is_omap15xx())
44 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
45 return 1;
46
47 /* Check if LCD DMA is running */
48 if (cpu_is_omap16xx())
49 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
50 return 1;
51
52 return 0;
53 }
54
55 static struct lcd_dma_info {
56 spinlock_t lock;
57 int reserved;
58 void (*callback)(u16 status, void *data);
59 void *cb_data;
60
61 int active;
62 unsigned long addr;
63 int rotate, data_type, xres, yres;
64 int vxres;
65 int mirror;
66 int xscale, yscale;
67 int ext_ctrl;
68 int src_port;
69 int single_transfer;
70 } lcd_dma;
71
72 void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
73 int data_type)
74 {
75 lcd_dma.addr = addr;
76 lcd_dma.data_type = data_type;
77 lcd_dma.xres = fb_xres;
78 lcd_dma.yres = fb_yres;
79 }
80 EXPORT_SYMBOL(omap_set_lcd_dma_b1);
81
82 void omap_set_lcd_dma_ext_controller(int external)
83 {
84 lcd_dma.ext_ctrl = external;
85 }
86 EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
87
88 void omap_set_lcd_dma_single_transfer(int single)
89 {
90 lcd_dma.single_transfer = single;
91 }
92 EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
93
94 void omap_set_lcd_dma_b1_rotation(int rotate)
95 {
96 if (cpu_is_omap15xx()) {
97 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
98 BUG();
99 return;
100 }
101 lcd_dma.rotate = rotate;
102 }
103 EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
104
105 void omap_set_lcd_dma_b1_mirror(int mirror)
106 {
107 if (cpu_is_omap15xx()) {
108 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
109 BUG();
110 }
111 lcd_dma.mirror = mirror;
112 }
113 EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
114
115 void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
116 {
117 if (cpu_is_omap15xx()) {
118 pr_err("DMA virtual resolution is not supported in 1510 mode\n");
119 BUG();
120 }
121 lcd_dma.vxres = vxres;
122 }
123 EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
124
125 void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
126 {
127 if (cpu_is_omap15xx()) {
128 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
129 BUG();
130 }
131 lcd_dma.xscale = xscale;
132 lcd_dma.yscale = yscale;
133 }
134 EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
135
136 static void set_b1_regs(void)
137 {
138 unsigned long top, bottom;
139 int es;
140 u16 w;
141 unsigned long en, fn;
142 long ei, fi;
143 unsigned long vxres;
144 unsigned int xscale, yscale;
145
146 switch (lcd_dma.data_type) {
147 case OMAP_DMA_DATA_TYPE_S8:
148 es = 1;
149 break;
150 case OMAP_DMA_DATA_TYPE_S16:
151 es = 2;
152 break;
153 case OMAP_DMA_DATA_TYPE_S32:
154 es = 4;
155 break;
156 default:
157 BUG();
158 return;
159 }
160
161 vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
162 xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
163 yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
164 BUG_ON(vxres < lcd_dma.xres);
165
166 #define PIXADDR(x, y) (lcd_dma.addr + \
167 ((y) * vxres * yscale + (x) * xscale) * es)
168 #define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
169
170 switch (lcd_dma.rotate) {
171 case 0:
172 if (!lcd_dma.mirror) {
173 top = PIXADDR(0, 0);
174 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
175 /* 1510 DMA requires the bottom address to be 2 more
176 * than the actual last memory access location. */
177 if (cpu_is_omap15xx() &&
178 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
179 bottom += 2;
180 ei = PIXSTEP(0, 0, 1, 0);
181 fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
182 } else {
183 top = PIXADDR(lcd_dma.xres - 1, 0);
184 bottom = PIXADDR(0, lcd_dma.yres - 1);
185 ei = PIXSTEP(1, 0, 0, 0);
186 fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
187 }
188 en = lcd_dma.xres;
189 fn = lcd_dma.yres;
190 break;
191 case 90:
192 if (!lcd_dma.mirror) {
193 top = PIXADDR(0, lcd_dma.yres - 1);
194 bottom = PIXADDR(lcd_dma.xres - 1, 0);
195 ei = PIXSTEP(0, 1, 0, 0);
196 fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
197 } else {
198 top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
199 bottom = PIXADDR(0, 0);
200 ei = PIXSTEP(0, 1, 0, 0);
201 fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
202 }
203 en = lcd_dma.yres;
204 fn = lcd_dma.xres;
205 break;
206 case 180:
207 if (!lcd_dma.mirror) {
208 top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
209 bottom = PIXADDR(0, 0);
210 ei = PIXSTEP(1, 0, 0, 0);
211 fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
212 } else {
213 top = PIXADDR(0, lcd_dma.yres - 1);
214 bottom = PIXADDR(lcd_dma.xres - 1, 0);
215 ei = PIXSTEP(0, 0, 1, 0);
216 fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
217 }
218 en = lcd_dma.xres;
219 fn = lcd_dma.yres;
220 break;
221 case 270:
222 if (!lcd_dma.mirror) {
223 top = PIXADDR(lcd_dma.xres - 1, 0);
224 bottom = PIXADDR(0, lcd_dma.yres - 1);
225 ei = PIXSTEP(0, 0, 0, 1);
226 fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
227 } else {
228 top = PIXADDR(0, 0);
229 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
230 ei = PIXSTEP(0, 0, 0, 1);
231 fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
232 }
233 en = lcd_dma.yres;
234 fn = lcd_dma.xres;
235 break;
236 default:
237 BUG();
238 return; /* Suppress warning about uninitialized vars */
239 }
240
241 if (cpu_is_omap15xx()) {
242 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
243 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
244 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
245 omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
246
247 return;
248 }
249
250 /* 1610 regs */
251 omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
252 omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
253 omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
254 omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
255
256 omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
257 omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
258
259 w = omap_readw(OMAP1610_DMA_LCD_CSDP);
260 w &= ~0x03;
261 w |= lcd_dma.data_type;
262 omap_writew(w, OMAP1610_DMA_LCD_CSDP);
263
264 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
265 /* Always set the source port as SDRAM for now*/
266 w &= ~(0x03 << 6);
267 if (lcd_dma.callback != NULL)
268 w |= 1 << 1; /* Block interrupt enable */
269 else
270 w &= ~(1 << 1);
271 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
272
273 if (!(lcd_dma.rotate || lcd_dma.mirror ||
274 lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
275 return;
276
277 w = omap_readw(OMAP1610_DMA_LCD_CCR);
278 /* Set the double-indexed addressing mode */
279 w |= (0x03 << 12);
280 omap_writew(w, OMAP1610_DMA_LCD_CCR);
281
282 omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
283 omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
284 omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
285 }
286
287 static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
288 {
289 u16 w;
290
291 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
292 if (unlikely(!(w & (1 << 3)))) {
293 printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
294 return IRQ_NONE;
295 }
296 /* Ack the IRQ */
297 w |= (1 << 3);
298 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
299 lcd_dma.active = 0;
300 if (lcd_dma.callback != NULL)
301 lcd_dma.callback(w, lcd_dma.cb_data);
302
303 return IRQ_HANDLED;
304 }
305
306 int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
307 void *data)
308 {
309 spin_lock_irq(&lcd_dma.lock);
310 if (lcd_dma.reserved) {
311 spin_unlock_irq(&lcd_dma.lock);
312 printk(KERN_ERR "LCD DMA channel already reserved\n");
313 BUG();
314 return -EBUSY;
315 }
316 lcd_dma.reserved = 1;
317 spin_unlock_irq(&lcd_dma.lock);
318 lcd_dma.callback = callback;
319 lcd_dma.cb_data = data;
320 lcd_dma.active = 0;
321 lcd_dma.single_transfer = 0;
322 lcd_dma.rotate = 0;
323 lcd_dma.vxres = 0;
324 lcd_dma.mirror = 0;
325 lcd_dma.xscale = 0;
326 lcd_dma.yscale = 0;
327 lcd_dma.ext_ctrl = 0;
328 lcd_dma.src_port = 0;
329
330 return 0;
331 }
332 EXPORT_SYMBOL(omap_request_lcd_dma);
333
334 void omap_free_lcd_dma(void)
335 {
336 spin_lock(&lcd_dma.lock);
337 if (!lcd_dma.reserved) {
338 spin_unlock(&lcd_dma.lock);
339 printk(KERN_ERR "LCD DMA is not reserved\n");
340 BUG();
341 return;
342 }
343 if (!cpu_is_omap15xx())
344 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
345 OMAP1610_DMA_LCD_CCR);
346 lcd_dma.reserved = 0;
347 spin_unlock(&lcd_dma.lock);
348 }
349 EXPORT_SYMBOL(omap_free_lcd_dma);
350
351 void omap_enable_lcd_dma(void)
352 {
353 u16 w;
354
355 /*
356 * Set the Enable bit only if an external controller is
357 * connected. Otherwise the OMAP internal controller will
358 * start the transfer when it gets enabled.
359 */
360 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
361 return;
362
363 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
364 w |= 1 << 8;
365 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
366
367 lcd_dma.active = 1;
368
369 w = omap_readw(OMAP1610_DMA_LCD_CCR);
370 w |= 1 << 7;
371 omap_writew(w, OMAP1610_DMA_LCD_CCR);
372 }
373 EXPORT_SYMBOL(omap_enable_lcd_dma);
374
375 void omap_setup_lcd_dma(void)
376 {
377 BUG_ON(lcd_dma.active);
378 if (!cpu_is_omap15xx()) {
379 /* Set some reasonable defaults */
380 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
381 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
382 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
383 }
384 set_b1_regs();
385 if (!cpu_is_omap15xx()) {
386 u16 w;
387
388 w = omap_readw(OMAP1610_DMA_LCD_CCR);
389 /*
390 * If DMA was already active set the end_prog bit to have
391 * the programmed register set loaded into the active
392 * register set.
393 */
394 w |= 1 << 11; /* End_prog */
395 if (!lcd_dma.single_transfer)
396 w |= (3 << 8); /* Auto_init, repeat */
397 omap_writew(w, OMAP1610_DMA_LCD_CCR);
398 }
399 }
400 EXPORT_SYMBOL(omap_setup_lcd_dma);
401
402 void omap_stop_lcd_dma(void)
403 {
404 u16 w;
405
406 lcd_dma.active = 0;
407 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
408 return;
409
410 w = omap_readw(OMAP1610_DMA_LCD_CCR);
411 w &= ~(1 << 7);
412 omap_writew(w, OMAP1610_DMA_LCD_CCR);
413
414 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
415 w &= ~(1 << 8);
416 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
417 }
418 EXPORT_SYMBOL(omap_stop_lcd_dma);
419
420 static int __init omap_init_lcd_dma(void)
421 {
422 int r;
423
424 if (!cpu_class_is_omap1())
425 return -ENODEV;
426
427 if (cpu_is_omap16xx()) {
428 u16 w;
429
430 /* this would prevent OMAP sleep */
431 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
432 w &= ~(1 << 8);
433 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
434 }
435
436 spin_lock_init(&lcd_dma.lock);
437
438 r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
439 "LCD DMA", NULL);
440 if (r != 0)
441 pr_err("unable to request IRQ for LCD DMA (error %d)\n", r);
442
443 return r;
444 }
445
446 arch_initcall(omap_init_lcd_dma);
447