arch/arm/mach-omap1/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap1/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20
  21 #include <mach/irqs.h>
  22 #include <plat/dma.h>
  23 #include <plat/mux.h>
  24 #include <plat/cpu.h>
  25 #include <plat/mcbsp.h>
  26 #include <plat/dsp_common.h>
  27
  28 #define DPS_RSTCT2_PER_EN       (1 << 0)
  29 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
  30
  31 static int dsp_use;
  32 static struct clk *api_clk;
  33 static struct clk *dsp_clk;
  34
  35 static void omap1_mcbsp_request(unsigned int id)
  36 {
  37         /*
  38          * On 1510, 1610 and 1710, McBSP1 and McBSP3
  39          * are DSP public peripherals.
  40          */
  41         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  42                 if (dsp_use++ == 0) {
  43                         api_clk = clk_get(NULL, "api_ck");
  44                         dsp_clk = clk_get(NULL, "dsp_ck");
  45                         if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
  46                                 clk_enable(api_clk);
  47                                 clk_enable(dsp_clk);
  48
  49                                 omap_dsp_request_mem();
  50                                 /*
  51                                  * DSP external peripheral reset
  52                                  * FIXME: This should be moved to dsp code
  53                                  */
  54                                 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
  55                                                 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
  56                         }
  57                 }
  58         }
  59 }
  60
  61 static void omap1_mcbsp_free(unsigned int id)
  62 {
  63         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  64                 if (--dsp_use == 0) {
  65                         omap_dsp_release_mem();
  66                         if (!IS_ERR(api_clk)) {
  67                                 clk_disable(api_clk);
  68                                 clk_put(api_clk);
  69                         }
  70                         if (!IS_ERR(dsp_clk)) {
  71                                 clk_disable(dsp_clk);
  72                                 clk_put(dsp_clk);
  73                         }
  74                 }
  75         }
  76 }
  77
  78 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
  79         .request        = omap1_mcbsp_request,
  80         .free           = omap1_mcbsp_free,
  81 };
  82
  83 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
  84 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
  85         {
  86                 .phys_base      = OMAP7XX_MCBSP1_BASE,
  87                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
  88                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
  89                 .rx_irq         = INT_7XX_McBSP1RX,
  90                 .tx_irq         = INT_7XX_McBSP1TX,
  91                 .ops            = &omap1_mcbsp_ops,
  92         },
  93         {
  94                 .phys_base      = OMAP7XX_MCBSP2_BASE,
  95                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
  96                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
  97                 .rx_irq         = INT_7XX_McBSP2RX,
  98                 .tx_irq         = INT_7XX_McBSP2TX,
  99                 .ops            = &omap1_mcbsp_ops,
 100         },
 101 };
 102 #define OMAP7XX_MCBSP_PDATA_SZ          ARRAY_SIZE(omap7xx_mcbsp_pdata)
 103 #define OMAP7XX_MCBSP_REG_NUM           (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 104 #else
 105 #define omap7xx_mcbsp_pdata             NULL
 106 #define OMAP7XX_MCBSP_PDATA_SZ          0
 107 #define OMAP7XX_MCBSP_REG_NUM           0
 108 #endif
 109
 110 #ifdef CONFIG_ARCH_OMAP15XX
 111 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 112         {
 113                 .phys_base      = OMAP1510_MCBSP1_BASE,
 114                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
 115                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
 116                 .rx_irq         = INT_McBSP1RX,
 117                 .tx_irq         = INT_McBSP1TX,
 118                 .ops            = &omap1_mcbsp_ops,
 119         },
 120         {
 121                 .phys_base      = OMAP1510_MCBSP2_BASE,
 122                 .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
 123                 .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
 124                 .rx_irq         = INT_1510_SPI_RX,
 125                 .tx_irq         = INT_1510_SPI_TX,
 126                 .ops            = &omap1_mcbsp_ops,
 127         },
 128         {
 129                 .phys_base      = OMAP1510_MCBSP3_BASE,
 130                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
 131                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 132                 .rx_irq         = INT_McBSP3RX,
 133                 .tx_irq         = INT_McBSP3TX,
 134                 .ops            = &omap1_mcbsp_ops,
 135         },
 136 };
 137 #define OMAP15XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap15xx_mcbsp_pdata)
 138 #define OMAP15XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 139 #else
 140 #define omap15xx_mcbsp_pdata            NULL
 141 #define OMAP15XX_MCBSP_PDATA_SZ         0
 142 #define OMAP15XX_MCBSP_REG_NUM          0
 143 #endif
 144
 145 #ifdef CONFIG_ARCH_OMAP16XX
 146 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 147         {
 148                 .phys_base      = OMAP1610_MCBSP1_BASE,
 149                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
 150                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
 151                 .rx_irq         = INT_McBSP1RX,
 152                 .tx_irq         = INT_McBSP1TX,
 153                 .ops            = &omap1_mcbsp_ops,
 154         },
 155         {
 156                 .phys_base      = OMAP1610_MCBSP2_BASE,
 157                 .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
 158                 .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
 159                 .rx_irq         = INT_1610_McBSP2_RX,
 160                 .tx_irq         = INT_1610_McBSP2_TX,
 161                 .ops            = &omap1_mcbsp_ops,
 162         },
 163         {
 164                 .phys_base      = OMAP1610_MCBSP3_BASE,
 165                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
 166                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 167                 .rx_irq         = INT_McBSP3RX,
 168                 .tx_irq         = INT_McBSP3TX,
 169                 .ops            = &omap1_mcbsp_ops,
 170         },
 171 };
 172 #define OMAP16XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap16xx_mcbsp_pdata)
 173 #define OMAP16XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 174 #else
 175 #define omap16xx_mcbsp_pdata            NULL
 176 #define OMAP16XX_MCBSP_PDATA_SZ         0
 177 #define OMAP16XX_MCBSP_REG_NUM          0
 178 #endif
 179
 180 int __init omap1_mcbsp_init(void)
 181 {
 182         if (cpu_is_omap7xx()) {
 183                 omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ;
 184                 omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16);
 185         } else if (cpu_is_omap15xx()) {
 186                 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
 187                 omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16);
 188         } else if (cpu_is_omap16xx()) {
 189                 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
 190                 omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16);
 191         }
 192
 193         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 194                                                                 GFP_KERNEL);
 195         if (!mcbsp_ptr)
 196                 return -ENOMEM;
 197
 198         if (cpu_is_omap7xx())
 199                 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata,
 200                                                 OMAP7XX_MCBSP_PDATA_SZ);
 201
 202         if (cpu_is_omap15xx())
 203                 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
 204                                                 OMAP15XX_MCBSP_PDATA_SZ);
 205
 206         if (cpu_is_omap16xx())
 207                 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
 208                                                 OMAP16XX_MCBSP_PDATA_SZ);
 209
 210         return omap_mcbsp_init();
 211 }
 212
 213 arch_initcall(omap1_mcbsp_init);