arch/arm/mach-omap2/board-flash.c

   1 /*
   2  * board-flash.c
   3  * Modified from mach-omap2/board-3430sdp-flash.c
   4  *
   5  * Copyright (C) 2009 Nokia Corporation
   6  * Copyright (C) 2009 Texas Instruments
   7  *
   8  * Vimal Singh <vimalsingh@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/io.h>
  19
  20 #include <plat/cpu.h>
  21 #include <plat/gpmc.h>
  22 #include <linux/platform_data/mtd-nand-omap2.h>
  23 #include <linux/platform_data/mtd-onenand-omap2.h>
  24 #include <plat/tc.h>
  25
  26 #include "common.h"
  27 #include "board-flash.h"
  28 #include "gpmc-onenand.h"
  29 #include "gpmc-nand.h"
  30
  31 #define REG_FPGA_REV                    0x10
  32 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
  33 #define MAX_SUPPORTED_GPMC_CONFIG       3
  34
  35 #define DEBUG_BASE              0x08000000 /* debug board */
  36
  37 /* various memory sizes */
  38 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
  39 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
  40
  41 static struct physmap_flash_data board_nor_data = {
  42         .width          = 2,
  43 };
  44
  45 static struct resource board_nor_resource = {
  46         .flags          = IORESOURCE_MEM,
  47 };
  48
  49 static struct platform_device board_nor_device = {
  50         .name           = "physmap-flash",
  51         .id             = 0,
  52         .dev            = {
  53                         .platform_data = &board_nor_data,
  54         },
  55         .num_resources  = 1,
  56         .resource       = &board_nor_resource,
  57 };
  58
  59 static void
  60 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  61 {
  62         int err;
  63
  64         board_nor_data.parts    = nor_parts;
  65         board_nor_data.nr_parts = nr_parts;
  66
  67         /* Configure start address and size of NOR device */
  68         if (omap_rev() >= OMAP3430_REV_ES1_0) {
  69                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  70                                 (unsigned long *)&board_nor_resource.start);
  71                 board_nor_resource.end = board_nor_resource.start
  72                                         + FLASH_SIZE_SDPV2 - 1;
  73         } else {
  74                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  75                                 (unsigned long *)&board_nor_resource.start);
  76                 board_nor_resource.end = board_nor_resource.start
  77                                         + FLASH_SIZE_SDPV1 - 1;
  78         }
  79         if (err < 0) {
  80                 pr_err("NOR: Can't request GPMC CS\n");
  81                 return;
  82         }
  83         if (platform_device_register(&board_nor_device) < 0)
  84                 pr_err("Unable to register NOR device\n");
  85 }
  86
  87 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  88                 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  89 static struct omap_onenand_platform_data board_onenand_data = {
  90         .dma_channel    = -1,   /* disable DMA in OMAP OneNAND driver */
  91 };
  92
  93 void
  94 __init board_onenand_init(struct mtd_partition *onenand_parts,
  95                                 u8 nr_parts, u8 cs)
  96 {
  97         board_onenand_data.cs           = cs;
  98         board_onenand_data.parts        = onenand_parts;
  99         board_onenand_data.nr_parts     = nr_parts;
 100
 101         gpmc_onenand_init(&board_onenand_data);
 102 }
 103 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 104
 105 #if defined(CONFIG_MTD_NAND_OMAP2) || \
 106                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 107
 108 /* Note that all values in this struct are in nanoseconds */
 109 struct gpmc_timings nand_default_timings[1] = {
 110         {
 111                 .sync_clk = 0,
 112
 113                 .cs_on = 0,
 114                 .cs_rd_off = 36,
 115                 .cs_wr_off = 36,
 116
 117                 .adv_on = 6,
 118                 .adv_rd_off = 24,
 119                 .adv_wr_off = 36,
 120
 121                 .we_off = 30,
 122                 .oe_off = 48,
 123
 124                 .access = 54,
 125                 .rd_cycle = 72,
 126                 .wr_cycle = 72,
 127
 128                 .wr_access = 30,
 129                 .wr_data_mux_bus = 0,
 130         },
 131 };
 132
 133 static struct omap_nand_platform_data board_nand_data;
 134
 135 void
 136 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
 137                                 int nand_type, struct gpmc_timings *gpmc_t)
 138 {
 139         board_nand_data.cs              = cs;
 140         board_nand_data.parts           = nand_parts;
 141         board_nand_data.nr_parts        = nr_parts;
 142         board_nand_data.devsize         = nand_type;
 143
 144         board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
 145         gpmc_nand_init(&board_nand_data, gpmc_t);
 146 }
 147 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 148
 149 /**
 150  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
 151  * the various cs values.
 152  */
 153 static u8 get_gpmc0_type(void)
 154 {
 155         u8 cs = 0;
 156         void __iomem *fpga_map_addr;
 157
 158         fpga_map_addr = ioremap(DEBUG_BASE, 4096);
 159         if (!fpga_map_addr)
 160                 return -ENOMEM;
 161
 162         if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
 163                 /* we dont have an DEBUG FPGA??? */
 164                 /* Depend on #defines!! default to strata boot return param */
 165                 goto unmap;
 166
 167         /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
 168         cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
 169
 170         /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
 171         if (omap_rev() >= OMAP3430_REV_ES1_0)
 172                 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
 173                 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
 174                         ((cs & 2) << 1) | ((cs & 1) << 3);
 175         else
 176                 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
 177                 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
 178 unmap:
 179         iounmap(fpga_map_addr);
 180         return cs;
 181 }
 182
 183 /**
 184  * board_flash_init - Identify devices connected to GPMC and register.
 185  *
 186  * @return - void.
 187  */
 188 void __init board_flash_init(struct flash_partitions partition_info[],
 189                         char chip_sel_board[][GPMC_CS_NUM], int nand_type)
 190 {
 191         u8              cs = 0;
 192         u8              norcs = GPMC_CS_NUM + 1;
 193         u8              nandcs = GPMC_CS_NUM + 1;
 194         u8              onenandcs = GPMC_CS_NUM + 1;
 195         u8              idx;
 196         unsigned char   *config_sel = NULL;
 197
 198         /* REVISIT: Is this return correct idx for 2430 SDP?
 199          * for which cs configuration matches for 2430 SDP?
 200          */
 201         idx = get_gpmc0_type();
 202         if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
 203                 pr_err("%s: Invalid chip select: %d\n", __func__, cs);
 204                 return;
 205         }
 206         config_sel = (unsigned char *)(chip_sel_board[idx]);
 207
 208         while (cs < GPMC_CS_NUM) {
 209                 switch (config_sel[cs]) {
 210                 case PDC_NOR:
 211                         if (norcs > GPMC_CS_NUM)
 212                                 norcs = cs;
 213                         break;
 214                 case PDC_NAND:
 215                         if (nandcs > GPMC_CS_NUM)
 216                                 nandcs = cs;
 217                         break;
 218                 case PDC_ONENAND:
 219                         if (onenandcs > GPMC_CS_NUM)
 220                                 onenandcs = cs;
 221                         break;
 222                 }
 223                 cs++;
 224         }
 225
 226         if (norcs > GPMC_CS_NUM)
 227                 pr_err("NOR: Unable to find configuration in GPMC\n");
 228         else
 229                 board_nor_init(partition_info[0].parts,
 230                                 partition_info[0].nr_parts, norcs);
 231
 232         if (onenandcs > GPMC_CS_NUM)
 233                 pr_err("OneNAND: Unable to find configuration in GPMC\n");
 234         else
 235                 board_onenand_init(partition_info[1].parts,
 236                                         partition_info[1].nr_parts, onenandcs);
 237
 238         if (nandcs > GPMC_CS_NUM)
 239                 pr_err("NAND: Unable to find configuration in GPMC\n");
 240         else
 241                 board_nand_init(partition_info[2].parts,
 242                         partition_info[2].nr_parts, nandcs,
 243                         nand_type, nand_default_timings);
 244 }