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1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/bootmem.h>
145
146 #include <asm/system_misc.h>
147
148 #include "clock.h"
149 #include "omap_hwmod.h"
150
151 #include "soc.h"
152 #include "common.h"
153 #include "clockdomain.h"
154 #include "powerdomain.h"
155 #include "cm2xxx.h"
156 #include "cm3xxx.h"
157 #include "cm33xx.h"
158 #include "prm.h"
159 #include "prm3xxx.h"
160 #include "prm44xx.h"
161 #include "prm33xx.h"
162 #include "prminst44xx.h"
163 #include "pm.h"
164
165 /* Name of the OMAP hwmod for the MPU */
166 #define MPU_INITIATOR_NAME "mpu"
167
168 /*
169 * Number of struct omap_hwmod_link records per struct
170 * omap_hwmod_ocp_if record (master->slave and slave->master)
171 */
172 #define LINKS_PER_OCP_IF 2
173
174 /*
175 * Address offset (in bytes) between the reset control and the reset
176 * status registers: 4 bytes on OMAP4
177 */
178 #define OMAP4_RST_CTRL_ST_OFFSET 4
179
180 /*
181 * Maximum length for module clock handle names
182 */
183 #define MOD_CLK_MAX_NAME_LEN 32
184
185 /**
186 * struct clkctrl_provider - clkctrl provider mapping data
187 * @addr: base address for the provider
188 * @offset: base offset for the provider
189 * @clkdm: base clockdomain for provider
190 * @node: device node associated with the provider
191 * @link: list link
192 */
193 struct clkctrl_provider {
194 u32 addr;
195 u16 offset;
196 struct clockdomain *clkdm;
197 struct device_node *node;
198 struct list_head link;
199 };
200
201 static LIST_HEAD(clkctrl_providers);
202
203 /**
204 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
205 * @enable_module: function to enable a module (via MODULEMODE)
206 * @disable_module: function to disable a module (via MODULEMODE)
207 *
208 * XXX Eventually this functionality will be hidden inside the PRM/CM
209 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
210 * conditionals in this code.
211 */
212 struct omap_hwmod_soc_ops {
213 void (*enable_module)(struct omap_hwmod *oh);
214 int (*disable_module)(struct omap_hwmod *oh);
215 int (*wait_target_ready)(struct omap_hwmod *oh);
216 int (*assert_hardreset)(struct omap_hwmod *oh,
217 struct omap_hwmod_rst_info *ohri);
218 int (*deassert_hardreset)(struct omap_hwmod *oh,
219 struct omap_hwmod_rst_info *ohri);
220 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
221 struct omap_hwmod_rst_info *ohri);
222 int (*init_clkdm)(struct omap_hwmod *oh);
223 void (*update_context_lost)(struct omap_hwmod *oh);
224 int (*get_context_lost)(struct omap_hwmod *oh);
225 int (*disable_direct_prcm)(struct omap_hwmod *oh);
226 u32 (*xlate_clkctrl)(struct omap_hwmod *oh,
227 struct clkctrl_provider *provider);
228 };
229
230 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
231 static struct omap_hwmod_soc_ops soc_ops;
232
233 /* omap_hwmod_list contains all registered struct omap_hwmods */
234 static LIST_HEAD(omap_hwmod_list);
235
236 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
237 static struct omap_hwmod *mpu_oh;
238
239 /* inited: set to true once the hwmod code is initialized */
240 static bool inited;
241
242 /* Private functions */
243
244 /**
245 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
246 * @oh: struct omap_hwmod *
247 *
248 * Load the current value of the hwmod OCP_SYSCONFIG register into the
249 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
250 * OCP_SYSCONFIG register or 0 upon success.
251 */
252 static int _update_sysc_cache(struct omap_hwmod *oh)
253 {
254 if (!oh->class->sysc) {
255 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
256 return -EINVAL;
257 }
258
259 /* XXX ensure module interface clock is up */
260
261 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
262
263 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
264 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
265
266 return 0;
267 }
268
269 /**
270 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
271 * @v: OCP_SYSCONFIG value to write
272 * @oh: struct omap_hwmod *
273 *
274 * Write @v into the module class' OCP_SYSCONFIG register, if it has
275 * one. No return value.
276 */
277 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
278 {
279 if (!oh->class->sysc) {
280 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
281 return;
282 }
283
284 /* XXX ensure module interface clock is up */
285
286 /* Module might have lost context, always update cache and register */
287 oh->_sysc_cache = v;
288
289 /*
290 * Some IP blocks (such as RTC) require unlocking of IP before
291 * accessing its registers. If a function pointer is present
292 * to unlock, then call it before accessing sysconfig and
293 * call lock after writing sysconfig.
294 */
295 if (oh->class->unlock)
296 oh->class->unlock(oh);
297
298 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
299
300 if (oh->class->lock)
301 oh->class->lock(oh);
302 }
303
304 /**
305 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
306 * @oh: struct omap_hwmod *
307 * @standbymode: MIDLEMODE field bits
308 * @v: pointer to register contents to modify
309 *
310 * Update the master standby mode bits in @v to be @standbymode for
311 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
312 * upon error or 0 upon success.
313 */
314 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
315 u32 *v)
316 {
317 u32 mstandby_mask;
318 u8 mstandby_shift;
319
320 if (!oh->class->sysc ||
321 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
322 return -EINVAL;
323
324 if (!oh->class->sysc->sysc_fields) {
325 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
326 return -EINVAL;
327 }
328
329 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
330 mstandby_mask = (0x3 << mstandby_shift);
331
332 *v &= ~mstandby_mask;
333 *v |= __ffs(standbymode) << mstandby_shift;
334
335 return 0;
336 }
337
338 /**
339 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
340 * @oh: struct omap_hwmod *
341 * @idlemode: SIDLEMODE field bits
342 * @v: pointer to register contents to modify
343 *
344 * Update the slave idle mode bits in @v to be @idlemode for the @oh
345 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
346 * or 0 upon success.
347 */
348 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
349 {
350 u32 sidle_mask;
351 u8 sidle_shift;
352
353 if (!oh->class->sysc ||
354 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
355 return -EINVAL;
356
357 if (!oh->class->sysc->sysc_fields) {
358 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
359 return -EINVAL;
360 }
361
362 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
363 sidle_mask = (0x3 << sidle_shift);
364
365 *v &= ~sidle_mask;
366 *v |= __ffs(idlemode) << sidle_shift;
367
368 return 0;
369 }
370
371 /**
372 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
373 * @oh: struct omap_hwmod *
374 * @clockact: CLOCKACTIVITY field bits
375 * @v: pointer to register contents to modify
376 *
377 * Update the clockactivity mode bits in @v to be @clockact for the
378 * @oh hwmod. Used for additional powersaving on some modules. Does
379 * not write to the hardware. Returns -EINVAL upon error or 0 upon
380 * success.
381 */
382 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
383 {
384 u32 clkact_mask;
385 u8 clkact_shift;
386
387 if (!oh->class->sysc ||
388 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
389 return -EINVAL;
390
391 if (!oh->class->sysc->sysc_fields) {
392 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
393 return -EINVAL;
394 }
395
396 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
397 clkact_mask = (0x3 << clkact_shift);
398
399 *v &= ~clkact_mask;
400 *v |= clockact << clkact_shift;
401
402 return 0;
403 }
404
405 /**
406 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
407 * @oh: struct omap_hwmod *
408 * @v: pointer to register contents to modify
409 *
410 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
411 * error or 0 upon success.
412 */
413 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
414 {
415 u32 softrst_mask;
416
417 if (!oh->class->sysc ||
418 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
419 return -EINVAL;
420
421 if (!oh->class->sysc->sysc_fields) {
422 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
423 return -EINVAL;
424 }
425
426 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
427
428 *v |= softrst_mask;
429
430 return 0;
431 }
432
433 /**
434 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
435 * @oh: struct omap_hwmod *
436 * @v: pointer to register contents to modify
437 *
438 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
439 * error or 0 upon success.
440 */
441 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
442 {
443 u32 softrst_mask;
444
445 if (!oh->class->sysc ||
446 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
447 return -EINVAL;
448
449 if (!oh->class->sysc->sysc_fields) {
450 WARN(1,
451 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
452 oh->name);
453 return -EINVAL;
454 }
455
456 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
457
458 *v &= ~softrst_mask;
459
460 return 0;
461 }
462
463 /**
464 * _wait_softreset_complete - wait for an OCP softreset to complete
465 * @oh: struct omap_hwmod * to wait on
466 *
467 * Wait until the IP block represented by @oh reports that its OCP
468 * softreset is complete. This can be triggered by software (see
469 * _ocp_softreset()) or by hardware upon returning from off-mode (one
470 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
471 * microseconds. Returns the number of microseconds waited.
472 */
473 static int _wait_softreset_complete(struct omap_hwmod *oh)
474 {
475 struct omap_hwmod_class_sysconfig *sysc;
476 u32 softrst_mask;
477 int c = 0;
478
479 sysc = oh->class->sysc;
480
481 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
482 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
483 & SYSS_RESETDONE_MASK),
484 MAX_MODULE_SOFTRESET_WAIT, c);
485 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
486 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
487 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
488 & softrst_mask),
489 MAX_MODULE_SOFTRESET_WAIT, c);
490 }
491
492 return c;
493 }
494
495 /**
496 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
497 * @oh: struct omap_hwmod *
498 *
499 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
500 * of some modules. When the DMA must perform read/write accesses, the
501 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
502 * for power management, software must set the DMADISABLE bit back to 1.
503 *
504 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
505 * error or 0 upon success.
506 */
507 static int _set_dmadisable(struct omap_hwmod *oh)
508 {
509 u32 v;
510 u32 dmadisable_mask;
511
512 if (!oh->class->sysc ||
513 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
514 return -EINVAL;
515
516 if (!oh->class->sysc->sysc_fields) {
517 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
518 return -EINVAL;
519 }
520
521 /* clocks must be on for this operation */
522 if (oh->_state != _HWMOD_STATE_ENABLED) {
523 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
524 return -EINVAL;
525 }
526
527 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
528
529 v = oh->_sysc_cache;
530 dmadisable_mask =
531 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
532 v |= dmadisable_mask;
533 _write_sysconfig(v, oh);
534
535 return 0;
536 }
537
538 /**
539 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
540 * @oh: struct omap_hwmod *
541 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
542 * @v: pointer to register contents to modify
543 *
544 * Update the module autoidle bit in @v to be @autoidle for the @oh
545 * hwmod. The autoidle bit controls whether the module can gate
546 * internal clocks automatically when it isn't doing anything; the
547 * exact function of this bit varies on a per-module basis. This
548 * function does not write to the hardware. Returns -EINVAL upon
549 * error or 0 upon success.
550 */
551 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
552 u32 *v)
553 {
554 u32 autoidle_mask;
555 u8 autoidle_shift;
556
557 if (!oh->class->sysc ||
558 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
559 return -EINVAL;
560
561 if (!oh->class->sysc->sysc_fields) {
562 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
563 return -EINVAL;
564 }
565
566 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
567 autoidle_mask = (0x1 << autoidle_shift);
568
569 *v &= ~autoidle_mask;
570 *v |= autoidle << autoidle_shift;
571
572 return 0;
573 }
574
575 /**
576 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
577 * @oh: struct omap_hwmod *
578 *
579 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
580 * upon error or 0 upon success.
581 */
582 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
583 {
584 if (!oh->class->sysc ||
585 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
586 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
587 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
588 return -EINVAL;
589
590 if (!oh->class->sysc->sysc_fields) {
591 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
592 return -EINVAL;
593 }
594
595 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
596 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
597
598 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
599 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
600 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
601 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
602
603 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
604
605 return 0;
606 }
607
608 /**
609 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
610 * @oh: struct omap_hwmod *
611 *
612 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
613 * upon error or 0 upon success.
614 */
615 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
616 {
617 if (!oh->class->sysc ||
618 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
619 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
620 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
621 return -EINVAL;
622
623 if (!oh->class->sysc->sysc_fields) {
624 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
625 return -EINVAL;
626 }
627
628 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
629 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
630
631 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
632 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
633 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
634 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
635
636 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
637
638 return 0;
639 }
640
641 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
642 {
643 struct clk_hw_omap *clk;
644
645 if (oh->clkdm) {
646 return oh->clkdm;
647 } else if (oh->_clk) {
648 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
649 return NULL;
650 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
651 return clk->clkdm;
652 }
653 return NULL;
654 }
655
656 /**
657 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
658 * @oh: struct omap_hwmod *
659 *
660 * Prevent the hardware module @oh from entering idle while the
661 * hardare module initiator @init_oh is active. Useful when a module
662 * will be accessed by a particular initiator (e.g., if a module will
663 * be accessed by the IVA, there should be a sleepdep between the IVA
664 * initiator and the module). Only applies to modules in smart-idle
665 * mode. If the clockdomain is marked as not needing autodeps, return
666 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
667 * passes along clkdm_add_sleepdep() value upon success.
668 */
669 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
670 {
671 struct clockdomain *clkdm, *init_clkdm;
672
673 clkdm = _get_clkdm(oh);
674 init_clkdm = _get_clkdm(init_oh);
675
676 if (!clkdm || !init_clkdm)
677 return -EINVAL;
678
679 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
680 return 0;
681
682 return clkdm_add_sleepdep(clkdm, init_clkdm);
683 }
684
685 /**
686 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
687 * @oh: struct omap_hwmod *
688 *
689 * Allow the hardware module @oh to enter idle while the hardare
690 * module initiator @init_oh is active. Useful when a module will not
691 * be accessed by a particular initiator (e.g., if a module will not
692 * be accessed by the IVA, there should be no sleepdep between the IVA
693 * initiator and the module). Only applies to modules in smart-idle
694 * mode. If the clockdomain is marked as not needing autodeps, return
695 * 0 without doing anything. Returns -EINVAL upon error or passes
696 * along clkdm_del_sleepdep() value upon success.
697 */
698 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
699 {
700 struct clockdomain *clkdm, *init_clkdm;
701
702 clkdm = _get_clkdm(oh);
703 init_clkdm = _get_clkdm(init_oh);
704
705 if (!clkdm || !init_clkdm)
706 return -EINVAL;
707
708 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
709 return 0;
710
711 return clkdm_del_sleepdep(clkdm, init_clkdm);
712 }
713
714 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
715 { .compatible = "ti,clkctrl" },
716 { }
717 };
718
719 static int _match_clkdm(struct clockdomain *clkdm, void *user)
720 {
721 struct clkctrl_provider *provider = user;
722
723 if (clkdm_xlate_address(clkdm) == provider->addr) {
724 pr_debug("%s: Matched clkdm %s for addr %x (%s)\n", __func__,
725 clkdm->name, provider->addr,
726 provider->node->parent->name);
727 provider->clkdm = clkdm;
728
729 return -1;
730 }
731
732 return 0;
733 }
734
735 static int _setup_clkctrl_provider(struct device_node *np)
736 {
737 const __be32 *addrp;
738 struct clkctrl_provider *provider;
739
740 provider = memblock_virt_alloc(sizeof(*provider), 0);
741 if (!provider)
742 return -ENOMEM;
743
744 addrp = of_get_address(np, 0, NULL, NULL);
745 provider->addr = (u32)of_translate_address(np, addrp);
746 provider->offset = provider->addr & 0xff;
747 provider->addr &= ~0xff;
748 provider->node = np;
749
750 clkdm_for_each(_match_clkdm, provider);
751
752 if (!provider->clkdm) {
753 pr_err("%s: nothing matched for node %s (%x)\n",
754 __func__, np->parent->name, provider->addr);
755 memblock_free_early(__pa(provider), sizeof(*provider));
756 return -EINVAL;
757 }
758
759 list_add(&provider->link, &clkctrl_providers);
760
761 return 0;
762 }
763
764 static int _init_clkctrl_providers(void)
765 {
766 struct device_node *np;
767 int ret = 0;
768
769 for_each_matching_node(np, ti_clkctrl_match_table) {
770 ret = _setup_clkctrl_provider(np);
771 if (ret)
772 break;
773 }
774
775 return ret;
776 }
777
778 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh,
779 struct clkctrl_provider *provider)
780 {
781 return oh->prcm.omap4.clkctrl_offs -
782 provider->offset - provider->clkdm->clkdm_offs;
783 }
784
785 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
786 {
787 struct clkctrl_provider *provider;
788 struct clk *clk;
789
790 if (!soc_ops.xlate_clkctrl)
791 return NULL;
792
793 list_for_each_entry(provider, &clkctrl_providers, link) {
794 if (provider->clkdm == oh->clkdm) {
795 struct of_phandle_args clkspec;
796
797 clkspec.np = provider->node;
798 clkspec.args_count = 2;
799 clkspec.args[0] = soc_ops.xlate_clkctrl(oh, provider);
800 clkspec.args[1] = 0;
801
802 clk = of_clk_get_from_provider(&clkspec);
803
804 return clk;
805 }
806 }
807
808 return NULL;
809 }
810
811 /**
812 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
813 * @oh: struct omap_hwmod *
814 *
815 * Called from _init_clocks(). Populates the @oh _clk (main
816 * functional clock pointer) if a clock matching the hwmod name is found,
817 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
818 */
819 static int _init_main_clk(struct omap_hwmod *oh)
820 {
821 int ret = 0;
822 struct clk *clk = NULL;
823
824 clk = _lookup_clkctrl_clk(oh);
825
826 if (!IS_ERR_OR_NULL(clk)) {
827 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
828 __clk_get_name(clk), oh->name);
829 oh->main_clk = __clk_get_name(clk);
830 oh->_clk = clk;
831 soc_ops.disable_direct_prcm(oh);
832 } else {
833 if (!oh->main_clk)
834 return 0;
835
836 oh->_clk = clk_get(NULL, oh->main_clk);
837 }
838
839 if (IS_ERR(oh->_clk)) {
840 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
841 oh->name, oh->main_clk);
842 return -EINVAL;
843 }
844 /*
845 * HACK: This needs a re-visit once clk_prepare() is implemented
846 * to do something meaningful. Today its just a no-op.
847 * If clk_prepare() is used at some point to do things like
848 * voltage scaling etc, then this would have to be moved to
849 * some point where subsystems like i2c and pmic become
850 * available.
851 */
852 clk_prepare(oh->_clk);
853
854 if (!_get_clkdm(oh))
855 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
856 oh->name, oh->main_clk);
857
858 return ret;
859 }
860
861 /**
862 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
863 * @oh: struct omap_hwmod *
864 *
865 * Called from _init_clocks(). Populates the @oh OCP slave interface
866 * clock pointers. Returns 0 on success or -EINVAL on error.
867 */
868 static int _init_interface_clks(struct omap_hwmod *oh)
869 {
870 struct omap_hwmod_ocp_if *os;
871 struct clk *c;
872 int ret = 0;
873
874 list_for_each_entry(os, &oh->slave_ports, node) {
875 if (!os->clk)
876 continue;
877
878 c = clk_get(NULL, os->clk);
879 if (IS_ERR(c)) {
880 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
881 oh->name, os->clk);
882 ret = -EINVAL;
883 continue;
884 }
885 os->_clk = c;
886 /*
887 * HACK: This needs a re-visit once clk_prepare() is implemented
888 * to do something meaningful. Today its just a no-op.
889 * If clk_prepare() is used at some point to do things like
890 * voltage scaling etc, then this would have to be moved to
891 * some point where subsystems like i2c and pmic become
892 * available.
893 */
894 clk_prepare(os->_clk);
895 }
896
897 return ret;
898 }
899
900 /**
901 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
902 * @oh: struct omap_hwmod *
903 *
904 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
905 * clock pointers. Returns 0 on success or -EINVAL on error.
906 */
907 static int _init_opt_clks(struct omap_hwmod *oh)
908 {
909 struct omap_hwmod_opt_clk *oc;
910 struct clk *c;
911 int i;
912 int ret = 0;
913
914 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
915 c = clk_get(NULL, oc->clk);
916 if (IS_ERR(c)) {
917 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
918 oh->name, oc->clk);
919 ret = -EINVAL;
920 continue;
921 }
922 oc->_clk = c;
923 /*
924 * HACK: This needs a re-visit once clk_prepare() is implemented
925 * to do something meaningful. Today its just a no-op.
926 * If clk_prepare() is used at some point to do things like
927 * voltage scaling etc, then this would have to be moved to
928 * some point where subsystems like i2c and pmic become
929 * available.
930 */
931 clk_prepare(oc->_clk);
932 }
933
934 return ret;
935 }
936
937 static void _enable_optional_clocks(struct omap_hwmod *oh)
938 {
939 struct omap_hwmod_opt_clk *oc;
940 int i;
941
942 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
943
944 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
945 if (oc->_clk) {
946 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
947 __clk_get_name(oc->_clk));
948 clk_enable(oc->_clk);
949 }
950 }
951
952 static void _disable_optional_clocks(struct omap_hwmod *oh)
953 {
954 struct omap_hwmod_opt_clk *oc;
955 int i;
956
957 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
958
959 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
960 if (oc->_clk) {
961 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
962 __clk_get_name(oc->_clk));
963 clk_disable(oc->_clk);
964 }
965 }
966
967 /**
968 * _enable_clocks - enable hwmod main clock and interface clocks
969 * @oh: struct omap_hwmod *
970 *
971 * Enables all clocks necessary for register reads and writes to succeed
972 * on the hwmod @oh. Returns 0.
973 */
974 static int _enable_clocks(struct omap_hwmod *oh)
975 {
976 struct omap_hwmod_ocp_if *os;
977
978 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
979
980 if (oh->_clk)
981 clk_enable(oh->_clk);
982
983 list_for_each_entry(os, &oh->slave_ports, node) {
984 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
985 clk_enable(os->_clk);
986 }
987
988 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
989 _enable_optional_clocks(oh);
990
991 /* The opt clocks are controlled by the device driver. */
992
993 return 0;
994 }
995
996 /**
997 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
998 * @oh: struct omap_hwmod *
999 */
1000 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1001 {
1002 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1003 return true;
1004
1005 return false;
1006 }
1007
1008 /**
1009 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1010 * @oh: struct omap_hwmod *
1011 */
1012 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1013 {
1014 if (oh->prcm.omap4.clkctrl_offs)
1015 return true;
1016
1017 if (!oh->prcm.omap4.clkctrl_offs &&
1018 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1019 return true;
1020
1021 return false;
1022 }
1023
1024 /**
1025 * _disable_clocks - disable hwmod main clock and interface clocks
1026 * @oh: struct omap_hwmod *
1027 *
1028 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1029 */
1030 static int _disable_clocks(struct omap_hwmod *oh)
1031 {
1032 struct omap_hwmod_ocp_if *os;
1033
1034 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1035
1036 if (oh->_clk)
1037 clk_disable(oh->_clk);
1038
1039 list_for_each_entry(os, &oh->slave_ports, node) {
1040 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
1041 clk_disable(os->_clk);
1042 }
1043
1044 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1045 _disable_optional_clocks(oh);
1046
1047 /* The opt clocks are controlled by the device driver. */
1048
1049 return 0;
1050 }
1051
1052 /**
1053 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1054 * @oh: struct omap_hwmod *
1055 *
1056 * Enables the PRCM module mode related to the hwmod @oh.
1057 * No return value.
1058 */
1059 static void _omap4_enable_module(struct omap_hwmod *oh)
1060 {
1061 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1062 _omap4_clkctrl_managed_by_clkfwk(oh))
1063 return;
1064
1065 pr_debug("omap_hwmod: %s: %s: %d\n",
1066 oh->name, __func__, oh->prcm.omap4.modulemode);
1067
1068 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1069 oh->clkdm->prcm_partition,
1070 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1071 }
1072
1073 /**
1074 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1075 * @oh: struct omap_hwmod *
1076 *
1077 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1078 * does not have an IDLEST bit or if the module successfully enters
1079 * slave idle; otherwise, pass along the return value of the
1080 * appropriate *_cm*_wait_module_idle() function.
1081 */
1082 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1083 {
1084 if (!oh)
1085 return -EINVAL;
1086
1087 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1088 return 0;
1089
1090 if (oh->flags & HWMOD_NO_IDLEST)
1091 return 0;
1092
1093 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1094 return 0;
1095
1096 if (!_omap4_has_clkctrl_clock(oh))
1097 return 0;
1098
1099 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1100 oh->clkdm->cm_inst,
1101 oh->prcm.omap4.clkctrl_offs, 0);
1102 }
1103
1104 /**
1105 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1106 * @oh: struct omap_hwmod *oh
1107 *
1108 * Count and return the number of MPU IRQs associated with the hwmod
1109 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1110 * NULL.
1111 */
1112 static int _count_mpu_irqs(struct omap_hwmod *oh)
1113 {
1114 struct omap_hwmod_irq_info *ohii;
1115 int i = 0;
1116
1117 if (!oh || !oh->mpu_irqs)
1118 return 0;
1119
1120 do {
1121 ohii = &oh->mpu_irqs[i++];
1122 } while (ohii->irq != -1);
1123
1124 return i-1;
1125 }
1126
1127 /**
1128 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1129 * @oh: struct omap_hwmod *oh
1130 *
1131 * Count and return the number of SDMA request lines associated with
1132 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1133 * if @oh is NULL.
1134 */
1135 static int _count_sdma_reqs(struct omap_hwmod *oh)
1136 {
1137 struct omap_hwmod_dma_info *ohdi;
1138 int i = 0;
1139
1140 if (!oh || !oh->sdma_reqs)
1141 return 0;
1142
1143 do {
1144 ohdi = &oh->sdma_reqs[i++];
1145 } while (ohdi->dma_req != -1);
1146
1147 return i-1;
1148 }
1149
1150 /**
1151 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1152 * @oh: struct omap_hwmod *oh
1153 *
1154 * Count and return the number of address space ranges associated with
1155 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1156 * if @oh is NULL.
1157 */
1158 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1159 {
1160 struct omap_hwmod_addr_space *mem;
1161 int i = 0;
1162
1163 if (!os || !os->addr)
1164 return 0;
1165
1166 do {
1167 mem = &os->addr[i++];
1168 } while (mem->pa_start != mem->pa_end);
1169
1170 return i-1;
1171 }
1172
1173 /**
1174 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1175 * @oh: struct omap_hwmod * to operate on
1176 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1177 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1178 *
1179 * Retrieve a MPU hardware IRQ line number named by @name associated
1180 * with the IP block pointed to by @oh. The IRQ number will be filled
1181 * into the address pointed to by @dma. When @name is non-null, the
1182 * IRQ line number associated with the named entry will be returned.
1183 * If @name is null, the first matching entry will be returned. Data
1184 * order is not meaningful in hwmod data, so callers are strongly
1185 * encouraged to use a non-null @name whenever possible to avoid
1186 * unpredictable effects if hwmod data is later added that causes data
1187 * ordering to change. Returns 0 upon success or a negative error
1188 * code upon error.
1189 */
1190 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1191 unsigned int *irq)
1192 {
1193 int i;
1194 bool found = false;
1195
1196 if (!oh->mpu_irqs)
1197 return -ENOENT;
1198
1199 i = 0;
1200 while (oh->mpu_irqs[i].irq != -1) {
1201 if (name == oh->mpu_irqs[i].name ||
1202 !strcmp(name, oh->mpu_irqs[i].name)) {
1203 found = true;
1204 break;
1205 }
1206 i++;
1207 }
1208
1209 if (!found)
1210 return -ENOENT;
1211
1212 *irq = oh->mpu_irqs[i].irq;
1213
1214 return 0;
1215 }
1216
1217 /**
1218 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1219 * @oh: struct omap_hwmod * to operate on
1220 * @name: pointer to the name of the SDMA request line to fetch (optional)
1221 * @dma: pointer to an unsigned int to store the request line ID to
1222 *
1223 * Retrieve an SDMA request line ID named by @name on the IP block
1224 * pointed to by @oh. The ID will be filled into the address pointed
1225 * to by @dma. When @name is non-null, the request line ID associated
1226 * with the named entry will be returned. If @name is null, the first
1227 * matching entry will be returned. Data order is not meaningful in
1228 * hwmod data, so callers are strongly encouraged to use a non-null
1229 * @name whenever possible to avoid unpredictable effects if hwmod
1230 * data is later added that causes data ordering to change. Returns 0
1231 * upon success or a negative error code upon error.
1232 */
1233 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1234 unsigned int *dma)
1235 {
1236 int i;
1237 bool found = false;
1238
1239 if (!oh->sdma_reqs)
1240 return -ENOENT;
1241
1242 i = 0;
1243 while (oh->sdma_reqs[i].dma_req != -1) {
1244 if (name == oh->sdma_reqs[i].name ||
1245 !strcmp(name, oh->sdma_reqs[i].name)) {
1246 found = true;
1247 break;
1248 }
1249 i++;
1250 }
1251
1252 if (!found)
1253 return -ENOENT;
1254
1255 *dma = oh->sdma_reqs[i].dma_req;
1256
1257 return 0;
1258 }
1259
1260 /**
1261 * _get_addr_space_by_name - fetch address space start & end by name
1262 * @oh: struct omap_hwmod * to operate on
1263 * @name: pointer to the name of the address space to fetch (optional)
1264 * @pa_start: pointer to a u32 to store the starting address to
1265 * @pa_end: pointer to a u32 to store the ending address to
1266 *
1267 * Retrieve address space start and end addresses for the IP block
1268 * pointed to by @oh. The data will be filled into the addresses
1269 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1270 * address space data associated with the named entry will be
1271 * returned. If @name is null, the first matching entry will be
1272 * returned. Data order is not meaningful in hwmod data, so callers
1273 * are strongly encouraged to use a non-null @name whenever possible
1274 * to avoid unpredictable effects if hwmod data is later added that
1275 * causes data ordering to change. Returns 0 upon success or a
1276 * negative error code upon error.
1277 */
1278 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1279 u32 *pa_start, u32 *pa_end)
1280 {
1281 int j;
1282 struct omap_hwmod_ocp_if *os;
1283 bool found = false;
1284
1285 list_for_each_entry(os, &oh->slave_ports, node) {
1286
1287 if (!os->addr)
1288 return -ENOENT;
1289
1290 j = 0;
1291 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1292 if (name == os->addr[j].name ||
1293 !strcmp(name, os->addr[j].name)) {
1294 found = true;
1295 break;
1296 }
1297 j++;
1298 }
1299
1300 if (found)
1301 break;
1302 }
1303
1304 if (!found)
1305 return -ENOENT;
1306
1307 *pa_start = os->addr[j].pa_start;
1308 *pa_end = os->addr[j].pa_end;
1309
1310 return 0;
1311 }
1312
1313 /**
1314 * _save_mpu_port_index - find and save the index to @oh's MPU port
1315 * @oh: struct omap_hwmod *
1316 *
1317 * Determines the array index of the OCP slave port that the MPU uses
1318 * to address the device, and saves it into the struct omap_hwmod.
1319 * Intended to be called during hwmod registration only. No return
1320 * value.
1321 */
1322 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1323 {
1324 struct omap_hwmod_ocp_if *os = NULL;
1325
1326 if (!oh)
1327 return;
1328
1329 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1330
1331 list_for_each_entry(os, &oh->slave_ports, node) {
1332 if (os->user & OCP_USER_MPU) {
1333 oh->_mpu_port = os;
1334 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1335 break;
1336 }
1337 }
1338
1339 return;
1340 }
1341
1342 /**
1343 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1344 * @oh: struct omap_hwmod *
1345 *
1346 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1347 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1348 * communicate with the IP block. This interface need not be directly
1349 * connected to the MPU (and almost certainly is not), but is directly
1350 * connected to the IP block represented by @oh. Returns a pointer
1351 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1352 * error or if there does not appear to be a path from the MPU to this
1353 * IP block.
1354 */
1355 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1356 {
1357 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1358 return NULL;
1359
1360 return oh->_mpu_port;
1361 };
1362
1363 /**
1364 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1365 * @oh: struct omap_hwmod *
1366 *
1367 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1368 * the register target MPU address space; or returns NULL upon error.
1369 */
1370 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1371 {
1372 struct omap_hwmod_ocp_if *os;
1373 struct omap_hwmod_addr_space *mem;
1374 int found = 0, i = 0;
1375
1376 os = _find_mpu_rt_port(oh);
1377 if (!os || !os->addr)
1378 return NULL;
1379
1380 do {
1381 mem = &os->addr[i++];
1382 if (mem->flags & ADDR_TYPE_RT)
1383 found = 1;
1384 } while (!found && mem->pa_start != mem->pa_end);
1385
1386 return (found) ? mem : NULL;
1387 }
1388
1389 /**
1390 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1391 * @oh: struct omap_hwmod *
1392 *
1393 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1394 * by @oh is set to indicate to the PRCM that the IP block is active.
1395 * Usually this means placing the module into smart-idle mode and
1396 * smart-standby, but if there is a bug in the automatic idle handling
1397 * for the IP block, it may need to be placed into the force-idle or
1398 * no-idle variants of these modes. No return value.
1399 */
1400 static void _enable_sysc(struct omap_hwmod *oh)
1401 {
1402 u8 idlemode, sf;
1403 u32 v;
1404 bool clkdm_act;
1405 struct clockdomain *clkdm;
1406
1407 if (!oh->class->sysc)
1408 return;
1409
1410 /*
1411 * Wait until reset has completed, this is needed as the IP
1412 * block is reset automatically by hardware in some cases
1413 * (off-mode for example), and the drivers require the
1414 * IP to be ready when they access it
1415 */
1416 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1417 _enable_optional_clocks(oh);
1418 _wait_softreset_complete(oh);
1419 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1420 _disable_optional_clocks(oh);
1421
1422 v = oh->_sysc_cache;
1423 sf = oh->class->sysc->sysc_flags;
1424
1425 clkdm = _get_clkdm(oh);
1426 if (sf & SYSC_HAS_SIDLEMODE) {
1427 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1428 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1429 idlemode = HWMOD_IDLEMODE_NO;
1430 } else {
1431 if (sf & SYSC_HAS_ENAWAKEUP)
1432 _enable_wakeup(oh, &v);
1433 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1434 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1435 else
1436 idlemode = HWMOD_IDLEMODE_SMART;
1437 }
1438
1439 /*
1440 * This is special handling for some IPs like
1441 * 32k sync timer. Force them to idle!
1442 */
1443 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1444 if (clkdm_act && !(oh->class->sysc->idlemodes &
1445 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1446 idlemode = HWMOD_IDLEMODE_FORCE;
1447
1448 _set_slave_idlemode(oh, idlemode, &v);
1449 }
1450
1451 if (sf & SYSC_HAS_MIDLEMODE) {
1452 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1453 idlemode = HWMOD_IDLEMODE_FORCE;
1454 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1455 idlemode = HWMOD_IDLEMODE_NO;
1456 } else {
1457 if (sf & SYSC_HAS_ENAWAKEUP)
1458 _enable_wakeup(oh, &v);
1459 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1460 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1461 else
1462 idlemode = HWMOD_IDLEMODE_SMART;
1463 }
1464 _set_master_standbymode(oh, idlemode, &v);
1465 }
1466
1467 /*
1468 * XXX The clock framework should handle this, by
1469 * calling into this code. But this must wait until the
1470 * clock structures are tagged with omap_hwmod entries
1471 */
1472 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1473 (sf & SYSC_HAS_CLOCKACTIVITY))
1474 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1475
1476 _write_sysconfig(v, oh);
1477
1478 /*
1479 * Set the autoidle bit only after setting the smartidle bit
1480 * Setting this will not have any impact on the other modules.
1481 */
1482 if (sf & SYSC_HAS_AUTOIDLE) {
1483 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1484 0 : 1;
1485 _set_module_autoidle(oh, idlemode, &v);
1486 _write_sysconfig(v, oh);
1487 }
1488 }
1489
1490 /**
1491 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1492 * @oh: struct omap_hwmod *
1493 *
1494 * If module is marked as SWSUP_SIDLE, force the module into slave
1495 * idle; otherwise, configure it for smart-idle. If module is marked
1496 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1497 * configure it for smart-standby. No return value.
1498 */
1499 static void _idle_sysc(struct omap_hwmod *oh)
1500 {
1501 u8 idlemode, sf;
1502 u32 v;
1503
1504 if (!oh->class->sysc)
1505 return;
1506
1507 v = oh->_sysc_cache;
1508 sf = oh->class->sysc->sysc_flags;
1509
1510 if (sf & SYSC_HAS_SIDLEMODE) {
1511 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1512 idlemode = HWMOD_IDLEMODE_FORCE;
1513 } else {
1514 if (sf & SYSC_HAS_ENAWAKEUP)
1515 _enable_wakeup(oh, &v);
1516 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1517 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1518 else
1519 idlemode = HWMOD_IDLEMODE_SMART;
1520 }
1521 _set_slave_idlemode(oh, idlemode, &v);
1522 }
1523
1524 if (sf & SYSC_HAS_MIDLEMODE) {
1525 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1526 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1527 idlemode = HWMOD_IDLEMODE_FORCE;
1528 } else {
1529 if (sf & SYSC_HAS_ENAWAKEUP)
1530 _enable_wakeup(oh, &v);
1531 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1532 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1533 else
1534 idlemode = HWMOD_IDLEMODE_SMART;
1535 }
1536 _set_master_standbymode(oh, idlemode, &v);
1537 }
1538
1539 /* If the cached value is the same as the new value, skip the write */
1540 if (oh->_sysc_cache != v)
1541 _write_sysconfig(v, oh);
1542 }
1543
1544 /**
1545 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1546 * @oh: struct omap_hwmod *
1547 *
1548 * Force the module into slave idle and master suspend. No return
1549 * value.
1550 */
1551 static void _shutdown_sysc(struct omap_hwmod *oh)
1552 {
1553 u32 v;
1554 u8 sf;
1555
1556 if (!oh->class->sysc)
1557 return;
1558
1559 v = oh->_sysc_cache;
1560 sf = oh->class->sysc->sysc_flags;
1561
1562 if (sf & SYSC_HAS_SIDLEMODE)
1563 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1564
1565 if (sf & SYSC_HAS_MIDLEMODE)
1566 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1567
1568 if (sf & SYSC_HAS_AUTOIDLE)
1569 _set_module_autoidle(oh, 1, &v);
1570
1571 _write_sysconfig(v, oh);
1572 }
1573
1574 /**
1575 * _lookup - find an omap_hwmod by name
1576 * @name: find an omap_hwmod by name
1577 *
1578 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1579 */
1580 static struct omap_hwmod *_lookup(const char *name)
1581 {
1582 struct omap_hwmod *oh, *temp_oh;
1583
1584 oh = NULL;
1585
1586 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1587 if (!strcmp(name, temp_oh->name)) {
1588 oh = temp_oh;
1589 break;
1590 }
1591 }
1592
1593 return oh;
1594 }
1595
1596 /**
1597 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1598 * @oh: struct omap_hwmod *
1599 *
1600 * Convert a clockdomain name stored in a struct omap_hwmod into a
1601 * clockdomain pointer, and save it into the struct omap_hwmod.
1602 * Return -EINVAL if the clkdm_name lookup failed.
1603 */
1604 static int _init_clkdm(struct omap_hwmod *oh)
1605 {
1606 if (!oh->clkdm_name) {
1607 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1608 return 0;
1609 }
1610
1611 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1612 if (!oh->clkdm) {
1613 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1614 oh->name, oh->clkdm_name);
1615 return 0;
1616 }
1617
1618 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1619 oh->name, oh->clkdm_name);
1620
1621 return 0;
1622 }
1623
1624 /**
1625 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1626 * well the clockdomain.
1627 * @oh: struct omap_hwmod *
1628 * @np: device_node mapped to this hwmod
1629 *
1630 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1631 * Resolves all clock names embedded in the hwmod. Returns 0 on
1632 * success, or a negative error code on failure.
1633 */
1634 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1635 {
1636 int ret = 0;
1637
1638 if (oh->_state != _HWMOD_STATE_REGISTERED)
1639 return 0;
1640
1641 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1642
1643 if (soc_ops.init_clkdm)
1644 ret |= soc_ops.init_clkdm(oh);
1645
1646 ret |= _init_main_clk(oh);
1647 ret |= _init_interface_clks(oh);
1648 ret |= _init_opt_clks(oh);
1649
1650 if (!ret)
1651 oh->_state = _HWMOD_STATE_CLKS_INITED;
1652 else
1653 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1654
1655 return ret;
1656 }
1657
1658 /**
1659 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1660 * @oh: struct omap_hwmod *
1661 * @name: name of the reset line in the context of this hwmod
1662 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1663 *
1664 * Return the bit position of the reset line that match the
1665 * input name. Return -ENOENT if not found.
1666 */
1667 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1668 struct omap_hwmod_rst_info *ohri)
1669 {
1670 int i;
1671
1672 for (i = 0; i < oh->rst_lines_cnt; i++) {
1673 const char *rst_line = oh->rst_lines[i].name;
1674 if (!strcmp(rst_line, name)) {
1675 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1676 ohri->st_shift = oh->rst_lines[i].st_shift;
1677 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1678 oh->name, __func__, rst_line, ohri->rst_shift,
1679 ohri->st_shift);
1680
1681 return 0;
1682 }
1683 }
1684
1685 return -ENOENT;
1686 }
1687
1688 /**
1689 * _assert_hardreset - assert the HW reset line of submodules
1690 * contained in the hwmod module.
1691 * @oh: struct omap_hwmod *
1692 * @name: name of the reset line to lookup and assert
1693 *
1694 * Some IP like dsp, ipu or iva contain processor that require an HW
1695 * reset line to be assert / deassert in order to enable fully the IP.
1696 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1697 * asserting the hardreset line on the currently-booted SoC, or passes
1698 * along the return value from _lookup_hardreset() or the SoC's
1699 * assert_hardreset code.
1700 */
1701 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1702 {
1703 struct omap_hwmod_rst_info ohri;
1704 int ret = -EINVAL;
1705
1706 if (!oh)
1707 return -EINVAL;
1708
1709 if (!soc_ops.assert_hardreset)
1710 return -ENOSYS;
1711
1712 ret = _lookup_hardreset(oh, name, &ohri);
1713 if (ret < 0)
1714 return ret;
1715
1716 ret = soc_ops.assert_hardreset(oh, &ohri);
1717
1718 return ret;
1719 }
1720
1721 /**
1722 * _deassert_hardreset - deassert the HW reset line of submodules contained
1723 * in the hwmod module.
1724 * @oh: struct omap_hwmod *
1725 * @name: name of the reset line to look up and deassert
1726 *
1727 * Some IP like dsp, ipu or iva contain processor that require an HW
1728 * reset line to be assert / deassert in order to enable fully the IP.
1729 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1730 * deasserting the hardreset line on the currently-booted SoC, or passes
1731 * along the return value from _lookup_hardreset() or the SoC's
1732 * deassert_hardreset code.
1733 */
1734 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1735 {
1736 struct omap_hwmod_rst_info ohri;
1737 int ret = -EINVAL;
1738
1739 if (!oh)
1740 return -EINVAL;
1741
1742 if (!soc_ops.deassert_hardreset)
1743 return -ENOSYS;
1744
1745 ret = _lookup_hardreset(oh, name, &ohri);
1746 if (ret < 0)
1747 return ret;
1748
1749 if (oh->clkdm) {
1750 /*
1751 * A clockdomain must be in SW_SUP otherwise reset
1752 * might not be completed. The clockdomain can be set
1753 * in HW_AUTO only when the module become ready.
1754 */
1755 clkdm_deny_idle(oh->clkdm);
1756 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1757 if (ret) {
1758 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1759 oh->name, oh->clkdm->name, ret);
1760 return ret;
1761 }
1762 }
1763
1764 _enable_clocks(oh);
1765 if (soc_ops.enable_module)
1766 soc_ops.enable_module(oh);
1767
1768 ret = soc_ops.deassert_hardreset(oh, &ohri);
1769
1770 if (soc_ops.disable_module)
1771 soc_ops.disable_module(oh);
1772 _disable_clocks(oh);
1773
1774 if (ret == -EBUSY)
1775 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1776
1777 if (oh->clkdm) {
1778 /*
1779 * Set the clockdomain to HW_AUTO, assuming that the
1780 * previous state was HW_AUTO.
1781 */
1782 clkdm_allow_idle(oh->clkdm);
1783
1784 clkdm_hwmod_disable(oh->clkdm, oh);
1785 }
1786
1787 return ret;
1788 }
1789
1790 /**
1791 * _read_hardreset - read the HW reset line state of submodules
1792 * contained in the hwmod module
1793 * @oh: struct omap_hwmod *
1794 * @name: name of the reset line to look up and read
1795 *
1796 * Return the state of the reset line. Returns -EINVAL if @oh is
1797 * null, -ENOSYS if we have no way of reading the hardreset line
1798 * status on the currently-booted SoC, or passes along the return
1799 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1800 * code.
1801 */
1802 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1803 {
1804 struct omap_hwmod_rst_info ohri;
1805 int ret = -EINVAL;
1806
1807 if (!oh)
1808 return -EINVAL;
1809
1810 if (!soc_ops.is_hardreset_asserted)
1811 return -ENOSYS;
1812
1813 ret = _lookup_hardreset(oh, name, &ohri);
1814 if (ret < 0)
1815 return ret;
1816
1817 return soc_ops.is_hardreset_asserted(oh, &ohri);
1818 }
1819
1820 /**
1821 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1822 * @oh: struct omap_hwmod *
1823 *
1824 * If all hardreset lines associated with @oh are asserted, then return true.
1825 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1826 * associated with @oh are asserted, then return false.
1827 * This function is used to avoid executing some parts of the IP block
1828 * enable/disable sequence if its hardreset line is set.
1829 */
1830 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1831 {
1832 int i, rst_cnt = 0;
1833
1834 if (oh->rst_lines_cnt == 0)
1835 return false;
1836
1837 for (i = 0; i < oh->rst_lines_cnt; i++)
1838 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1839 rst_cnt++;
1840
1841 if (oh->rst_lines_cnt == rst_cnt)
1842 return true;
1843
1844 return false;
1845 }
1846
1847 /**
1848 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1849 * hard-reset
1850 * @oh: struct omap_hwmod *
1851 *
1852 * If any hardreset lines associated with @oh are asserted, then
1853 * return true. Otherwise, if no hardreset lines associated with @oh
1854 * are asserted, or if @oh has no hardreset lines, then return false.
1855 * This function is used to avoid executing some parts of the IP block
1856 * enable/disable sequence if any hardreset line is set.
1857 */
1858 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1859 {
1860 int rst_cnt = 0;
1861 int i;
1862
1863 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1864 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1865 rst_cnt++;
1866
1867 return (rst_cnt) ? true : false;
1868 }
1869
1870 /**
1871 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1872 * @oh: struct omap_hwmod *
1873 *
1874 * Disable the PRCM module mode related to the hwmod @oh.
1875 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1876 */
1877 static int _omap4_disable_module(struct omap_hwmod *oh)
1878 {
1879 int v;
1880
1881 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1882 _omap4_clkctrl_managed_by_clkfwk(oh))
1883 return -EINVAL;
1884
1885 /*
1886 * Since integration code might still be doing something, only
1887 * disable if all lines are under hardreset.
1888 */
1889 if (_are_any_hardreset_lines_asserted(oh))
1890 return 0;
1891
1892 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1893
1894 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1895 oh->prcm.omap4.clkctrl_offs);
1896
1897 v = _omap4_wait_target_disable(oh);
1898 if (v)
1899 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1900 oh->name);
1901
1902 return 0;
1903 }
1904
1905 /**
1906 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1907 * @oh: struct omap_hwmod *
1908 *
1909 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1910 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1911 * reset this way, -EINVAL if the hwmod is in the wrong state,
1912 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1913 *
1914 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1915 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1916 * use the SYSCONFIG softreset bit to provide the status.
1917 *
1918 * Note that some IP like McBSP do have reset control but don't have
1919 * reset status.
1920 */
1921 static int _ocp_softreset(struct omap_hwmod *oh)
1922 {
1923 u32 v;
1924 int c = 0;
1925 int ret = 0;
1926
1927 if (!oh->class->sysc ||
1928 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1929 return -ENOENT;
1930
1931 /* clocks must be on for this operation */
1932 if (oh->_state != _HWMOD_STATE_ENABLED) {
1933 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1934 oh->name);
1935 return -EINVAL;
1936 }
1937
1938 /* For some modules, all optionnal clocks need to be enabled as well */
1939 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1940 _enable_optional_clocks(oh);
1941
1942 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1943
1944 v = oh->_sysc_cache;
1945 ret = _set_softreset(oh, &v);
1946 if (ret)
1947 goto dis_opt_clks;
1948
1949 _write_sysconfig(v, oh);
1950
1951 if (oh->class->sysc->srst_udelay)
1952 udelay(oh->class->sysc->srst_udelay);
1953
1954 c = _wait_softreset_complete(oh);
1955 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1956 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1957 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1958 ret = -ETIMEDOUT;
1959 goto dis_opt_clks;
1960 } else {
1961 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1962 }
1963
1964 ret = _clear_softreset(oh, &v);
1965 if (ret)
1966 goto dis_opt_clks;
1967
1968 _write_sysconfig(v, oh);
1969
1970 /*
1971 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1972 * _wait_target_ready() or _reset()
1973 */
1974
1975 dis_opt_clks:
1976 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1977 _disable_optional_clocks(oh);
1978
1979 return ret;
1980 }
1981
1982 /**
1983 * _reset - reset an omap_hwmod
1984 * @oh: struct omap_hwmod *
1985 *
1986 * Resets an omap_hwmod @oh. If the module has a custom reset
1987 * function pointer defined, then call it to reset the IP block, and
1988 * pass along its return value to the caller. Otherwise, if the IP
1989 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1990 * associated with it, call a function to reset the IP block via that
1991 * method, and pass along the return value to the caller. Finally, if
1992 * the IP block has some hardreset lines associated with it, assert
1993 * all of those, but do _not_ deassert them. (This is because driver
1994 * authors have expressed an apparent requirement to control the
1995 * deassertion of the hardreset lines themselves.)
1996 *
1997 * The default software reset mechanism for most OMAP IP blocks is
1998 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1999 * hwmods cannot be reset via this method. Some are not targets and
2000 * therefore have no OCP header registers to access. Others (like the
2001 * IVA) have idiosyncratic reset sequences. So for these relatively
2002 * rare cases, custom reset code can be supplied in the struct
2003 * omap_hwmod_class .reset function pointer.
2004 *
2005 * _set_dmadisable() is called to set the DMADISABLE bit so that it
2006 * does not prevent idling of the system. This is necessary for cases
2007 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
2008 * kernel without disabling dma.
2009 *
2010 * Passes along the return value from either _ocp_softreset() or the
2011 * custom reset function - these must return -EINVAL if the hwmod
2012 * cannot be reset this way or if the hwmod is in the wrong state,
2013 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2014 */
2015 static int _reset(struct omap_hwmod *oh)
2016 {
2017 int i, r;
2018
2019 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
2020
2021 if (oh->class->reset) {
2022 r = oh->class->reset(oh);
2023 } else {
2024 if (oh->rst_lines_cnt > 0) {
2025 for (i = 0; i < oh->rst_lines_cnt; i++)
2026 _assert_hardreset(oh, oh->rst_lines[i].name);
2027 return 0;
2028 } else {
2029 r = _ocp_softreset(oh);
2030 if (r == -ENOENT)
2031 r = 0;
2032 }
2033 }
2034
2035 _set_dmadisable(oh);
2036
2037 /*
2038 * OCP_SYSCONFIG bits need to be reprogrammed after a
2039 * softreset. The _enable() function should be split to avoid
2040 * the rewrite of the OCP_SYSCONFIG register.
2041 */
2042 if (oh->class->sysc) {
2043 _update_sysc_cache(oh);
2044 _enable_sysc(oh);
2045 }
2046
2047 return r;
2048 }
2049
2050 /**
2051 * _omap4_update_context_lost - increment hwmod context loss counter if
2052 * hwmod context was lost, and clear hardware context loss reg
2053 * @oh: hwmod to check for context loss
2054 *
2055 * If the PRCM indicates that the hwmod @oh lost context, increment
2056 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2057 * bits. No return value.
2058 */
2059 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2060 {
2061 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2062 return;
2063
2064 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2065 oh->clkdm->pwrdm.ptr->prcm_offs,
2066 oh->prcm.omap4.context_offs))
2067 return;
2068
2069 oh->prcm.omap4.context_lost_counter++;
2070 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2071 oh->clkdm->pwrdm.ptr->prcm_offs,
2072 oh->prcm.omap4.context_offs);
2073 }
2074
2075 /**
2076 * _omap4_get_context_lost - get context loss counter for a hwmod
2077 * @oh: hwmod to get context loss counter for
2078 *
2079 * Returns the in-memory context loss counter for a hwmod.
2080 */
2081 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2082 {
2083 return oh->prcm.omap4.context_lost_counter;
2084 }
2085
2086 /**
2087 * _enable_preprogram - Pre-program an IP block during the _enable() process
2088 * @oh: struct omap_hwmod *
2089 *
2090 * Some IP blocks (such as AESS) require some additional programming
2091 * after enable before they can enter idle. If a function pointer to
2092 * do so is present in the hwmod data, then call it and pass along the
2093 * return value; otherwise, return 0.
2094 */
2095 static int _enable_preprogram(struct omap_hwmod *oh)
2096 {
2097 if (!oh->class->enable_preprogram)
2098 return 0;
2099
2100 return oh->class->enable_preprogram(oh);
2101 }
2102
2103 /**
2104 * _enable - enable an omap_hwmod
2105 * @oh: struct omap_hwmod *
2106 *
2107 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2108 * register target. Returns -EINVAL if the hwmod is in the wrong
2109 * state or passes along the return value of _wait_target_ready().
2110 */
2111 static int _enable(struct omap_hwmod *oh)
2112 {
2113 int r;
2114
2115 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2116
2117 /*
2118 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2119 * state at init.
2120 */
2121 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2122 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2123 return 0;
2124 }
2125
2126 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2127 oh->_state != _HWMOD_STATE_IDLE &&
2128 oh->_state != _HWMOD_STATE_DISABLED) {
2129 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2130 oh->name);
2131 return -EINVAL;
2132 }
2133
2134 /*
2135 * If an IP block contains HW reset lines and all of them are
2136 * asserted, we let integration code associated with that
2137 * block handle the enable. We've received very little
2138 * information on what those driver authors need, and until
2139 * detailed information is provided and the driver code is
2140 * posted to the public lists, this is probably the best we
2141 * can do.
2142 */
2143 if (_are_all_hardreset_lines_asserted(oh))
2144 return 0;
2145
2146 _add_initiator_dep(oh, mpu_oh);
2147
2148 if (oh->clkdm) {
2149 /*
2150 * A clockdomain must be in SW_SUP before enabling
2151 * completely the module. The clockdomain can be set
2152 * in HW_AUTO only when the module become ready.
2153 */
2154 clkdm_deny_idle(oh->clkdm);
2155 r = clkdm_hwmod_enable(oh->clkdm, oh);
2156 if (r) {
2157 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2158 oh->name, oh->clkdm->name, r);
2159 return r;
2160 }
2161 }
2162
2163 _enable_clocks(oh);
2164 if (soc_ops.enable_module)
2165 soc_ops.enable_module(oh);
2166 if (oh->flags & HWMOD_BLOCK_WFI)
2167 cpu_idle_poll_ctrl(true);
2168
2169 if (soc_ops.update_context_lost)
2170 soc_ops.update_context_lost(oh);
2171
2172 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2173 -EINVAL;
2174 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2175 clkdm_allow_idle(oh->clkdm);
2176
2177 if (!r) {
2178 oh->_state = _HWMOD_STATE_ENABLED;
2179
2180 /* Access the sysconfig only if the target is ready */
2181 if (oh->class->sysc) {
2182 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2183 _update_sysc_cache(oh);
2184 _enable_sysc(oh);
2185 }
2186 r = _enable_preprogram(oh);
2187 } else {
2188 if (soc_ops.disable_module)
2189 soc_ops.disable_module(oh);
2190 _disable_clocks(oh);
2191 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
2192 oh->name, r);
2193
2194 if (oh->clkdm)
2195 clkdm_hwmod_disable(oh->clkdm, oh);
2196 }
2197
2198 return r;
2199 }
2200
2201 /**
2202 * _idle - idle an omap_hwmod
2203 * @oh: struct omap_hwmod *
2204 *
2205 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2206 * no further work. Returns -EINVAL if the hwmod is in the wrong
2207 * state or returns 0.
2208 */
2209 static int _idle(struct omap_hwmod *oh)
2210 {
2211 if (oh->flags & HWMOD_NO_IDLE) {
2212 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2213 return 0;
2214 }
2215
2216 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2217
2218 if (_are_all_hardreset_lines_asserted(oh))
2219 return 0;
2220
2221 if (oh->_state != _HWMOD_STATE_ENABLED) {
2222 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2223 oh->name);
2224 return -EINVAL;
2225 }
2226
2227 if (oh->class->sysc)
2228 _idle_sysc(oh);
2229 _del_initiator_dep(oh, mpu_oh);
2230
2231 /*
2232 * If HWMOD_CLKDM_NOAUTO is set then we don't
2233 * deny idle the clkdm again since idle was already denied
2234 * in _enable()
2235 */
2236 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
2237 clkdm_deny_idle(oh->clkdm);
2238
2239 if (oh->flags & HWMOD_BLOCK_WFI)
2240 cpu_idle_poll_ctrl(false);
2241 if (soc_ops.disable_module)
2242 soc_ops.disable_module(oh);
2243
2244 /*
2245 * The module must be in idle mode before disabling any parents
2246 * clocks. Otherwise, the parent clock might be disabled before
2247 * the module transition is done, and thus will prevent the
2248 * transition to complete properly.
2249 */
2250 _disable_clocks(oh);
2251 if (oh->clkdm) {
2252 clkdm_allow_idle(oh->clkdm);
2253 clkdm_hwmod_disable(oh->clkdm, oh);
2254 }
2255
2256 oh->_state = _HWMOD_STATE_IDLE;
2257
2258 return 0;
2259 }
2260
2261 /**
2262 * _shutdown - shutdown an omap_hwmod
2263 * @oh: struct omap_hwmod *
2264 *
2265 * Shut down an omap_hwmod @oh. This should be called when the driver
2266 * used for the hwmod is removed or unloaded or if the driver is not
2267 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2268 * state or returns 0.
2269 */
2270 static int _shutdown(struct omap_hwmod *oh)
2271 {
2272 int ret, i;
2273 u8 prev_state;
2274
2275 if (_are_all_hardreset_lines_asserted(oh))
2276 return 0;
2277
2278 if (oh->_state != _HWMOD_STATE_IDLE &&
2279 oh->_state != _HWMOD_STATE_ENABLED) {
2280 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2281 oh->name);
2282 return -EINVAL;
2283 }
2284
2285 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2286
2287 if (oh->class->pre_shutdown) {
2288 prev_state = oh->_state;
2289 if (oh->_state == _HWMOD_STATE_IDLE)
2290 _enable(oh);
2291 ret = oh->class->pre_shutdown(oh);
2292 if (ret) {
2293 if (prev_state == _HWMOD_STATE_IDLE)
2294 _idle(oh);
2295 return ret;
2296 }
2297 }
2298
2299 if (oh->class->sysc) {
2300 if (oh->_state == _HWMOD_STATE_IDLE)
2301 _enable(oh);
2302 _shutdown_sysc(oh);
2303 }
2304
2305 /* clocks and deps are already disabled in idle */
2306 if (oh->_state == _HWMOD_STATE_ENABLED) {
2307 _del_initiator_dep(oh, mpu_oh);
2308 /* XXX what about the other system initiators here? dma, dsp */
2309 if (oh->flags & HWMOD_BLOCK_WFI)
2310 cpu_idle_poll_ctrl(false);
2311 if (soc_ops.disable_module)
2312 soc_ops.disable_module(oh);
2313 _disable_clocks(oh);
2314 if (oh->clkdm)
2315 clkdm_hwmod_disable(oh->clkdm, oh);
2316 }
2317 /* XXX Should this code also force-disable the optional clocks? */
2318
2319 for (i = 0; i < oh->rst_lines_cnt; i++)
2320 _assert_hardreset(oh, oh->rst_lines[i].name);
2321
2322 oh->_state = _HWMOD_STATE_DISABLED;
2323
2324 return 0;
2325 }
2326
2327 static int of_dev_find_hwmod(struct device_node *np,
2328 struct omap_hwmod *oh)
2329 {
2330 int count, i, res;
2331 const char *p;
2332
2333 count = of_property_count_strings(np, "ti,hwmods");
2334 if (count < 1)
2335 return -ENODEV;
2336
2337 for (i = 0; i < count; i++) {
2338 res = of_property_read_string_index(np, "ti,hwmods",
2339 i, &p);
2340 if (res)
2341 continue;
2342 if (!strcmp(p, oh->name)) {
2343 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2344 np->name, i, oh->name);
2345 return i;
2346 }
2347 }
2348
2349 return -ENODEV;
2350 }
2351
2352 /**
2353 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2354 * @np: struct device_node *
2355 * @oh: struct omap_hwmod *
2356 * @index: index of the entry found
2357 * @found: struct device_node * found or NULL
2358 *
2359 * Parse the dt blob and find out needed hwmod. Recursive function is
2360 * implemented to take care hierarchical dt blob parsing.
2361 * Return: Returns 0 on success, -ENODEV when not found.
2362 */
2363 static int of_dev_hwmod_lookup(struct device_node *np,
2364 struct omap_hwmod *oh,
2365 int *index,
2366 struct device_node **found)
2367 {
2368 struct device_node *np0 = NULL;
2369 int res;
2370
2371 res = of_dev_find_hwmod(np, oh);
2372 if (res >= 0) {
2373 *found = np;
2374 *index = res;
2375 return 0;
2376 }
2377
2378 for_each_child_of_node(np, np0) {
2379 struct device_node *fc;
2380 int i;
2381
2382 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2383 if (res == 0) {
2384 *found = fc;
2385 *index = i;
2386 return 0;
2387 }
2388 }
2389
2390 *found = NULL;
2391 *index = 0;
2392
2393 return -ENODEV;
2394 }
2395
2396 /**
2397 * _init_mpu_rt_base - populate the virtual address for a hwmod
2398 * @oh: struct omap_hwmod * to locate the virtual address
2399 * @data: (unused, caller should pass NULL)
2400 * @index: index of the reg entry iospace in device tree
2401 * @np: struct device_node * of the IP block's device node in the DT data
2402 *
2403 * Cache the virtual address used by the MPU to access this IP block's
2404 * registers. This address is needed early so the OCP registers that
2405 * are part of the device's address space can be ioremapped properly.
2406 *
2407 * If SYSC access is not needed, the registers will not be remapped
2408 * and non-availability of MPU access is not treated as an error.
2409 *
2410 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2411 * -ENXIO on absent or invalid register target address space.
2412 */
2413 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2414 int index, struct device_node *np)
2415 {
2416 struct omap_hwmod_addr_space *mem;
2417 void __iomem *va_start = NULL;
2418
2419 if (!oh)
2420 return -EINVAL;
2421
2422 _save_mpu_port_index(oh);
2423
2424 /* if we don't need sysc access we don't need to ioremap */
2425 if (!oh->class->sysc)
2426 return 0;
2427
2428 /* we can't continue without MPU PORT if we need sysc access */
2429 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2430 return -ENXIO;
2431
2432 mem = _find_mpu_rt_addr_space(oh);
2433 if (!mem) {
2434 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2435 oh->name);
2436
2437 /* Extract the IO space from device tree blob */
2438 if (!np) {
2439 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2440 return -ENXIO;
2441 }
2442
2443 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2444 } else {
2445 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2446 }
2447
2448 if (!va_start) {
2449 if (mem)
2450 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2451 else
2452 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2453 oh->name, index, np);
2454 return -ENXIO;
2455 }
2456
2457 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2458 oh->name, va_start);
2459
2460 oh->_mpu_rt_va = va_start;
2461 return 0;
2462 }
2463
2464 /**
2465 * _init - initialize internal data for the hwmod @oh
2466 * @oh: struct omap_hwmod *
2467 * @n: (unused)
2468 *
2469 * Look up the clocks and the address space used by the MPU to access
2470 * registers belonging to the hwmod @oh. @oh must already be
2471 * registered at this point. This is the first of two phases for
2472 * hwmod initialization. Code called here does not touch any hardware
2473 * registers, it simply prepares internal data structures. Returns 0
2474 * upon success or if the hwmod isn't registered or if the hwmod's
2475 * address space is not defined, or -EINVAL upon failure.
2476 */
2477 static int __init _init(struct omap_hwmod *oh, void *data)
2478 {
2479 int r, index;
2480 struct device_node *np = NULL;
2481 struct device_node *bus;
2482
2483 if (oh->_state != _HWMOD_STATE_REGISTERED)
2484 return 0;
2485
2486 bus = of_find_node_by_name(NULL, "ocp");
2487 if (!bus)
2488 return -ENODEV;
2489
2490 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2491 if (r)
2492 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2493 else if (np && index)
2494 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2495 oh->name, np->name);
2496
2497 r = _init_mpu_rt_base(oh, NULL, index, np);
2498 if (r < 0) {
2499 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2500 oh->name);
2501 return 0;
2502 }
2503
2504 r = _init_clocks(oh, np);
2505 if (r < 0) {
2506 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2507 return -EINVAL;
2508 }
2509
2510 if (np) {
2511 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2512 oh->flags |= HWMOD_INIT_NO_RESET;
2513 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2514 oh->flags |= HWMOD_INIT_NO_IDLE;
2515 if (of_find_property(np, "ti,no-idle", NULL))
2516 oh->flags |= HWMOD_NO_IDLE;
2517 }
2518
2519 oh->_state = _HWMOD_STATE_INITIALIZED;
2520
2521 return 0;
2522 }
2523
2524 /**
2525 * _setup_iclk_autoidle - configure an IP block's interface clocks
2526 * @oh: struct omap_hwmod *
2527 *
2528 * Set up the module's interface clocks. XXX This function is still mostly
2529 * a stub; implementing this properly requires iclk autoidle usecounting in
2530 * the clock code. No return value.
2531 */
2532 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2533 {
2534 struct omap_hwmod_ocp_if *os;
2535
2536 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2537 return;
2538
2539 list_for_each_entry(os, &oh->slave_ports, node) {
2540 if (!os->_clk)
2541 continue;
2542
2543 if (os->flags & OCPIF_SWSUP_IDLE) {
2544 /* XXX omap_iclk_deny_idle(c); */
2545 } else {
2546 /* XXX omap_iclk_allow_idle(c); */
2547 clk_enable(os->_clk);
2548 }
2549 }
2550
2551 return;
2552 }
2553
2554 /**
2555 * _setup_reset - reset an IP block during the setup process
2556 * @oh: struct omap_hwmod *
2557 *
2558 * Reset the IP block corresponding to the hwmod @oh during the setup
2559 * process. The IP block is first enabled so it can be successfully
2560 * reset. Returns 0 upon success or a negative error code upon
2561 * failure.
2562 */
2563 static int __init _setup_reset(struct omap_hwmod *oh)
2564 {
2565 int r;
2566
2567 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2568 return -EINVAL;
2569
2570 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2571 return -EPERM;
2572
2573 if (oh->rst_lines_cnt == 0) {
2574 r = _enable(oh);
2575 if (r) {
2576 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2577 oh->name, oh->_state);
2578 return -EINVAL;
2579 }
2580 }
2581
2582 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2583 r = _reset(oh);
2584
2585 return r;
2586 }
2587
2588 /**
2589 * _setup_postsetup - transition to the appropriate state after _setup
2590 * @oh: struct omap_hwmod *
2591 *
2592 * Place an IP block represented by @oh into a "post-setup" state --
2593 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2594 * this function is called at the end of _setup().) The postsetup
2595 * state for an IP block can be changed by calling
2596 * omap_hwmod_enter_postsetup_state() early in the boot process,
2597 * before one of the omap_hwmod_setup*() functions are called for the
2598 * IP block.
2599 *
2600 * The IP block stays in this state until a PM runtime-based driver is
2601 * loaded for that IP block. A post-setup state of IDLE is
2602 * appropriate for almost all IP blocks with runtime PM-enabled
2603 * drivers, since those drivers are able to enable the IP block. A
2604 * post-setup state of ENABLED is appropriate for kernels with PM
2605 * runtime disabled. The DISABLED state is appropriate for unusual IP
2606 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2607 * included, since the WDTIMER starts running on reset and will reset
2608 * the MPU if left active.
2609 *
2610 * This post-setup mechanism is deprecated. Once all of the OMAP
2611 * drivers have been converted to use PM runtime, and all of the IP
2612 * block data and interconnect data is available to the hwmod code, it
2613 * should be possible to replace this mechanism with a "lazy reset"
2614 * arrangement. In a "lazy reset" setup, each IP block is enabled
2615 * when the driver first probes, then all remaining IP blocks without
2616 * drivers are either shut down or enabled after the drivers have
2617 * loaded. However, this cannot take place until the above
2618 * preconditions have been met, since otherwise the late reset code
2619 * has no way of knowing which IP blocks are in use by drivers, and
2620 * which ones are unused.
2621 *
2622 * No return value.
2623 */
2624 static void __init _setup_postsetup(struct omap_hwmod *oh)
2625 {
2626 u8 postsetup_state;
2627
2628 if (oh->rst_lines_cnt > 0)
2629 return;
2630
2631 postsetup_state = oh->_postsetup_state;
2632 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2633 postsetup_state = _HWMOD_STATE_ENABLED;
2634
2635 /*
2636 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2637 * it should be set by the core code as a runtime flag during startup
2638 */
2639 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2640 (postsetup_state == _HWMOD_STATE_IDLE)) {
2641 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2642 postsetup_state = _HWMOD_STATE_ENABLED;
2643 }
2644
2645 if (postsetup_state == _HWMOD_STATE_IDLE)
2646 _idle(oh);
2647 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2648 _shutdown(oh);
2649 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2650 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2651 oh->name, postsetup_state);
2652
2653 return;
2654 }
2655
2656 /**
2657 * _setup - prepare IP block hardware for use
2658 * @oh: struct omap_hwmod *
2659 * @n: (unused, pass NULL)
2660 *
2661 * Configure the IP block represented by @oh. This may include
2662 * enabling the IP block, resetting it, and placing it into a
2663 * post-setup state, depending on the type of IP block and applicable
2664 * flags. IP blocks are reset to prevent any previous configuration
2665 * by the bootloader or previous operating system from interfering
2666 * with power management or other parts of the system. The reset can
2667 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2668 * two phases for hwmod initialization. Code called here generally
2669 * affects the IP block hardware, or system integration hardware
2670 * associated with the IP block. Returns 0.
2671 */
2672 static int __init _setup(struct omap_hwmod *oh, void *data)
2673 {
2674 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2675 return 0;
2676
2677 if (oh->parent_hwmod) {
2678 int r;
2679
2680 r = _enable(oh->parent_hwmod);
2681 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2682 oh->name, oh->parent_hwmod->name);
2683 }
2684
2685 _setup_iclk_autoidle(oh);
2686
2687 if (!_setup_reset(oh))
2688 _setup_postsetup(oh);
2689
2690 if (oh->parent_hwmod) {
2691 u8 postsetup_state;
2692
2693 postsetup_state = oh->parent_hwmod->_postsetup_state;
2694
2695 if (postsetup_state == _HWMOD_STATE_IDLE)
2696 _idle(oh->parent_hwmod);
2697 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2698 _shutdown(oh->parent_hwmod);
2699 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2700 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2701 oh->parent_hwmod->name, postsetup_state);
2702 }
2703
2704 return 0;
2705 }
2706
2707 /**
2708 * _register - register a struct omap_hwmod
2709 * @oh: struct omap_hwmod *
2710 *
2711 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2712 * already has been registered by the same name; -EINVAL if the
2713 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2714 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2715 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2716 * success.
2717 *
2718 * XXX The data should be copied into bootmem, so the original data
2719 * should be marked __initdata and freed after init. This would allow
2720 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2721 * that the copy process would be relatively complex due to the large number
2722 * of substructures.
2723 */
2724 static int __init _register(struct omap_hwmod *oh)
2725 {
2726 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2727 (oh->_state != _HWMOD_STATE_UNKNOWN))
2728 return -EINVAL;
2729
2730 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2731
2732 if (_lookup(oh->name))
2733 return -EEXIST;
2734
2735 list_add_tail(&oh->node, &omap_hwmod_list);
2736
2737 INIT_LIST_HEAD(&oh->slave_ports);
2738 spin_lock_init(&oh->_lock);
2739 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2740
2741 oh->_state = _HWMOD_STATE_REGISTERED;
2742
2743 /*
2744 * XXX Rather than doing a strcmp(), this should test a flag
2745 * set in the hwmod data, inserted by the autogenerator code.
2746 */
2747 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2748 mpu_oh = oh;
2749
2750 return 0;
2751 }
2752
2753 /**
2754 * _add_link - add an interconnect between two IP blocks
2755 * @oi: pointer to a struct omap_hwmod_ocp_if record
2756 *
2757 * Add struct omap_hwmod_link records connecting the slave IP block
2758 * specified in @oi->slave to @oi. This code is assumed to run before
2759 * preemption or SMP has been enabled, thus avoiding the need for
2760 * locking in this code. Changes to this assumption will require
2761 * additional locking. Returns 0.
2762 */
2763 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2764 {
2765 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2766 oi->slave->name);
2767
2768 list_add(&oi->node, &oi->slave->slave_ports);
2769 oi->slave->slaves_cnt++;
2770
2771 return 0;
2772 }
2773
2774 /**
2775 * _register_link - register a struct omap_hwmod_ocp_if
2776 * @oi: struct omap_hwmod_ocp_if *
2777 *
2778 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2779 * has already been registered; -EINVAL if @oi is NULL or if the
2780 * record pointed to by @oi is missing required fields; or 0 upon
2781 * success.
2782 *
2783 * XXX The data should be copied into bootmem, so the original data
2784 * should be marked __initdata and freed after init. This would allow
2785 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2786 */
2787 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2788 {
2789 if (!oi || !oi->master || !oi->slave || !oi->user)
2790 return -EINVAL;
2791
2792 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2793 return -EEXIST;
2794
2795 pr_debug("omap_hwmod: registering link from %s to %s\n",
2796 oi->master->name, oi->slave->name);
2797
2798 /*
2799 * Register the connected hwmods, if they haven't been
2800 * registered already
2801 */
2802 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2803 _register(oi->master);
2804
2805 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2806 _register(oi->slave);
2807
2808 _add_link(oi);
2809
2810 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2811
2812 return 0;
2813 }
2814
2815 /* Static functions intended only for use in soc_ops field function pointers */
2816
2817 /**
2818 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2819 * @oh: struct omap_hwmod *
2820 *
2821 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2822 * does not have an IDLEST bit or if the module successfully leaves
2823 * slave idle; otherwise, pass along the return value of the
2824 * appropriate *_cm*_wait_module_ready() function.
2825 */
2826 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2827 {
2828 if (!oh)
2829 return -EINVAL;
2830
2831 if (oh->flags & HWMOD_NO_IDLEST)
2832 return 0;
2833
2834 if (!_find_mpu_rt_port(oh))
2835 return 0;
2836
2837 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2838
2839 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2840 oh->prcm.omap2.idlest_reg_id,
2841 oh->prcm.omap2.idlest_idle_bit);
2842 }
2843
2844 /**
2845 * _omap4_wait_target_ready - wait for a module to leave slave idle
2846 * @oh: struct omap_hwmod *
2847 *
2848 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2849 * does not have an IDLEST bit or if the module successfully leaves
2850 * slave idle; otherwise, pass along the return value of the
2851 * appropriate *_cm*_wait_module_ready() function.
2852 */
2853 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2854 {
2855 if (!oh)
2856 return -EINVAL;
2857
2858 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2859 return 0;
2860
2861 if (!_find_mpu_rt_port(oh))
2862 return 0;
2863
2864 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2865 return 0;
2866
2867 if (!_omap4_has_clkctrl_clock(oh))
2868 return 0;
2869
2870 /* XXX check module SIDLEMODE, hardreset status */
2871
2872 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2873 oh->clkdm->cm_inst,
2874 oh->prcm.omap4.clkctrl_offs, 0);
2875 }
2876
2877 /**
2878 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2879 * @oh: struct omap_hwmod * to assert hardreset
2880 * @ohri: hardreset line data
2881 *
2882 * Call omap2_prm_assert_hardreset() with parameters extracted from
2883 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2884 * use as an soc_ops function pointer. Passes along the return value
2885 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2886 * for removal when the PRM code is moved into drivers/.
2887 */
2888 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2889 struct omap_hwmod_rst_info *ohri)
2890 {
2891 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2892 oh->prcm.omap2.module_offs, 0);
2893 }
2894
2895 /**
2896 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2897 * @oh: struct omap_hwmod * to deassert hardreset
2898 * @ohri: hardreset line data
2899 *
2900 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2901 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2902 * use as an soc_ops function pointer. Passes along the return value
2903 * from omap2_prm_deassert_hardreset(). XXX This function is
2904 * scheduled for removal when the PRM code is moved into drivers/.
2905 */
2906 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2907 struct omap_hwmod_rst_info *ohri)
2908 {
2909 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2910 oh->prcm.omap2.module_offs, 0, 0);
2911 }
2912
2913 /**
2914 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2915 * @oh: struct omap_hwmod * to test hardreset
2916 * @ohri: hardreset line data
2917 *
2918 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2919 * from the hwmod @oh and the hardreset line data @ohri. Only
2920 * intended for use as an soc_ops function pointer. Passes along the
2921 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2922 * function is scheduled for removal when the PRM code is moved into
2923 * drivers/.
2924 */
2925 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2926 struct omap_hwmod_rst_info *ohri)
2927 {
2928 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2929 oh->prcm.omap2.module_offs, 0);
2930 }
2931
2932 /**
2933 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2934 * @oh: struct omap_hwmod * to assert hardreset
2935 * @ohri: hardreset line data
2936 *
2937 * Call omap4_prminst_assert_hardreset() with parameters extracted
2938 * from the hwmod @oh and the hardreset line data @ohri. Only
2939 * intended for use as an soc_ops function pointer. Passes along the
2940 * return value from omap4_prminst_assert_hardreset(). XXX This
2941 * function is scheduled for removal when the PRM code is moved into
2942 * drivers/.
2943 */
2944 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2945 struct omap_hwmod_rst_info *ohri)
2946 {
2947 if (!oh->clkdm)
2948 return -EINVAL;
2949
2950 return omap_prm_assert_hardreset(ohri->rst_shift,
2951 oh->clkdm->pwrdm.ptr->prcm_partition,
2952 oh->clkdm->pwrdm.ptr->prcm_offs,
2953 oh->prcm.omap4.rstctrl_offs);
2954 }
2955
2956 /**
2957 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2958 * @oh: struct omap_hwmod * to deassert hardreset
2959 * @ohri: hardreset line data
2960 *
2961 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2962 * from the hwmod @oh and the hardreset line data @ohri. Only
2963 * intended for use as an soc_ops function pointer. Passes along the
2964 * return value from omap4_prminst_deassert_hardreset(). XXX This
2965 * function is scheduled for removal when the PRM code is moved into
2966 * drivers/.
2967 */
2968 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2969 struct omap_hwmod_rst_info *ohri)
2970 {
2971 if (!oh->clkdm)
2972 return -EINVAL;
2973
2974 if (ohri->st_shift)
2975 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2976 oh->name, ohri->name);
2977 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2978 oh->clkdm->pwrdm.ptr->prcm_partition,
2979 oh->clkdm->pwrdm.ptr->prcm_offs,
2980 oh->prcm.omap4.rstctrl_offs,
2981 oh->prcm.omap4.rstctrl_offs +
2982 OMAP4_RST_CTRL_ST_OFFSET);
2983 }
2984
2985 /**
2986 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2987 * @oh: struct omap_hwmod * to test hardreset
2988 * @ohri: hardreset line data
2989 *
2990 * Call omap4_prminst_is_hardreset_asserted() with parameters
2991 * extracted from the hwmod @oh and the hardreset line data @ohri.
2992 * Only intended for use as an soc_ops function pointer. Passes along
2993 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2994 * This function is scheduled for removal when the PRM code is moved
2995 * into drivers/.
2996 */
2997 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2998 struct omap_hwmod_rst_info *ohri)
2999 {
3000 if (!oh->clkdm)
3001 return -EINVAL;
3002
3003 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
3004 oh->clkdm->pwrdm.ptr->
3005 prcm_partition,
3006 oh->clkdm->pwrdm.ptr->prcm_offs,
3007 oh->prcm.omap4.rstctrl_offs);
3008 }
3009
3010 /**
3011 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
3012 * @oh: struct omap_hwmod * to disable control for
3013 *
3014 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
3015 * will be using its main_clk to enable/disable the module. Returns
3016 * 0 if successful.
3017 */
3018 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
3019 {
3020 if (!oh)
3021 return -EINVAL;
3022
3023 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
3024
3025 return 0;
3026 }
3027
3028 /**
3029 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3030 * @oh: struct omap_hwmod * to deassert hardreset
3031 * @ohri: hardreset line data
3032 *
3033 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3034 * from the hwmod @oh and the hardreset line data @ohri. Only
3035 * intended for use as an soc_ops function pointer. Passes along the
3036 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3037 * function is scheduled for removal when the PRM code is moved into
3038 * drivers/.
3039 */
3040 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3041 struct omap_hwmod_rst_info *ohri)
3042 {
3043 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
3044 oh->clkdm->pwrdm.ptr->prcm_partition,
3045 oh->clkdm->pwrdm.ptr->prcm_offs,
3046 oh->prcm.omap4.rstctrl_offs,
3047 oh->prcm.omap4.rstst_offs);
3048 }
3049
3050 /* Public functions */
3051
3052 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3053 {
3054 if (oh->flags & HWMOD_16BIT_REG)
3055 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
3056 else
3057 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
3058 }
3059
3060 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3061 {
3062 if (oh->flags & HWMOD_16BIT_REG)
3063 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
3064 else
3065 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
3066 }
3067
3068 /**
3069 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3070 * @oh: struct omap_hwmod *
3071 *
3072 * This is a public function exposed to drivers. Some drivers may need to do
3073 * some settings before and after resetting the device. Those drivers after
3074 * doing the necessary settings could use this function to start a reset by
3075 * setting the SYSCONFIG.SOFTRESET bit.
3076 */
3077 int omap_hwmod_softreset(struct omap_hwmod *oh)
3078 {
3079 u32 v;
3080 int ret;
3081
3082 if (!oh || !(oh->_sysc_cache))
3083 return -EINVAL;
3084
3085 v = oh->_sysc_cache;
3086 ret = _set_softreset(oh, &v);
3087 if (ret)
3088 goto error;
3089 _write_sysconfig(v, oh);
3090
3091 ret = _clear_softreset(oh, &v);
3092 if (ret)
3093 goto error;
3094 _write_sysconfig(v, oh);
3095
3096 error:
3097 return ret;
3098 }
3099
3100 /**
3101 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3102 * @name: name of the omap_hwmod to look up
3103 *
3104 * Given a @name of an omap_hwmod, return a pointer to the registered
3105 * struct omap_hwmod *, or NULL upon error.
3106 */
3107 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3108 {
3109 struct omap_hwmod *oh;
3110
3111 if (!name)
3112 return NULL;
3113
3114 oh = _lookup(name);
3115
3116 return oh;
3117 }
3118
3119 /**
3120 * omap_hwmod_for_each - call function for each registered omap_hwmod
3121 * @fn: pointer to a callback function
3122 * @data: void * data to pass to callback function
3123 *
3124 * Call @fn for each registered omap_hwmod, passing @data to each
3125 * function. @fn must return 0 for success or any other value for
3126 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3127 * will stop and the non-zero return value will be passed to the
3128 * caller of omap_hwmod_for_each(). @fn is called with
3129 * omap_hwmod_for_each() held.
3130 */
3131 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3132 void *data)
3133 {
3134 struct omap_hwmod *temp_oh;
3135 int ret = 0;
3136
3137 if (!fn)
3138 return -EINVAL;
3139
3140 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3141 ret = (*fn)(temp_oh, data);
3142 if (ret)
3143 break;
3144 }
3145
3146 return ret;
3147 }
3148
3149 /**
3150 * omap_hwmod_register_links - register an array of hwmod links
3151 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3152 *
3153 * Intended to be called early in boot before the clock framework is
3154 * initialized. If @ois is not null, will register all omap_hwmods
3155 * listed in @ois that are valid for this chip. Returns -EINVAL if
3156 * omap_hwmod_init() hasn't been called before calling this function,
3157 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3158 * success.
3159 */
3160 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3161 {
3162 int r, i;
3163
3164 if (!inited)
3165 return -EINVAL;
3166
3167 if (!ois)
3168 return 0;
3169
3170 if (ois[0] == NULL) /* Empty list */
3171 return 0;
3172
3173 i = 0;
3174 do {
3175 r = _register_link(ois[i]);
3176 WARN(r && r != -EEXIST,
3177 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3178 ois[i]->master->name, ois[i]->slave->name, r);
3179 } while (ois[++i]);
3180
3181 return 0;
3182 }
3183
3184 /**
3185 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3186 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3187 *
3188 * If the hwmod data corresponding to the MPU subsystem IP block
3189 * hasn't been initialized and set up yet, do so now. This must be
3190 * done first since sleep dependencies may be added from other hwmods
3191 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3192 * return value.
3193 */
3194 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3195 {
3196 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3197 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3198 __func__, MPU_INITIATOR_NAME);
3199 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3200 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3201 }
3202
3203 /**
3204 * omap_hwmod_setup_one - set up a single hwmod
3205 * @oh_name: const char * name of the already-registered hwmod to set up
3206 *
3207 * Initialize and set up a single hwmod. Intended to be used for a
3208 * small number of early devices, such as the timer IP blocks used for
3209 * the scheduler clock. Must be called after omap2_clk_init().
3210 * Resolves the struct clk names to struct clk pointers for each
3211 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3212 * -EINVAL upon error or 0 upon success.
3213 */
3214 int __init omap_hwmod_setup_one(const char *oh_name)
3215 {
3216 struct omap_hwmod *oh;
3217
3218 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3219
3220 oh = _lookup(oh_name);
3221 if (!oh) {
3222 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3223 return -EINVAL;
3224 }
3225
3226 _ensure_mpu_hwmod_is_setup(oh);
3227
3228 _init(oh, NULL);
3229 _setup(oh, NULL);
3230
3231 return 0;
3232 }
3233
3234 /**
3235 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3236 *
3237 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3238 * early concole so that hwmod core doesn't reset and keep it in idle
3239 * that specific uart.
3240 */
3241 #ifdef CONFIG_SERIAL_EARLYCON
3242 static void __init omap_hwmod_setup_earlycon_flags(void)
3243 {
3244 struct device_node *np;
3245 struct omap_hwmod *oh;
3246 const char *uart;
3247
3248 np = of_find_node_by_path("/chosen");
3249 if (np) {
3250 uart = of_get_property(np, "stdout-path", NULL);
3251 if (uart) {
3252 np = of_find_node_by_path(uart);
3253 if (np) {
3254 uart = of_get_property(np, "ti,hwmods", NULL);
3255 oh = omap_hwmod_lookup(uart);
3256 if (oh)
3257 oh->flags |= DEBUG_OMAPUART_FLAGS;
3258 }
3259 }
3260 }
3261 }
3262 #endif
3263
3264 /**
3265 * omap_hwmod_setup_all - set up all registered IP blocks
3266 *
3267 * Initialize and set up all IP blocks registered with the hwmod code.
3268 * Must be called after omap2_clk_init(). Resolves the struct clk
3269 * names to struct clk pointers for each registered omap_hwmod. Also
3270 * calls _setup() on each hwmod. Returns 0 upon success.
3271 */
3272 static int __init omap_hwmod_setup_all(void)
3273 {
3274 _ensure_mpu_hwmod_is_setup(NULL);
3275
3276 omap_hwmod_for_each(_init, NULL);
3277 #ifdef CONFIG_SERIAL_EARLYCON
3278 omap_hwmod_setup_earlycon_flags();
3279 #endif
3280 omap_hwmod_for_each(_setup, NULL);
3281
3282 return 0;
3283 }
3284 omap_postcore_initcall(omap_hwmod_setup_all);
3285
3286 /**
3287 * omap_hwmod_enable - enable an omap_hwmod
3288 * @oh: struct omap_hwmod *
3289 *
3290 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3291 * Returns -EINVAL on error or passes along the return value from _enable().
3292 */
3293 int omap_hwmod_enable(struct omap_hwmod *oh)
3294 {
3295 int r;
3296 unsigned long flags;
3297
3298 if (!oh)
3299 return -EINVAL;
3300
3301 spin_lock_irqsave(&oh->_lock, flags);
3302 r = _enable(oh);
3303 spin_unlock_irqrestore(&oh->_lock, flags);
3304
3305 return r;
3306 }
3307
3308 /**
3309 * omap_hwmod_idle - idle an omap_hwmod
3310 * @oh: struct omap_hwmod *
3311 *
3312 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3313 * Returns -EINVAL on error or passes along the return value from _idle().
3314 */
3315 int omap_hwmod_idle(struct omap_hwmod *oh)
3316 {
3317 int r;
3318 unsigned long flags;
3319
3320 if (!oh)
3321 return -EINVAL;
3322
3323 spin_lock_irqsave(&oh->_lock, flags);
3324 r = _idle(oh);
3325 spin_unlock_irqrestore(&oh->_lock, flags);
3326
3327 return r;
3328 }
3329
3330 /**
3331 * omap_hwmod_shutdown - shutdown an omap_hwmod
3332 * @oh: struct omap_hwmod *
3333 *
3334 * Shutdown an omap_hwmod @oh. Intended to be called by
3335 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3336 * the return value from _shutdown().
3337 */
3338 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3339 {
3340 int r;
3341 unsigned long flags;
3342
3343 if (!oh)
3344 return -EINVAL;
3345
3346 spin_lock_irqsave(&oh->_lock, flags);
3347 r = _shutdown(oh);
3348 spin_unlock_irqrestore(&oh->_lock, flags);
3349
3350 return r;
3351 }
3352
3353 /*
3354 * IP block data retrieval functions
3355 */
3356
3357 /**
3358 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3359 * @oh: struct omap_hwmod *
3360 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3361 *
3362 * Count the number of struct resource array elements necessary to
3363 * contain omap_hwmod @oh resources. Intended to be called by code
3364 * that registers omap_devices. Intended to be used to determine the
3365 * size of a dynamically-allocated struct resource array, before
3366 * calling omap_hwmod_fill_resources(). Returns the number of struct
3367 * resource array elements needed.
3368 *
3369 * XXX This code is not optimized. It could attempt to merge adjacent
3370 * resource IDs.
3371 *
3372 */
3373 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3374 {
3375 int ret = 0;
3376
3377 if (flags & IORESOURCE_IRQ)
3378 ret += _count_mpu_irqs(oh);
3379
3380 if (flags & IORESOURCE_DMA)
3381 ret += _count_sdma_reqs(oh);
3382
3383 if (flags & IORESOURCE_MEM) {
3384 struct omap_hwmod_ocp_if *os;
3385
3386 list_for_each_entry(os, &oh->slave_ports, node)
3387 ret += _count_ocp_if_addr_spaces(os);
3388 }
3389
3390 return ret;
3391 }
3392
3393 /**
3394 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3395 * @oh: struct omap_hwmod *
3396 * @res: pointer to the first element of an array of struct resource to fill
3397 *
3398 * Fill the struct resource array @res with resource data from the
3399 * omap_hwmod @oh. Intended to be called by code that registers
3400 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3401 * number of array elements filled.
3402 */
3403 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3404 {
3405 struct omap_hwmod_ocp_if *os;
3406 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3407 int r = 0;
3408
3409 /* For each IRQ, DMA, memory area, fill in array.*/
3410
3411 mpu_irqs_cnt = _count_mpu_irqs(oh);
3412 for (i = 0; i < mpu_irqs_cnt; i++) {
3413 unsigned int irq;
3414
3415 if (oh->xlate_irq)
3416 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
3417 else
3418 irq = (oh->mpu_irqs + i)->irq;
3419 (res + r)->name = (oh->mpu_irqs + i)->name;
3420 (res + r)->start = irq;
3421 (res + r)->end = irq;
3422 (res + r)->flags = IORESOURCE_IRQ;
3423 r++;
3424 }
3425
3426 sdma_reqs_cnt = _count_sdma_reqs(oh);
3427 for (i = 0; i < sdma_reqs_cnt; i++) {
3428 (res + r)->name = (oh->sdma_reqs + i)->name;
3429 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3430 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3431 (res + r)->flags = IORESOURCE_DMA;
3432 r++;
3433 }
3434
3435 list_for_each_entry(os, &oh->slave_ports, node) {
3436 addr_cnt = _count_ocp_if_addr_spaces(os);
3437
3438 for (j = 0; j < addr_cnt; j++) {
3439 (res + r)->name = (os->addr + j)->name;
3440 (res + r)->start = (os->addr + j)->pa_start;
3441 (res + r)->end = (os->addr + j)->pa_end;
3442 (res + r)->flags = IORESOURCE_MEM;
3443 r++;
3444 }
3445 }
3446
3447 return r;
3448 }
3449
3450 /**
3451 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3452 * @oh: struct omap_hwmod *
3453 * @res: pointer to the array of struct resource to fill
3454 *
3455 * Fill the struct resource array @res with dma resource data from the
3456 * omap_hwmod @oh. Intended to be called by code that registers
3457 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3458 * number of array elements filled.
3459 */
3460 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3461 {
3462 int i, sdma_reqs_cnt;
3463 int r = 0;
3464
3465 sdma_reqs_cnt = _count_sdma_reqs(oh);
3466 for (i = 0; i < sdma_reqs_cnt; i++) {
3467 (res + r)->name = (oh->sdma_reqs + i)->name;
3468 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3469 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3470 (res + r)->flags = IORESOURCE_DMA;
3471 r++;
3472 }
3473
3474 return r;
3475 }
3476
3477 /**
3478 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3479 * @oh: struct omap_hwmod * to operate on
3480 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3481 * @name: pointer to the name of the data to fetch (optional)
3482 * @rsrc: pointer to a struct resource, allocated by the caller
3483 *
3484 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3485 * data for the IP block pointed to by @oh. The data will be filled
3486 * into a struct resource record pointed to by @rsrc. The struct
3487 * resource must be allocated by the caller. When @name is non-null,
3488 * the data associated with the matching entry in the IRQ/SDMA/address
3489 * space hwmod data arrays will be returned. If @name is null, the
3490 * first array entry will be returned. Data order is not meaningful
3491 * in hwmod data, so callers are strongly encouraged to use a non-null
3492 * @name whenever possible to avoid unpredictable effects if hwmod
3493 * data is later added that causes data ordering to change. This
3494 * function is only intended for use by OMAP core code. Device
3495 * drivers should not call this function - the appropriate bus-related
3496 * data accessor functions should be used instead. Returns 0 upon
3497 * success or a negative error code upon error.
3498 */
3499 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3500 const char *name, struct resource *rsrc)
3501 {
3502 int r;
3503 unsigned int irq, dma;
3504 u32 pa_start, pa_end;
3505
3506 if (!oh || !rsrc)
3507 return -EINVAL;
3508
3509 if (type == IORESOURCE_IRQ) {
3510 r = _get_mpu_irq_by_name(oh, name, &irq);
3511 if (r)
3512 return r;
3513
3514 rsrc->start = irq;
3515 rsrc->end = irq;
3516 } else if (type == IORESOURCE_DMA) {
3517 r = _get_sdma_req_by_name(oh, name, &dma);
3518 if (r)
3519 return r;
3520
3521 rsrc->start = dma;
3522 rsrc->end = dma;
3523 } else if (type == IORESOURCE_MEM) {
3524 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3525 if (r)
3526 return r;
3527
3528 rsrc->start = pa_start;
3529 rsrc->end = pa_end;
3530 } else {
3531 return -EINVAL;
3532 }
3533
3534 rsrc->flags = type;
3535 rsrc->name = name;
3536
3537 return 0;
3538 }
3539
3540 /**
3541 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3542 * @oh: struct omap_hwmod *
3543 *
3544 * Return the powerdomain pointer associated with the OMAP module
3545 * @oh's main clock. If @oh does not have a main clk, return the
3546 * powerdomain associated with the interface clock associated with the
3547 * module's MPU port. (XXX Perhaps this should use the SDMA port
3548 * instead?) Returns NULL on error, or a struct powerdomain * on
3549 * success.
3550 */
3551 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3552 {
3553 struct clk *c;
3554 struct omap_hwmod_ocp_if *oi;
3555 struct clockdomain *clkdm;
3556 struct clk_hw_omap *clk;
3557
3558 if (!oh)
3559 return NULL;
3560
3561 if (oh->clkdm)
3562 return oh->clkdm->pwrdm.ptr;
3563
3564 if (oh->_clk) {
3565 c = oh->_clk;
3566 } else {
3567 oi = _find_mpu_rt_port(oh);
3568 if (!oi)
3569 return NULL;
3570 c = oi->_clk;
3571 }
3572
3573 clk = to_clk_hw_omap(__clk_get_hw(c));
3574 clkdm = clk->clkdm;
3575 if (!clkdm)
3576 return NULL;
3577
3578 return clkdm->pwrdm.ptr;
3579 }
3580
3581 /**
3582 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3583 * @oh: struct omap_hwmod *
3584 *
3585 * Returns the virtual address corresponding to the beginning of the
3586 * module's register target, in the address range that is intended to
3587 * be used by the MPU. Returns the virtual address upon success or NULL
3588 * upon error.
3589 */
3590 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3591 {
3592 if (!oh)
3593 return NULL;
3594
3595 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3596 return NULL;
3597
3598 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3599 return NULL;
3600
3601 return oh->_mpu_rt_va;
3602 }
3603
3604 /*
3605 * XXX what about functions for drivers to save/restore ocp_sysconfig
3606 * for context save/restore operations?
3607 */
3608
3609 /**
3610 * omap_hwmod_enable_wakeup - allow device to wake up the system
3611 * @oh: struct omap_hwmod *
3612 *
3613 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3614 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3615 * this IP block if it has dynamic mux entries. Eventually this
3616 * should set PRCM wakeup registers to cause the PRCM to receive
3617 * wakeup events from the module. Does not set any wakeup routing
3618 * registers beyond this point - if the module is to wake up any other
3619 * module or subsystem, that must be set separately. Called by
3620 * omap_device code. Returns -EINVAL on error or 0 upon success.
3621 */
3622 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3623 {
3624 unsigned long flags;
3625 u32 v;
3626
3627 spin_lock_irqsave(&oh->_lock, flags);
3628
3629 if (oh->class->sysc &&
3630 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3631 v = oh->_sysc_cache;
3632 _enable_wakeup(oh, &v);
3633 _write_sysconfig(v, oh);
3634 }
3635
3636 spin_unlock_irqrestore(&oh->_lock, flags);
3637
3638 return 0;
3639 }
3640
3641 /**
3642 * omap_hwmod_disable_wakeup - prevent device from waking the system
3643 * @oh: struct omap_hwmod *
3644 *
3645 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3646 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3647 * events for this IP block if it has dynamic mux entries. Eventually
3648 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3649 * wakeup events from the module. Does not set any wakeup routing
3650 * registers beyond this point - if the module is to wake up any other
3651 * module or subsystem, that must be set separately. Called by
3652 * omap_device code. Returns -EINVAL on error or 0 upon success.
3653 */
3654 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3655 {
3656 unsigned long flags;
3657 u32 v;
3658
3659 spin_lock_irqsave(&oh->_lock, flags);
3660
3661 if (oh->class->sysc &&
3662 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3663 v = oh->_sysc_cache;
3664 _disable_wakeup(oh, &v);
3665 _write_sysconfig(v, oh);
3666 }
3667
3668 spin_unlock_irqrestore(&oh->_lock, flags);
3669
3670 return 0;
3671 }
3672
3673 /**
3674 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3675 * contained in the hwmod module.
3676 * @oh: struct omap_hwmod *
3677 * @name: name of the reset line to lookup and assert
3678 *
3679 * Some IP like dsp, ipu or iva contain processor that require
3680 * an HW reset line to be assert / deassert in order to enable fully
3681 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3682 * yet supported on this OMAP; otherwise, passes along the return value
3683 * from _assert_hardreset().
3684 */
3685 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3686 {
3687 int ret;
3688 unsigned long flags;
3689
3690 if (!oh)
3691 return -EINVAL;
3692
3693 spin_lock_irqsave(&oh->_lock, flags);
3694 ret = _assert_hardreset(oh, name);
3695 spin_unlock_irqrestore(&oh->_lock, flags);
3696
3697 return ret;
3698 }
3699
3700 /**
3701 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3702 * contained in the hwmod module.
3703 * @oh: struct omap_hwmod *
3704 * @name: name of the reset line to look up and deassert
3705 *
3706 * Some IP like dsp, ipu or iva contain processor that require
3707 * an HW reset line to be assert / deassert in order to enable fully
3708 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3709 * yet supported on this OMAP; otherwise, passes along the return value
3710 * from _deassert_hardreset().
3711 */
3712 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3713 {
3714 int ret;
3715 unsigned long flags;
3716
3717 if (!oh)
3718 return -EINVAL;
3719
3720 spin_lock_irqsave(&oh->_lock, flags);
3721 ret = _deassert_hardreset(oh, name);
3722 spin_unlock_irqrestore(&oh->_lock, flags);
3723
3724 return ret;
3725 }
3726
3727 /**
3728 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3729 * @classname: struct omap_hwmod_class name to search for
3730 * @fn: callback function pointer to call for each hwmod in class @classname
3731 * @user: arbitrary context data to pass to the callback function
3732 *
3733 * For each omap_hwmod of class @classname, call @fn.
3734 * If the callback function returns something other than
3735 * zero, the iterator is terminated, and the callback function's return
3736 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3737 * if @classname or @fn are NULL, or passes back the error code from @fn.
3738 */
3739 int omap_hwmod_for_each_by_class(const char *classname,
3740 int (*fn)(struct omap_hwmod *oh,
3741 void *user),
3742 void *user)
3743 {
3744 struct omap_hwmod *temp_oh;
3745 int ret = 0;
3746
3747 if (!classname || !fn)
3748 return -EINVAL;
3749
3750 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3751 __func__, classname);
3752
3753 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3754 if (!strcmp(temp_oh->class->name, classname)) {
3755 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3756 __func__, temp_oh->name);
3757 ret = (*fn)(temp_oh, user);
3758 if (ret)
3759 break;
3760 }
3761 }
3762
3763 if (ret)
3764 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3765 __func__, ret);
3766
3767 return ret;
3768 }
3769
3770 /**
3771 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3772 * @oh: struct omap_hwmod *
3773 * @state: state that _setup() should leave the hwmod in
3774 *
3775 * Sets the hwmod state that @oh will enter at the end of _setup()
3776 * (called by omap_hwmod_setup_*()). See also the documentation
3777 * for _setup_postsetup(), above. Returns 0 upon success or
3778 * -EINVAL if there is a problem with the arguments or if the hwmod is
3779 * in the wrong state.
3780 */
3781 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3782 {
3783 int ret;
3784 unsigned long flags;
3785
3786 if (!oh)
3787 return -EINVAL;
3788
3789 if (state != _HWMOD_STATE_DISABLED &&
3790 state != _HWMOD_STATE_ENABLED &&
3791 state != _HWMOD_STATE_IDLE)
3792 return -EINVAL;
3793
3794 spin_lock_irqsave(&oh->_lock, flags);
3795
3796 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3797 ret = -EINVAL;
3798 goto ohsps_unlock;
3799 }
3800
3801 oh->_postsetup_state = state;
3802 ret = 0;
3803
3804 ohsps_unlock:
3805 spin_unlock_irqrestore(&oh->_lock, flags);
3806
3807 return ret;
3808 }
3809
3810 /**
3811 * omap_hwmod_get_context_loss_count - get lost context count
3812 * @oh: struct omap_hwmod *
3813 *
3814 * Returns the context loss count of associated @oh
3815 * upon success, or zero if no context loss data is available.
3816 *
3817 * On OMAP4, this queries the per-hwmod context loss register,
3818 * assuming one exists. If not, or on OMAP2/3, this queries the
3819 * enclosing powerdomain context loss count.
3820 */
3821 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3822 {
3823 struct powerdomain *pwrdm;
3824 int ret = 0;
3825
3826 if (soc_ops.get_context_lost)
3827 return soc_ops.get_context_lost(oh);
3828
3829 pwrdm = omap_hwmod_get_pwrdm(oh);
3830 if (pwrdm)
3831 ret = pwrdm_get_context_loss_count(pwrdm);
3832
3833 return ret;
3834 }
3835
3836 /**
3837 * omap_hwmod_init - initialize the hwmod code
3838 *
3839 * Sets up some function pointers needed by the hwmod code to operate on the
3840 * currently-booted SoC. Intended to be called once during kernel init
3841 * before any hwmods are registered. No return value.
3842 */
3843 void __init omap_hwmod_init(void)
3844 {
3845 if (cpu_is_omap24xx()) {
3846 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3847 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3848 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3849 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3850 } else if (cpu_is_omap34xx()) {
3851 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
3852 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3853 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3854 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3855 soc_ops.init_clkdm = _init_clkdm;
3856 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
3857 soc_ops.enable_module = _omap4_enable_module;
3858 soc_ops.disable_module = _omap4_disable_module;
3859 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3860 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3861 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3862 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3863 soc_ops.init_clkdm = _init_clkdm;
3864 soc_ops.update_context_lost = _omap4_update_context_lost;
3865 soc_ops.get_context_lost = _omap4_get_context_lost;
3866 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3867 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
3868 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
3869 soc_is_am43xx()) {
3870 soc_ops.enable_module = _omap4_enable_module;
3871 soc_ops.disable_module = _omap4_disable_module;
3872 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3873 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3874 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
3875 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3876 soc_ops.init_clkdm = _init_clkdm;
3877 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
3878 } else {
3879 WARN(1, "omap_hwmod: unknown SoC type\n");
3880 }
3881
3882 _init_clkctrl_providers();
3883
3884 inited = true;
3885 }
3886
3887 /**
3888 * omap_hwmod_get_main_clk - get pointer to main clock name
3889 * @oh: struct omap_hwmod *
3890 *
3891 * Returns the main clock name assocated with @oh upon success,
3892 * or NULL if @oh is NULL.
3893 */
3894 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3895 {
3896 if (!oh)
3897 return NULL;
3898
3899 return oh->main_clk;
3900 }