2 * omap_hwmod implementation for OMAP2/3/4
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | ({read,write}l_relaxed, clk*) |
76 * +-------------------------------+
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/clk-provider.h>
135 #include <linux/delay.h>
136 #include <linux/err.h>
137 #include <linux/list.h>
138 #include <linux/mutex.h>
139 #include <linux/spinlock.h>
140 #include <linux/slab.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/memblock.h>
146 #include <linux/platform_data/ti-sysc.h>
148 #include <dt-bindings/bus/ti-sysc.h>
150 #include <asm/system_misc.h>
153 #include "omap_hwmod.h"
157 #include "clockdomain.h"
160 #include "powerdomain.h"
168 #include "prminst44xx.h"
170 #include "wd_timer.h"
172 /* Name of the OMAP hwmod for the MPU */
173 #define MPU_INITIATOR_NAME "mpu"
176 * Number of struct omap_hwmod_link records per struct
177 * omap_hwmod_ocp_if record (master->slave and slave->master)
179 #define LINKS_PER_OCP_IF 2
182 * Address offset (in bytes) between the reset control and the reset
183 * status registers: 4 bytes on OMAP4
185 #define OMAP4_RST_CTRL_ST_OFFSET 4
188 * Maximum length for module clock handle names
190 #define MOD_CLK_MAX_NAME_LEN 32
193 * struct clkctrl_provider - clkctrl provider mapping data
194 * @num_addrs: number of base address ranges for the provider
195 * @addr: base address(es) for the provider
196 * @size: size(s) of the provider address space(s)
197 * @node: device node associated with the provider
200 struct clkctrl_provider
{
204 struct device_node
*node
;
205 struct list_head link
;
208 static LIST_HEAD(clkctrl_providers
);
211 * struct omap_hwmod_reset - IP specific reset functions
212 * @match: string to match against the module name
213 * @len: number of characters to match
214 * @reset: IP specific reset function
216 * Used only in cases where struct omap_hwmod is dynamically allocated.
218 struct omap_hwmod_reset
{
221 int (*reset
)(struct omap_hwmod
*oh
);
225 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
226 * @enable_module: function to enable a module (via MODULEMODE)
227 * @disable_module: function to disable a module (via MODULEMODE)
229 * XXX Eventually this functionality will be hidden inside the PRM/CM
230 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
231 * conditionals in this code.
233 struct omap_hwmod_soc_ops
{
234 void (*enable_module
)(struct omap_hwmod
*oh
);
235 int (*disable_module
)(struct omap_hwmod
*oh
);
236 int (*wait_target_ready
)(struct omap_hwmod
*oh
);
237 int (*assert_hardreset
)(struct omap_hwmod
*oh
,
238 struct omap_hwmod_rst_info
*ohri
);
239 int (*deassert_hardreset
)(struct omap_hwmod
*oh
,
240 struct omap_hwmod_rst_info
*ohri
);
241 int (*is_hardreset_asserted
)(struct omap_hwmod
*oh
,
242 struct omap_hwmod_rst_info
*ohri
);
243 int (*init_clkdm
)(struct omap_hwmod
*oh
);
244 void (*update_context_lost
)(struct omap_hwmod
*oh
);
245 int (*get_context_lost
)(struct omap_hwmod
*oh
);
246 int (*disable_direct_prcm
)(struct omap_hwmod
*oh
);
247 u32 (*xlate_clkctrl
)(struct omap_hwmod
*oh
);
250 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
251 static struct omap_hwmod_soc_ops soc_ops
;
253 /* omap_hwmod_list contains all registered struct omap_hwmods */
254 static LIST_HEAD(omap_hwmod_list
);
255 static DEFINE_MUTEX(list_lock
);
257 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
258 static struct omap_hwmod
*mpu_oh
;
260 /* inited: set to true once the hwmod code is initialized */
263 /* Private functions */
266 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
267 * @oh: struct omap_hwmod *
269 * Load the current value of the hwmod OCP_SYSCONFIG register into the
270 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
271 * OCP_SYSCONFIG register or 0 upon success.
273 static int _update_sysc_cache(struct omap_hwmod
*oh
)
275 if (!oh
->class->sysc
) {
276 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh
->name
);
280 /* XXX ensure module interface clock is up */
282 oh
->_sysc_cache
= omap_hwmod_read(oh
, oh
->class->sysc
->sysc_offs
);
284 if (!(oh
->class->sysc
->sysc_flags
& SYSC_NO_CACHE
))
285 oh
->_int_flags
|= _HWMOD_SYSCONFIG_LOADED
;
291 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
292 * @v: OCP_SYSCONFIG value to write
293 * @oh: struct omap_hwmod *
295 * Write @v into the module class' OCP_SYSCONFIG register, if it has
296 * one. No return value.
298 static void _write_sysconfig(u32 v
, struct omap_hwmod
*oh
)
300 if (!oh
->class->sysc
) {
301 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh
->name
);
305 /* XXX ensure module interface clock is up */
307 /* Module might have lost context, always update cache and register */
311 * Some IP blocks (such as RTC) require unlocking of IP before
312 * accessing its registers. If a function pointer is present
313 * to unlock, then call it before accessing sysconfig and
314 * call lock after writing sysconfig.
316 if (oh
->class->unlock
)
317 oh
->class->unlock(oh
);
319 omap_hwmod_write(v
, oh
, oh
->class->sysc
->sysc_offs
);
326 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
327 * @oh: struct omap_hwmod *
328 * @standbymode: MIDLEMODE field bits
329 * @v: pointer to register contents to modify
331 * Update the master standby mode bits in @v to be @standbymode for
332 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
333 * upon error or 0 upon success.
335 static int _set_master_standbymode(struct omap_hwmod
*oh
, u8 standbymode
,
341 if (!oh
->class->sysc
||
342 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_MIDLEMODE
))
345 if (!oh
->class->sysc
->sysc_fields
) {
346 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
350 mstandby_shift
= oh
->class->sysc
->sysc_fields
->midle_shift
;
351 mstandby_mask
= (0x3 << mstandby_shift
);
353 *v
&= ~mstandby_mask
;
354 *v
|= __ffs(standbymode
) << mstandby_shift
;
360 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
361 * @oh: struct omap_hwmod *
362 * @idlemode: SIDLEMODE field bits
363 * @v: pointer to register contents to modify
365 * Update the slave idle mode bits in @v to be @idlemode for the @oh
366 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
369 static int _set_slave_idlemode(struct omap_hwmod
*oh
, u8 idlemode
, u32
*v
)
374 if (!oh
->class->sysc
||
375 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_SIDLEMODE
))
378 if (!oh
->class->sysc
->sysc_fields
) {
379 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
383 sidle_shift
= oh
->class->sysc
->sysc_fields
->sidle_shift
;
384 sidle_mask
= (0x3 << sidle_shift
);
387 *v
|= __ffs(idlemode
) << sidle_shift
;
393 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
394 * @oh: struct omap_hwmod *
395 * @clockact: CLOCKACTIVITY field bits
396 * @v: pointer to register contents to modify
398 * Update the clockactivity mode bits in @v to be @clockact for the
399 * @oh hwmod. Used for additional powersaving on some modules. Does
400 * not write to the hardware. Returns -EINVAL upon error or 0 upon
403 static int _set_clockactivity(struct omap_hwmod
*oh
, u8 clockact
, u32
*v
)
408 if (!oh
->class->sysc
||
409 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_CLOCKACTIVITY
))
412 if (!oh
->class->sysc
->sysc_fields
) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
417 clkact_shift
= oh
->class->sysc
->sysc_fields
->clkact_shift
;
418 clkact_mask
= (0x3 << clkact_shift
);
421 *v
|= clockact
<< clkact_shift
;
427 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
428 * @oh: struct omap_hwmod *
429 * @v: pointer to register contents to modify
431 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
432 * error or 0 upon success.
434 static int _set_softreset(struct omap_hwmod
*oh
, u32
*v
)
438 if (!oh
->class->sysc
||
439 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_SOFTRESET
))
442 if (!oh
->class->sysc
->sysc_fields
) {
443 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
447 softrst_mask
= (0x1 << oh
->class->sysc
->sysc_fields
->srst_shift
);
455 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
456 * @oh: struct omap_hwmod *
457 * @v: pointer to register contents to modify
459 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
460 * error or 0 upon success.
462 static int _clear_softreset(struct omap_hwmod
*oh
, u32
*v
)
466 if (!oh
->class->sysc
||
467 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_SOFTRESET
))
470 if (!oh
->class->sysc
->sysc_fields
) {
472 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
477 softrst_mask
= (0x1 << oh
->class->sysc
->sysc_fields
->srst_shift
);
485 * _wait_softreset_complete - wait for an OCP softreset to complete
486 * @oh: struct omap_hwmod * to wait on
488 * Wait until the IP block represented by @oh reports that its OCP
489 * softreset is complete. This can be triggered by software (see
490 * _ocp_softreset()) or by hardware upon returning from off-mode (one
491 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
492 * microseconds. Returns the number of microseconds waited.
494 static int _wait_softreset_complete(struct omap_hwmod
*oh
)
496 struct omap_hwmod_class_sysconfig
*sysc
;
500 sysc
= oh
->class->sysc
;
502 if (sysc
->sysc_flags
& SYSS_HAS_RESET_STATUS
&& sysc
->syss_offs
> 0)
503 omap_test_timeout((omap_hwmod_read(oh
, sysc
->syss_offs
)
504 & SYSS_RESETDONE_MASK
),
505 MAX_MODULE_SOFTRESET_WAIT
, c
);
506 else if (sysc
->sysc_flags
& SYSC_HAS_RESET_STATUS
) {
507 softrst_mask
= (0x1 << sysc
->sysc_fields
->srst_shift
);
508 omap_test_timeout(!(omap_hwmod_read(oh
, sysc
->sysc_offs
)
510 MAX_MODULE_SOFTRESET_WAIT
, c
);
517 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
518 * @oh: struct omap_hwmod *
520 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
521 * of some modules. When the DMA must perform read/write accesses, the
522 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
523 * for power management, software must set the DMADISABLE bit back to 1.
525 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
526 * error or 0 upon success.
528 static int _set_dmadisable(struct omap_hwmod
*oh
)
533 if (!oh
->class->sysc
||
534 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_DMADISABLE
))
537 if (!oh
->class->sysc
->sysc_fields
) {
538 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
542 /* clocks must be on for this operation */
543 if (oh
->_state
!= _HWMOD_STATE_ENABLED
) {
544 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh
->name
);
548 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh
->name
);
552 (0x1 << oh
->class->sysc
->sysc_fields
->dmadisable_shift
);
553 v
|= dmadisable_mask
;
554 _write_sysconfig(v
, oh
);
560 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
561 * @oh: struct omap_hwmod *
562 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
563 * @v: pointer to register contents to modify
565 * Update the module autoidle bit in @v to be @autoidle for the @oh
566 * hwmod. The autoidle bit controls whether the module can gate
567 * internal clocks automatically when it isn't doing anything; the
568 * exact function of this bit varies on a per-module basis. This
569 * function does not write to the hardware. Returns -EINVAL upon
570 * error or 0 upon success.
572 static int _set_module_autoidle(struct omap_hwmod
*oh
, u8 autoidle
,
578 if (!oh
->class->sysc
||
579 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_AUTOIDLE
))
582 if (!oh
->class->sysc
->sysc_fields
) {
583 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
587 autoidle_shift
= oh
->class->sysc
->sysc_fields
->autoidle_shift
;
588 autoidle_mask
= (0x1 << autoidle_shift
);
590 *v
&= ~autoidle_mask
;
591 *v
|= autoidle
<< autoidle_shift
;
597 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
598 * @oh: struct omap_hwmod *
600 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
601 * upon error or 0 upon success.
603 static int _enable_wakeup(struct omap_hwmod
*oh
, u32
*v
)
605 if (!oh
->class->sysc
||
606 !((oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
) ||
607 (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
) ||
608 (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)))
611 if (!oh
->class->sysc
->sysc_fields
) {
612 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
616 if (oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
)
617 *v
|= 0x1 << oh
->class->sysc
->sysc_fields
->enwkup_shift
;
619 if (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
)
620 _set_slave_idlemode(oh
, HWMOD_IDLEMODE_SMART_WKUP
, v
);
621 if (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)
622 _set_master_standbymode(oh
, HWMOD_IDLEMODE_SMART_WKUP
, v
);
624 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
630 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
631 * @oh: struct omap_hwmod *
633 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
634 * upon error or 0 upon success.
636 static int _disable_wakeup(struct omap_hwmod
*oh
, u32
*v
)
638 if (!oh
->class->sysc
||
639 !((oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
) ||
640 (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
) ||
641 (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)))
644 if (!oh
->class->sysc
->sysc_fields
) {
645 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh
->name
);
649 if (oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
)
650 *v
&= ~(0x1 << oh
->class->sysc
->sysc_fields
->enwkup_shift
);
652 if (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
)
653 _set_slave_idlemode(oh
, HWMOD_IDLEMODE_SMART
, v
);
654 if (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)
655 _set_master_standbymode(oh
, HWMOD_IDLEMODE_SMART
, v
);
657 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
662 static struct clockdomain
*_get_clkdm(struct omap_hwmod
*oh
)
664 struct clk_hw_omap
*clk
;
668 } else if (oh
->_clk
) {
669 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh
->_clk
)))
671 clk
= to_clk_hw_omap(__clk_get_hw(oh
->_clk
));
678 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
679 * @oh: struct omap_hwmod *
681 * Prevent the hardware module @oh from entering idle while the
682 * hardare module initiator @init_oh is active. Useful when a module
683 * will be accessed by a particular initiator (e.g., if a module will
684 * be accessed by the IVA, there should be a sleepdep between the IVA
685 * initiator and the module). Only applies to modules in smart-idle
686 * mode. If the clockdomain is marked as not needing autodeps, return
687 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
688 * passes along clkdm_add_sleepdep() value upon success.
690 static int _add_initiator_dep(struct omap_hwmod
*oh
, struct omap_hwmod
*init_oh
)
692 struct clockdomain
*clkdm
, *init_clkdm
;
694 clkdm
= _get_clkdm(oh
);
695 init_clkdm
= _get_clkdm(init_oh
);
697 if (!clkdm
|| !init_clkdm
)
700 if (clkdm
&& clkdm
->flags
& CLKDM_NO_AUTODEPS
)
703 return clkdm_add_sleepdep(clkdm
, init_clkdm
);
707 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
708 * @oh: struct omap_hwmod *
710 * Allow the hardware module @oh to enter idle while the hardare
711 * module initiator @init_oh is active. Useful when a module will not
712 * be accessed by a particular initiator (e.g., if a module will not
713 * be accessed by the IVA, there should be no sleepdep between the IVA
714 * initiator and the module). Only applies to modules in smart-idle
715 * mode. If the clockdomain is marked as not needing autodeps, return
716 * 0 without doing anything. Returns -EINVAL upon error or passes
717 * along clkdm_del_sleepdep() value upon success.
719 static int _del_initiator_dep(struct omap_hwmod
*oh
, struct omap_hwmod
*init_oh
)
721 struct clockdomain
*clkdm
, *init_clkdm
;
723 clkdm
= _get_clkdm(oh
);
724 init_clkdm
= _get_clkdm(init_oh
);
726 if (!clkdm
|| !init_clkdm
)
729 if (clkdm
&& clkdm
->flags
& CLKDM_NO_AUTODEPS
)
732 return clkdm_del_sleepdep(clkdm
, init_clkdm
);
735 static const struct of_device_id ti_clkctrl_match_table
[] __initconst
= {
736 { .compatible
= "ti,clkctrl" },
740 static int __init
_setup_clkctrl_provider(struct device_node
*np
)
743 struct clkctrl_provider
*provider
;
747 provider
= memblock_alloc(sizeof(*provider
), SMP_CACHE_BYTES
);
753 provider
->num_addrs
=
754 of_property_count_elems_of_size(np
, "reg", sizeof(u32
)) / 2;
757 memblock_alloc(sizeof(void *) * provider
->num_addrs
,
763 memblock_alloc(sizeof(u32
) * provider
->num_addrs
,
768 for (i
= 0; i
< provider
->num_addrs
; i
++) {
769 addrp
= of_get_address(np
, i
, &size
, NULL
);
770 provider
->addr
[i
] = (u32
)of_translate_address(np
, addrp
);
771 provider
->size
[i
] = size
;
772 pr_debug("%s: %pOF: %x...%x\n", __func__
, np
, provider
->addr
[i
],
773 provider
->addr
[i
] + provider
->size
[i
]);
776 list_add(&provider
->link
, &clkctrl_providers
);
781 static int __init
_init_clkctrl_providers(void)
783 struct device_node
*np
;
786 for_each_matching_node(np
, ti_clkctrl_match_table
) {
787 ret
= _setup_clkctrl_provider(np
);
795 static u32
_omap4_xlate_clkctrl(struct omap_hwmod
*oh
)
797 if (!oh
->prcm
.omap4
.modulemode
)
800 return omap_cm_xlate_clkctrl(oh
->clkdm
->prcm_partition
,
802 oh
->prcm
.omap4
.clkctrl_offs
);
805 static struct clk
*_lookup_clkctrl_clk(struct omap_hwmod
*oh
)
807 struct clkctrl_provider
*provider
;
811 if (!soc_ops
.xlate_clkctrl
)
814 addr
= soc_ops
.xlate_clkctrl(oh
);
818 pr_debug("%s: %s: addr=%x\n", __func__
, oh
->name
, addr
);
820 list_for_each_entry(provider
, &clkctrl_providers
, link
) {
823 for (i
= 0; i
< provider
->num_addrs
; i
++) {
824 if (provider
->addr
[i
] <= addr
&&
825 provider
->addr
[i
] + provider
->size
[i
] > addr
) {
826 struct of_phandle_args clkspec
;
828 clkspec
.np
= provider
->node
;
829 clkspec
.args_count
= 2;
830 clkspec
.args
[0] = addr
- provider
->addr
[0];
833 clk
= of_clk_get_from_provider(&clkspec
);
835 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
836 __func__
, oh
->name
, clk
,
837 clkspec
.args
[0], provider
->node
);
848 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
849 * @oh: struct omap_hwmod *
851 * Called from _init_clocks(). Populates the @oh _clk (main
852 * functional clock pointer) if a clock matching the hwmod name is found,
853 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
855 static int _init_main_clk(struct omap_hwmod
*oh
)
858 struct clk
*clk
= NULL
;
860 clk
= _lookup_clkctrl_clk(oh
);
862 if (!IS_ERR_OR_NULL(clk
)) {
863 pr_debug("%s: mapped main_clk %s for %s\n", __func__
,
864 __clk_get_name(clk
), oh
->name
);
865 oh
->main_clk
= __clk_get_name(clk
);
867 soc_ops
.disable_direct_prcm(oh
);
872 oh
->_clk
= clk_get(NULL
, oh
->main_clk
);
875 if (IS_ERR(oh
->_clk
)) {
876 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
877 oh
->name
, oh
->main_clk
);
881 * HACK: This needs a re-visit once clk_prepare() is implemented
882 * to do something meaningful. Today its just a no-op.
883 * If clk_prepare() is used at some point to do things like
884 * voltage scaling etc, then this would have to be moved to
885 * some point where subsystems like i2c and pmic become
888 clk_prepare(oh
->_clk
);
891 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
892 oh
->name
, oh
->main_clk
);
898 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
899 * @oh: struct omap_hwmod *
901 * Called from _init_clocks(). Populates the @oh OCP slave interface
902 * clock pointers. Returns 0 on success or -EINVAL on error.
904 static int _init_interface_clks(struct omap_hwmod
*oh
)
906 struct omap_hwmod_ocp_if
*os
;
910 list_for_each_entry(os
, &oh
->slave_ports
, node
) {
914 c
= clk_get(NULL
, os
->clk
);
916 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
923 * HACK: This needs a re-visit once clk_prepare() is implemented
924 * to do something meaningful. Today its just a no-op.
925 * If clk_prepare() is used at some point to do things like
926 * voltage scaling etc, then this would have to be moved to
927 * some point where subsystems like i2c and pmic become
930 clk_prepare(os
->_clk
);
937 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
938 * @oh: struct omap_hwmod *
940 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
941 * clock pointers. Returns 0 on success or -EINVAL on error.
943 static int _init_opt_clks(struct omap_hwmod
*oh
)
945 struct omap_hwmod_opt_clk
*oc
;
950 for (i
= oh
->opt_clks_cnt
, oc
= oh
->opt_clks
; i
> 0; i
--, oc
++) {
951 c
= clk_get(NULL
, oc
->clk
);
953 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
960 * HACK: This needs a re-visit once clk_prepare() is implemented
961 * to do something meaningful. Today its just a no-op.
962 * If clk_prepare() is used at some point to do things like
963 * voltage scaling etc, then this would have to be moved to
964 * some point where subsystems like i2c and pmic become
967 clk_prepare(oc
->_clk
);
973 static void _enable_optional_clocks(struct omap_hwmod
*oh
)
975 struct omap_hwmod_opt_clk
*oc
;
978 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh
->name
);
980 for (i
= oh
->opt_clks_cnt
, oc
= oh
->opt_clks
; i
> 0; i
--, oc
++)
982 pr_debug("omap_hwmod: enable %s:%s\n", oc
->role
,
983 __clk_get_name(oc
->_clk
));
984 clk_enable(oc
->_clk
);
988 static void _disable_optional_clocks(struct omap_hwmod
*oh
)
990 struct omap_hwmod_opt_clk
*oc
;
993 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh
->name
);
995 for (i
= oh
->opt_clks_cnt
, oc
= oh
->opt_clks
; i
> 0; i
--, oc
++)
997 pr_debug("omap_hwmod: disable %s:%s\n", oc
->role
,
998 __clk_get_name(oc
->_clk
));
999 clk_disable(oc
->_clk
);
1004 * _enable_clocks - enable hwmod main clock and interface clocks
1005 * @oh: struct omap_hwmod *
1007 * Enables all clocks necessary for register reads and writes to succeed
1008 * on the hwmod @oh. Returns 0.
1010 static int _enable_clocks(struct omap_hwmod
*oh
)
1012 struct omap_hwmod_ocp_if
*os
;
1014 pr_debug("omap_hwmod: %s: enabling clocks\n", oh
->name
);
1016 if (oh
->flags
& HWMOD_OPT_CLKS_NEEDED
)
1017 _enable_optional_clocks(oh
);
1020 clk_enable(oh
->_clk
);
1022 list_for_each_entry(os
, &oh
->slave_ports
, node
) {
1023 if (os
->_clk
&& (os
->flags
& OCPIF_SWSUP_IDLE
)) {
1024 omap2_clk_deny_idle(os
->_clk
);
1025 clk_enable(os
->_clk
);
1029 /* The opt clocks are controlled by the device driver. */
1035 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1036 * @oh: struct omap_hwmod *
1038 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod
*oh
)
1040 if (oh
->prcm
.omap4
.flags
& HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK
)
1047 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1048 * @oh: struct omap_hwmod *
1050 static bool _omap4_has_clkctrl_clock(struct omap_hwmod
*oh
)
1052 if (oh
->prcm
.omap4
.clkctrl_offs
)
1055 if (!oh
->prcm
.omap4
.clkctrl_offs
&&
1056 oh
->prcm
.omap4
.flags
& HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET
)
1063 * _disable_clocks - disable hwmod main clock and interface clocks
1064 * @oh: struct omap_hwmod *
1066 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1068 static int _disable_clocks(struct omap_hwmod
*oh
)
1070 struct omap_hwmod_ocp_if
*os
;
1072 pr_debug("omap_hwmod: %s: disabling clocks\n", oh
->name
);
1075 clk_disable(oh
->_clk
);
1077 list_for_each_entry(os
, &oh
->slave_ports
, node
) {
1078 if (os
->_clk
&& (os
->flags
& OCPIF_SWSUP_IDLE
)) {
1079 clk_disable(os
->_clk
);
1080 omap2_clk_allow_idle(os
->_clk
);
1084 if (oh
->flags
& HWMOD_OPT_CLKS_NEEDED
)
1085 _disable_optional_clocks(oh
);
1087 /* The opt clocks are controlled by the device driver. */
1093 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1094 * @oh: struct omap_hwmod *
1096 * Enables the PRCM module mode related to the hwmod @oh.
1099 static void _omap4_enable_module(struct omap_hwmod
*oh
)
1101 if (!oh
->clkdm
|| !oh
->prcm
.omap4
.modulemode
||
1102 _omap4_clkctrl_managed_by_clkfwk(oh
))
1105 pr_debug("omap_hwmod: %s: %s: %d\n",
1106 oh
->name
, __func__
, oh
->prcm
.omap4
.modulemode
);
1108 omap_cm_module_enable(oh
->prcm
.omap4
.modulemode
,
1109 oh
->clkdm
->prcm_partition
,
1110 oh
->clkdm
->cm_inst
, oh
->prcm
.omap4
.clkctrl_offs
);
1114 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1115 * @oh: struct omap_hwmod *
1117 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1118 * does not have an IDLEST bit or if the module successfully enters
1119 * slave idle; otherwise, pass along the return value of the
1120 * appropriate *_cm*_wait_module_idle() function.
1122 static int _omap4_wait_target_disable(struct omap_hwmod
*oh
)
1127 if (oh
->_int_flags
& _HWMOD_NO_MPU_PORT
|| !oh
->clkdm
)
1130 if (oh
->flags
& HWMOD_NO_IDLEST
)
1133 if (_omap4_clkctrl_managed_by_clkfwk(oh
))
1136 if (!_omap4_has_clkctrl_clock(oh
))
1139 return omap_cm_wait_module_idle(oh
->clkdm
->prcm_partition
,
1141 oh
->prcm
.omap4
.clkctrl_offs
, 0);
1145 * _save_mpu_port_index - find and save the index to @oh's MPU port
1146 * @oh: struct omap_hwmod *
1148 * Determines the array index of the OCP slave port that the MPU uses
1149 * to address the device, and saves it into the struct omap_hwmod.
1150 * Intended to be called during hwmod registration only. No return
1153 static void __init
_save_mpu_port_index(struct omap_hwmod
*oh
)
1155 struct omap_hwmod_ocp_if
*os
= NULL
;
1160 oh
->_int_flags
|= _HWMOD_NO_MPU_PORT
;
1162 list_for_each_entry(os
, &oh
->slave_ports
, node
) {
1163 if (os
->user
& OCP_USER_MPU
) {
1165 oh
->_int_flags
&= ~_HWMOD_NO_MPU_PORT
;
1174 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1175 * @oh: struct omap_hwmod *
1177 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1178 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1179 * communicate with the IP block. This interface need not be directly
1180 * connected to the MPU (and almost certainly is not), but is directly
1181 * connected to the IP block represented by @oh. Returns a pointer
1182 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1183 * error or if there does not appear to be a path from the MPU to this
1186 static struct omap_hwmod_ocp_if
*_find_mpu_rt_port(struct omap_hwmod
*oh
)
1188 if (!oh
|| oh
->_int_flags
& _HWMOD_NO_MPU_PORT
|| oh
->slaves_cnt
== 0)
1191 return oh
->_mpu_port
;
1195 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1196 * @oh: struct omap_hwmod *
1198 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1199 * by @oh is set to indicate to the PRCM that the IP block is active.
1200 * Usually this means placing the module into smart-idle mode and
1201 * smart-standby, but if there is a bug in the automatic idle handling
1202 * for the IP block, it may need to be placed into the force-idle or
1203 * no-idle variants of these modes. No return value.
1205 static void _enable_sysc(struct omap_hwmod
*oh
)
1210 struct clockdomain
*clkdm
;
1212 if (!oh
->class->sysc
)
1216 * Wait until reset has completed, this is needed as the IP
1217 * block is reset automatically by hardware in some cases
1218 * (off-mode for example), and the drivers require the
1219 * IP to be ready when they access it
1221 if (oh
->flags
& HWMOD_CONTROL_OPT_CLKS_IN_RESET
)
1222 _enable_optional_clocks(oh
);
1223 _wait_softreset_complete(oh
);
1224 if (oh
->flags
& HWMOD_CONTROL_OPT_CLKS_IN_RESET
)
1225 _disable_optional_clocks(oh
);
1227 v
= oh
->_sysc_cache
;
1228 sf
= oh
->class->sysc
->sysc_flags
;
1230 clkdm
= _get_clkdm(oh
);
1231 if (sf
& SYSC_HAS_SIDLEMODE
) {
1232 if (oh
->flags
& HWMOD_SWSUP_SIDLE
||
1233 oh
->flags
& HWMOD_SWSUP_SIDLE_ACT
) {
1234 idlemode
= HWMOD_IDLEMODE_NO
;
1236 if (sf
& SYSC_HAS_ENAWAKEUP
)
1237 _enable_wakeup(oh
, &v
);
1238 if (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
)
1239 idlemode
= HWMOD_IDLEMODE_SMART_WKUP
;
1241 idlemode
= HWMOD_IDLEMODE_SMART
;
1245 * This is special handling for some IPs like
1246 * 32k sync timer. Force them to idle!
1248 clkdm_act
= (clkdm
&& clkdm
->flags
& CLKDM_ACTIVE_WITH_MPU
);
1249 if (clkdm_act
&& !(oh
->class->sysc
->idlemodes
&
1250 (SIDLE_SMART
| SIDLE_SMART_WKUP
)))
1251 idlemode
= HWMOD_IDLEMODE_FORCE
;
1253 _set_slave_idlemode(oh
, idlemode
, &v
);
1256 if (sf
& SYSC_HAS_MIDLEMODE
) {
1257 if (oh
->flags
& HWMOD_FORCE_MSTANDBY
) {
1258 idlemode
= HWMOD_IDLEMODE_FORCE
;
1259 } else if (oh
->flags
& HWMOD_SWSUP_MSTANDBY
) {
1260 idlemode
= HWMOD_IDLEMODE_NO
;
1262 if (sf
& SYSC_HAS_ENAWAKEUP
)
1263 _enable_wakeup(oh
, &v
);
1264 if (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)
1265 idlemode
= HWMOD_IDLEMODE_SMART_WKUP
;
1267 idlemode
= HWMOD_IDLEMODE_SMART
;
1269 _set_master_standbymode(oh
, idlemode
, &v
);
1273 * XXX The clock framework should handle this, by
1274 * calling into this code. But this must wait until the
1275 * clock structures are tagged with omap_hwmod entries
1277 if ((oh
->flags
& HWMOD_SET_DEFAULT_CLOCKACT
) &&
1278 (sf
& SYSC_HAS_CLOCKACTIVITY
))
1279 _set_clockactivity(oh
, CLOCKACT_TEST_ICLK
, &v
);
1281 _write_sysconfig(v
, oh
);
1284 * Set the autoidle bit only after setting the smartidle bit
1285 * Setting this will not have any impact on the other modules.
1287 if (sf
& SYSC_HAS_AUTOIDLE
) {
1288 idlemode
= (oh
->flags
& HWMOD_NO_OCP_AUTOIDLE
) ?
1290 _set_module_autoidle(oh
, idlemode
, &v
);
1291 _write_sysconfig(v
, oh
);
1296 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1297 * @oh: struct omap_hwmod *
1299 * If module is marked as SWSUP_SIDLE, force the module into slave
1300 * idle; otherwise, configure it for smart-idle. If module is marked
1301 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1302 * configure it for smart-standby. No return value.
1304 static void _idle_sysc(struct omap_hwmod
*oh
)
1309 if (!oh
->class->sysc
)
1312 v
= oh
->_sysc_cache
;
1313 sf
= oh
->class->sysc
->sysc_flags
;
1315 if (sf
& SYSC_HAS_SIDLEMODE
) {
1316 if (oh
->flags
& HWMOD_SWSUP_SIDLE
) {
1317 idlemode
= HWMOD_IDLEMODE_FORCE
;
1319 if (sf
& SYSC_HAS_ENAWAKEUP
)
1320 _enable_wakeup(oh
, &v
);
1321 if (oh
->class->sysc
->idlemodes
& SIDLE_SMART_WKUP
)
1322 idlemode
= HWMOD_IDLEMODE_SMART_WKUP
;
1324 idlemode
= HWMOD_IDLEMODE_SMART
;
1326 _set_slave_idlemode(oh
, idlemode
, &v
);
1329 if (sf
& SYSC_HAS_MIDLEMODE
) {
1330 if ((oh
->flags
& HWMOD_SWSUP_MSTANDBY
) ||
1331 (oh
->flags
& HWMOD_FORCE_MSTANDBY
)) {
1332 idlemode
= HWMOD_IDLEMODE_FORCE
;
1334 if (sf
& SYSC_HAS_ENAWAKEUP
)
1335 _enable_wakeup(oh
, &v
);
1336 if (oh
->class->sysc
->idlemodes
& MSTANDBY_SMART_WKUP
)
1337 idlemode
= HWMOD_IDLEMODE_SMART_WKUP
;
1339 idlemode
= HWMOD_IDLEMODE_SMART
;
1341 _set_master_standbymode(oh
, idlemode
, &v
);
1344 /* If the cached value is the same as the new value, skip the write */
1345 if (oh
->_sysc_cache
!= v
)
1346 _write_sysconfig(v
, oh
);
1350 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1351 * @oh: struct omap_hwmod *
1353 * Force the module into slave idle and master suspend. No return
1356 static void _shutdown_sysc(struct omap_hwmod
*oh
)
1361 if (!oh
->class->sysc
)
1364 v
= oh
->_sysc_cache
;
1365 sf
= oh
->class->sysc
->sysc_flags
;
1367 if (sf
& SYSC_HAS_SIDLEMODE
)
1368 _set_slave_idlemode(oh
, HWMOD_IDLEMODE_FORCE
, &v
);
1370 if (sf
& SYSC_HAS_MIDLEMODE
)
1371 _set_master_standbymode(oh
, HWMOD_IDLEMODE_FORCE
, &v
);
1373 if (sf
& SYSC_HAS_AUTOIDLE
)
1374 _set_module_autoidle(oh
, 1, &v
);
1376 _write_sysconfig(v
, oh
);
1380 * _lookup - find an omap_hwmod by name
1381 * @name: find an omap_hwmod by name
1383 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1385 static struct omap_hwmod
*_lookup(const char *name
)
1387 struct omap_hwmod
*oh
, *temp_oh
;
1391 list_for_each_entry(temp_oh
, &omap_hwmod_list
, node
) {
1392 if (!strcmp(name
, temp_oh
->name
)) {
1402 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1403 * @oh: struct omap_hwmod *
1405 * Convert a clockdomain name stored in a struct omap_hwmod into a
1406 * clockdomain pointer, and save it into the struct omap_hwmod.
1407 * Return -EINVAL if the clkdm_name lookup failed.
1409 static int _init_clkdm(struct omap_hwmod
*oh
)
1411 if (!oh
->clkdm_name
) {
1412 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh
->name
);
1416 oh
->clkdm
= clkdm_lookup(oh
->clkdm_name
);
1418 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1419 oh
->name
, oh
->clkdm_name
);
1423 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1424 oh
->name
, oh
->clkdm_name
);
1430 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1431 * well the clockdomain.
1432 * @oh: struct omap_hwmod *
1433 * @np: device_node mapped to this hwmod
1435 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1436 * Resolves all clock names embedded in the hwmod. Returns 0 on
1437 * success, or a negative error code on failure.
1439 static int _init_clocks(struct omap_hwmod
*oh
, struct device_node
*np
)
1443 if (oh
->_state
!= _HWMOD_STATE_REGISTERED
)
1446 pr_debug("omap_hwmod: %s: looking up clocks\n", oh
->name
);
1448 if (soc_ops
.init_clkdm
)
1449 ret
|= soc_ops
.init_clkdm(oh
);
1451 ret
|= _init_main_clk(oh
);
1452 ret
|= _init_interface_clks(oh
);
1453 ret
|= _init_opt_clks(oh
);
1456 oh
->_state
= _HWMOD_STATE_CLKS_INITED
;
1458 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh
->name
);
1464 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1465 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line in the context of this hwmod
1467 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1469 * Return the bit position of the reset line that match the
1470 * input name. Return -ENOENT if not found.
1472 static int _lookup_hardreset(struct omap_hwmod
*oh
, const char *name
,
1473 struct omap_hwmod_rst_info
*ohri
)
1477 for (i
= 0; i
< oh
->rst_lines_cnt
; i
++) {
1478 const char *rst_line
= oh
->rst_lines
[i
].name
;
1479 if (!strcmp(rst_line
, name
)) {
1480 ohri
->rst_shift
= oh
->rst_lines
[i
].rst_shift
;
1481 ohri
->st_shift
= oh
->rst_lines
[i
].st_shift
;
1482 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1483 oh
->name
, __func__
, rst_line
, ohri
->rst_shift
,
1494 * _assert_hardreset - assert the HW reset line of submodules
1495 * contained in the hwmod module.
1496 * @oh: struct omap_hwmod *
1497 * @name: name of the reset line to lookup and assert
1499 * Some IP like dsp, ipu or iva contain processor that require an HW
1500 * reset line to be assert / deassert in order to enable fully the IP.
1501 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1502 * asserting the hardreset line on the currently-booted SoC, or passes
1503 * along the return value from _lookup_hardreset() or the SoC's
1504 * assert_hardreset code.
1506 static int _assert_hardreset(struct omap_hwmod
*oh
, const char *name
)
1508 struct omap_hwmod_rst_info ohri
;
1514 if (!soc_ops
.assert_hardreset
)
1517 ret
= _lookup_hardreset(oh
, name
, &ohri
);
1521 ret
= soc_ops
.assert_hardreset(oh
, &ohri
);
1527 * _deassert_hardreset - deassert the HW reset line of submodules contained
1528 * in the hwmod module.
1529 * @oh: struct omap_hwmod *
1530 * @name: name of the reset line to look up and deassert
1532 * Some IP like dsp, ipu or iva contain processor that require an HW
1533 * reset line to be assert / deassert in order to enable fully the IP.
1534 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1535 * deasserting the hardreset line on the currently-booted SoC, or passes
1536 * along the return value from _lookup_hardreset() or the SoC's
1537 * deassert_hardreset code.
1539 static int _deassert_hardreset(struct omap_hwmod
*oh
, const char *name
)
1541 struct omap_hwmod_rst_info ohri
;
1547 if (!soc_ops
.deassert_hardreset
)
1550 ret
= _lookup_hardreset(oh
, name
, &ohri
);
1556 * A clockdomain must be in SW_SUP otherwise reset
1557 * might not be completed. The clockdomain can be set
1558 * in HW_AUTO only when the module become ready.
1560 clkdm_deny_idle(oh
->clkdm
);
1561 ret
= clkdm_hwmod_enable(oh
->clkdm
, oh
);
1563 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1564 oh
->name
, oh
->clkdm
->name
, ret
);
1570 if (soc_ops
.enable_module
)
1571 soc_ops
.enable_module(oh
);
1573 ret
= soc_ops
.deassert_hardreset(oh
, &ohri
);
1575 if (soc_ops
.disable_module
)
1576 soc_ops
.disable_module(oh
);
1577 _disable_clocks(oh
);
1580 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh
->name
);
1584 * Set the clockdomain to HW_AUTO, assuming that the
1585 * previous state was HW_AUTO.
1587 clkdm_allow_idle(oh
->clkdm
);
1589 clkdm_hwmod_disable(oh
->clkdm
, oh
);
1596 * _read_hardreset - read the HW reset line state of submodules
1597 * contained in the hwmod module
1598 * @oh: struct omap_hwmod *
1599 * @name: name of the reset line to look up and read
1601 * Return the state of the reset line. Returns -EINVAL if @oh is
1602 * null, -ENOSYS if we have no way of reading the hardreset line
1603 * status on the currently-booted SoC, or passes along the return
1604 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1607 static int _read_hardreset(struct omap_hwmod
*oh
, const char *name
)
1609 struct omap_hwmod_rst_info ohri
;
1615 if (!soc_ops
.is_hardreset_asserted
)
1618 ret
= _lookup_hardreset(oh
, name
, &ohri
);
1622 return soc_ops
.is_hardreset_asserted(oh
, &ohri
);
1626 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1627 * @oh: struct omap_hwmod *
1629 * If all hardreset lines associated with @oh are asserted, then return true.
1630 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1631 * associated with @oh are asserted, then return false.
1632 * This function is used to avoid executing some parts of the IP block
1633 * enable/disable sequence if its hardreset line is set.
1635 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod
*oh
)
1639 if (oh
->rst_lines_cnt
== 0)
1642 for (i
= 0; i
< oh
->rst_lines_cnt
; i
++)
1643 if (_read_hardreset(oh
, oh
->rst_lines
[i
].name
) > 0)
1646 if (oh
->rst_lines_cnt
== rst_cnt
)
1653 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1655 * @oh: struct omap_hwmod *
1657 * If any hardreset lines associated with @oh are asserted, then
1658 * return true. Otherwise, if no hardreset lines associated with @oh
1659 * are asserted, or if @oh has no hardreset lines, then return false.
1660 * This function is used to avoid executing some parts of the IP block
1661 * enable/disable sequence if any hardreset line is set.
1663 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod
*oh
)
1668 for (i
= 0; i
< oh
->rst_lines_cnt
&& rst_cnt
== 0; i
++)
1669 if (_read_hardreset(oh
, oh
->rst_lines
[i
].name
) > 0)
1672 return (rst_cnt
) ? true : false;
1676 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1677 * @oh: struct omap_hwmod *
1679 * Disable the PRCM module mode related to the hwmod @oh.
1680 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1682 static int _omap4_disable_module(struct omap_hwmod
*oh
)
1686 if (!oh
->clkdm
|| !oh
->prcm
.omap4
.modulemode
||
1687 _omap4_clkctrl_managed_by_clkfwk(oh
))
1691 * Since integration code might still be doing something, only
1692 * disable if all lines are under hardreset.
1694 if (_are_any_hardreset_lines_asserted(oh
))
1697 pr_debug("omap_hwmod: %s: %s\n", oh
->name
, __func__
);
1699 omap_cm_module_disable(oh
->clkdm
->prcm_partition
, oh
->clkdm
->cm_inst
,
1700 oh
->prcm
.omap4
.clkctrl_offs
);
1702 v
= _omap4_wait_target_disable(oh
);
1704 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1711 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1712 * @oh: struct omap_hwmod *
1714 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1715 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1716 * reset this way, -EINVAL if the hwmod is in the wrong state,
1717 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1719 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1720 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1721 * use the SYSCONFIG softreset bit to provide the status.
1723 * Note that some IP like McBSP do have reset control but don't have
1726 static int _ocp_softreset(struct omap_hwmod
*oh
)
1732 if (!oh
->class->sysc
||
1733 !(oh
->class->sysc
->sysc_flags
& SYSC_HAS_SOFTRESET
))
1736 /* clocks must be on for this operation */
1737 if (oh
->_state
!= _HWMOD_STATE_ENABLED
) {
1738 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1743 /* For some modules, all optionnal clocks need to be enabled as well */
1744 if (oh
->flags
& HWMOD_CONTROL_OPT_CLKS_IN_RESET
)
1745 _enable_optional_clocks(oh
);
1747 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh
->name
);
1749 v
= oh
->_sysc_cache
;
1750 ret
= _set_softreset(oh
, &v
);
1754 _write_sysconfig(v
, oh
);
1756 if (oh
->class->sysc
->srst_udelay
)
1757 udelay(oh
->class->sysc
->srst_udelay
);
1759 c
= _wait_softreset_complete(oh
);
1760 if (c
== MAX_MODULE_SOFTRESET_WAIT
) {
1761 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1762 oh
->name
, MAX_MODULE_SOFTRESET_WAIT
);
1766 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh
->name
, c
);
1769 ret
= _clear_softreset(oh
, &v
);
1773 _write_sysconfig(v
, oh
);
1776 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1777 * _wait_target_ready() or _reset()
1781 if (oh
->flags
& HWMOD_CONTROL_OPT_CLKS_IN_RESET
)
1782 _disable_optional_clocks(oh
);
1788 * _reset - reset an omap_hwmod
1789 * @oh: struct omap_hwmod *
1791 * Resets an omap_hwmod @oh. If the module has a custom reset
1792 * function pointer defined, then call it to reset the IP block, and
1793 * pass along its return value to the caller. Otherwise, if the IP
1794 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1795 * associated with it, call a function to reset the IP block via that
1796 * method, and pass along the return value to the caller. Finally, if
1797 * the IP block has some hardreset lines associated with it, assert
1798 * all of those, but do _not_ deassert them. (This is because driver
1799 * authors have expressed an apparent requirement to control the
1800 * deassertion of the hardreset lines themselves.)
1802 * The default software reset mechanism for most OMAP IP blocks is
1803 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1804 * hwmods cannot be reset via this method. Some are not targets and
1805 * therefore have no OCP header registers to access. Others (like the
1806 * IVA) have idiosyncratic reset sequences. So for these relatively
1807 * rare cases, custom reset code can be supplied in the struct
1808 * omap_hwmod_class .reset function pointer.
1810 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1811 * does not prevent idling of the system. This is necessary for cases
1812 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1813 * kernel without disabling dma.
1815 * Passes along the return value from either _ocp_softreset() or the
1816 * custom reset function - these must return -EINVAL if the hwmod
1817 * cannot be reset this way or if the hwmod is in the wrong state,
1818 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1820 static int _reset(struct omap_hwmod
*oh
)
1824 pr_debug("omap_hwmod: %s: resetting\n", oh
->name
);
1826 if (oh
->class->reset
) {
1827 r
= oh
->class->reset(oh
);
1829 if (oh
->rst_lines_cnt
> 0) {
1830 for (i
= 0; i
< oh
->rst_lines_cnt
; i
++)
1831 _assert_hardreset(oh
, oh
->rst_lines
[i
].name
);
1834 r
= _ocp_softreset(oh
);
1840 _set_dmadisable(oh
);
1843 * OCP_SYSCONFIG bits need to be reprogrammed after a
1844 * softreset. The _enable() function should be split to avoid
1845 * the rewrite of the OCP_SYSCONFIG register.
1847 if (oh
->class->sysc
) {
1848 _update_sysc_cache(oh
);
1856 * _omap4_update_context_lost - increment hwmod context loss counter if
1857 * hwmod context was lost, and clear hardware context loss reg
1858 * @oh: hwmod to check for context loss
1860 * If the PRCM indicates that the hwmod @oh lost context, increment
1861 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1862 * bits. No return value.
1864 static void _omap4_update_context_lost(struct omap_hwmod
*oh
)
1866 if (oh
->prcm
.omap4
.flags
& HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT
)
1869 if (!prm_was_any_context_lost_old(oh
->clkdm
->pwrdm
.ptr
->prcm_partition
,
1870 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
1871 oh
->prcm
.omap4
.context_offs
))
1874 oh
->prcm
.omap4
.context_lost_counter
++;
1875 prm_clear_context_loss_flags_old(oh
->clkdm
->pwrdm
.ptr
->prcm_partition
,
1876 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
1877 oh
->prcm
.omap4
.context_offs
);
1881 * _omap4_get_context_lost - get context loss counter for a hwmod
1882 * @oh: hwmod to get context loss counter for
1884 * Returns the in-memory context loss counter for a hwmod.
1886 static int _omap4_get_context_lost(struct omap_hwmod
*oh
)
1888 return oh
->prcm
.omap4
.context_lost_counter
;
1892 * _enable_preprogram - Pre-program an IP block during the _enable() process
1893 * @oh: struct omap_hwmod *
1895 * Some IP blocks (such as AESS) require some additional programming
1896 * after enable before they can enter idle. If a function pointer to
1897 * do so is present in the hwmod data, then call it and pass along the
1898 * return value; otherwise, return 0.
1900 static int _enable_preprogram(struct omap_hwmod
*oh
)
1902 if (!oh
->class->enable_preprogram
)
1905 return oh
->class->enable_preprogram(oh
);
1909 * _enable - enable an omap_hwmod
1910 * @oh: struct omap_hwmod *
1912 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1913 * register target. Returns -EINVAL if the hwmod is in the wrong
1914 * state or passes along the return value of _wait_target_ready().
1916 static int _enable(struct omap_hwmod
*oh
)
1920 pr_debug("omap_hwmod: %s: enabling\n", oh
->name
);
1923 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1926 if (oh
->_int_flags
& _HWMOD_SKIP_ENABLE
) {
1927 oh
->_int_flags
&= ~_HWMOD_SKIP_ENABLE
;
1931 if (oh
->_state
!= _HWMOD_STATE_INITIALIZED
&&
1932 oh
->_state
!= _HWMOD_STATE_IDLE
&&
1933 oh
->_state
!= _HWMOD_STATE_DISABLED
) {
1934 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1940 * If an IP block contains HW reset lines and all of them are
1941 * asserted, we let integration code associated with that
1942 * block handle the enable. We've received very little
1943 * information on what those driver authors need, and until
1944 * detailed information is provided and the driver code is
1945 * posted to the public lists, this is probably the best we
1948 if (_are_all_hardreset_lines_asserted(oh
))
1951 _add_initiator_dep(oh
, mpu_oh
);
1955 * A clockdomain must be in SW_SUP before enabling
1956 * completely the module. The clockdomain can be set
1957 * in HW_AUTO only when the module become ready.
1959 clkdm_deny_idle(oh
->clkdm
);
1960 r
= clkdm_hwmod_enable(oh
->clkdm
, oh
);
1962 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1963 oh
->name
, oh
->clkdm
->name
, r
);
1969 if (soc_ops
.enable_module
)
1970 soc_ops
.enable_module(oh
);
1971 if (oh
->flags
& HWMOD_BLOCK_WFI
)
1972 cpu_idle_poll_ctrl(true);
1974 if (soc_ops
.update_context_lost
)
1975 soc_ops
.update_context_lost(oh
);
1977 r
= (soc_ops
.wait_target_ready
) ? soc_ops
.wait_target_ready(oh
) :
1979 if (oh
->clkdm
&& !(oh
->flags
& HWMOD_CLKDM_NOAUTO
))
1980 clkdm_allow_idle(oh
->clkdm
);
1983 oh
->_state
= _HWMOD_STATE_ENABLED
;
1985 /* Access the sysconfig only if the target is ready */
1986 if (oh
->class->sysc
) {
1987 if (!(oh
->_int_flags
& _HWMOD_SYSCONFIG_LOADED
))
1988 _update_sysc_cache(oh
);
1991 r
= _enable_preprogram(oh
);
1993 if (soc_ops
.disable_module
)
1994 soc_ops
.disable_module(oh
);
1995 _disable_clocks(oh
);
1996 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
2000 clkdm_hwmod_disable(oh
->clkdm
, oh
);
2007 * _idle - idle an omap_hwmod
2008 * @oh: struct omap_hwmod *
2010 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2011 * no further work. Returns -EINVAL if the hwmod is in the wrong
2012 * state or returns 0.
2014 static int _idle(struct omap_hwmod
*oh
)
2016 if (oh
->flags
& HWMOD_NO_IDLE
) {
2017 oh
->_int_flags
|= _HWMOD_SKIP_ENABLE
;
2021 pr_debug("omap_hwmod: %s: idling\n", oh
->name
);
2023 if (_are_all_hardreset_lines_asserted(oh
))
2026 if (oh
->_state
!= _HWMOD_STATE_ENABLED
) {
2027 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2032 if (oh
->class->sysc
)
2034 _del_initiator_dep(oh
, mpu_oh
);
2037 * If HWMOD_CLKDM_NOAUTO is set then we don't
2038 * deny idle the clkdm again since idle was already denied
2041 if (oh
->clkdm
&& !(oh
->flags
& HWMOD_CLKDM_NOAUTO
))
2042 clkdm_deny_idle(oh
->clkdm
);
2044 if (oh
->flags
& HWMOD_BLOCK_WFI
)
2045 cpu_idle_poll_ctrl(false);
2046 if (soc_ops
.disable_module
)
2047 soc_ops
.disable_module(oh
);
2050 * The module must be in idle mode before disabling any parents
2051 * clocks. Otherwise, the parent clock might be disabled before
2052 * the module transition is done, and thus will prevent the
2053 * transition to complete properly.
2055 _disable_clocks(oh
);
2057 clkdm_allow_idle(oh
->clkdm
);
2058 clkdm_hwmod_disable(oh
->clkdm
, oh
);
2061 oh
->_state
= _HWMOD_STATE_IDLE
;
2067 * _shutdown - shutdown an omap_hwmod
2068 * @oh: struct omap_hwmod *
2070 * Shut down an omap_hwmod @oh. This should be called when the driver
2071 * used for the hwmod is removed or unloaded or if the driver is not
2072 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2073 * state or returns 0.
2075 static int _shutdown(struct omap_hwmod
*oh
)
2080 if (_are_all_hardreset_lines_asserted(oh
))
2083 if (oh
->_state
!= _HWMOD_STATE_IDLE
&&
2084 oh
->_state
!= _HWMOD_STATE_ENABLED
) {
2085 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2090 pr_debug("omap_hwmod: %s: disabling\n", oh
->name
);
2092 if (oh
->class->pre_shutdown
) {
2093 prev_state
= oh
->_state
;
2094 if (oh
->_state
== _HWMOD_STATE_IDLE
)
2096 ret
= oh
->class->pre_shutdown(oh
);
2098 if (prev_state
== _HWMOD_STATE_IDLE
)
2104 if (oh
->class->sysc
) {
2105 if (oh
->_state
== _HWMOD_STATE_IDLE
)
2110 /* clocks and deps are already disabled in idle */
2111 if (oh
->_state
== _HWMOD_STATE_ENABLED
) {
2112 _del_initiator_dep(oh
, mpu_oh
);
2113 /* XXX what about the other system initiators here? dma, dsp */
2114 if (oh
->flags
& HWMOD_BLOCK_WFI
)
2115 cpu_idle_poll_ctrl(false);
2116 if (soc_ops
.disable_module
)
2117 soc_ops
.disable_module(oh
);
2118 _disable_clocks(oh
);
2120 clkdm_hwmod_disable(oh
->clkdm
, oh
);
2122 /* XXX Should this code also force-disable the optional clocks? */
2124 for (i
= 0; i
< oh
->rst_lines_cnt
; i
++)
2125 _assert_hardreset(oh
, oh
->rst_lines
[i
].name
);
2127 oh
->_state
= _HWMOD_STATE_DISABLED
;
2132 static int of_dev_find_hwmod(struct device_node
*np
,
2133 struct omap_hwmod
*oh
)
2138 count
= of_property_count_strings(np
, "ti,hwmods");
2142 for (i
= 0; i
< count
; i
++) {
2143 res
= of_property_read_string_index(np
, "ti,hwmods",
2147 if (!strcmp(p
, oh
->name
)) {
2148 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2158 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2159 * @np: struct device_node *
2160 * @oh: struct omap_hwmod *
2161 * @index: index of the entry found
2162 * @found: struct device_node * found or NULL
2164 * Parse the dt blob and find out needed hwmod. Recursive function is
2165 * implemented to take care hierarchical dt blob parsing.
2166 * Return: Returns 0 on success, -ENODEV when not found.
2168 static int of_dev_hwmod_lookup(struct device_node
*np
,
2169 struct omap_hwmod
*oh
,
2171 struct device_node
**found
)
2173 struct device_node
*np0
= NULL
;
2176 res
= of_dev_find_hwmod(np
, oh
);
2183 for_each_child_of_node(np
, np0
) {
2184 struct device_node
*fc
;
2187 res
= of_dev_hwmod_lookup(np0
, oh
, &i
, &fc
);
2202 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2204 * @oh: struct omap_hwmod *
2205 * @np: struct device_node *
2207 * Fix up module register offsets for modules with mpu_rt_idx.
2208 * Only needed for cpsw with interconnect target module defined
2209 * in device tree while still using legacy hwmod platform data
2210 * for rev, sysc and syss registers.
2212 * Can be removed when all cpsw hwmod platform data has been
2215 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod
*oh
,
2216 struct device_node
*np
,
2217 struct resource
*res
)
2219 struct device_node
*child
= NULL
;
2222 child
= of_get_next_child(np
, child
);
2226 error
= of_address_to_resource(child
, oh
->mpu_rt_idx
, res
);
2228 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2233 * omap_hwmod_parse_module_range - map module IO range from device tree
2234 * @oh: struct omap_hwmod *
2235 * @np: struct device_node *
2237 * Parse the device tree range an interconnect target module provides
2238 * for it's child device IP blocks. This way we can support the old
2239 * "ti,hwmods" property with just dts data without a need for platform
2240 * data for IO resources. And we don't need all the child IP device
2241 * nodes available in the dts.
2243 int omap_hwmod_parse_module_range(struct omap_hwmod
*oh
,
2244 struct device_node
*np
,
2245 struct resource
*res
)
2247 struct property
*prop
;
2248 const __be32
*ranges
;
2250 u32 nr_addr
, nr_size
;
2257 ranges
= of_get_property(np
, "ranges", &len
);
2261 len
/= sizeof(*ranges
);
2266 of_property_for_each_string(np
, "compatible", prop
, name
)
2267 if (!strncmp("ti,sysc-", name
, 8))
2273 error
= of_property_read_u32(np
, "#address-cells", &nr_addr
);
2277 error
= of_property_read_u32(np
, "#size-cells", &nr_size
);
2281 if (nr_addr
!= 1 || nr_size
!= 1) {
2282 pr_err("%s: invalid range for %s->%pOFn\n", __func__
,
2288 base
= of_translate_address(np
, ranges
++);
2289 size
= be32_to_cpup(ranges
);
2291 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2292 oh
->name
, np
, base
, size
);
2294 if (oh
&& oh
->mpu_rt_idx
) {
2295 omap_hwmod_fix_mpu_rt_idx(oh
, np
, res
);
2301 res
->end
= base
+ size
- 1;
2302 res
->flags
= IORESOURCE_MEM
;
2308 * _init_mpu_rt_base - populate the virtual address for a hwmod
2309 * @oh: struct omap_hwmod * to locate the virtual address
2310 * @data: (unused, caller should pass NULL)
2311 * @index: index of the reg entry iospace in device tree
2312 * @np: struct device_node * of the IP block's device node in the DT data
2314 * Cache the virtual address used by the MPU to access this IP block's
2315 * registers. This address is needed early so the OCP registers that
2316 * are part of the device's address space can be ioremapped properly.
2318 * If SYSC access is not needed, the registers will not be remapped
2319 * and non-availability of MPU access is not treated as an error.
2321 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2322 * -ENXIO on absent or invalid register target address space.
2324 static int __init
_init_mpu_rt_base(struct omap_hwmod
*oh
, void *data
,
2325 int index
, struct device_node
*np
)
2327 void __iomem
*va_start
= NULL
;
2328 struct resource res
;
2334 _save_mpu_port_index(oh
);
2336 /* if we don't need sysc access we don't need to ioremap */
2337 if (!oh
->class->sysc
)
2340 /* we can't continue without MPU PORT if we need sysc access */
2341 if (oh
->_int_flags
& _HWMOD_NO_MPU_PORT
)
2345 pr_err("omap_hwmod: %s: no dt node\n", oh
->name
);
2349 /* Do we have a dts range for the interconnect target module? */
2350 error
= omap_hwmod_parse_module_range(oh
, np
, &res
);
2352 va_start
= ioremap(res
.start
, resource_size(&res
));
2354 /* No ranges, rely on device reg entry */
2356 va_start
= of_iomap(np
, index
+ oh
->mpu_rt_idx
);
2358 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2359 oh
->name
, index
, np
);
2363 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2364 oh
->name
, va_start
);
2366 oh
->_mpu_rt_va
= va_start
;
2370 static void __init
parse_module_flags(struct omap_hwmod
*oh
,
2371 struct device_node
*np
)
2373 if (of_find_property(np
, "ti,no-reset-on-init", NULL
))
2374 oh
->flags
|= HWMOD_INIT_NO_RESET
;
2375 if (of_find_property(np
, "ti,no-idle-on-init", NULL
))
2376 oh
->flags
|= HWMOD_INIT_NO_IDLE
;
2377 if (of_find_property(np
, "ti,no-idle", NULL
))
2378 oh
->flags
|= HWMOD_NO_IDLE
;
2382 * _init - initialize internal data for the hwmod @oh
2383 * @oh: struct omap_hwmod *
2386 * Look up the clocks and the address space used by the MPU to access
2387 * registers belonging to the hwmod @oh. @oh must already be
2388 * registered at this point. This is the first of two phases for
2389 * hwmod initialization. Code called here does not touch any hardware
2390 * registers, it simply prepares internal data structures. Returns 0
2391 * upon success or if the hwmod isn't registered or if the hwmod's
2392 * address space is not defined, or -EINVAL upon failure.
2394 static int __init
_init(struct omap_hwmod
*oh
, void *data
)
2397 struct device_node
*np
= NULL
;
2398 struct device_node
*bus
;
2400 if (oh
->_state
!= _HWMOD_STATE_REGISTERED
)
2403 bus
= of_find_node_by_name(NULL
, "ocp");
2407 r
= of_dev_hwmod_lookup(bus
, oh
, &index
, &np
);
2409 pr_debug("omap_hwmod: %s missing dt data\n", oh
->name
);
2410 else if (np
&& index
)
2411 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2414 r
= _init_mpu_rt_base(oh
, NULL
, index
, np
);
2416 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2421 r
= _init_clocks(oh
, np
);
2423 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh
->name
);
2428 struct device_node
*child
;
2430 parse_module_flags(oh
, np
);
2431 child
= of_get_next_child(np
, NULL
);
2433 parse_module_flags(oh
, child
);
2436 oh
->_state
= _HWMOD_STATE_INITIALIZED
;
2442 * _setup_iclk_autoidle - configure an IP block's interface clocks
2443 * @oh: struct omap_hwmod *
2445 * Set up the module's interface clocks. XXX This function is still mostly
2446 * a stub; implementing this properly requires iclk autoidle usecounting in
2447 * the clock code. No return value.
2449 static void _setup_iclk_autoidle(struct omap_hwmod
*oh
)
2451 struct omap_hwmod_ocp_if
*os
;
2453 if (oh
->_state
!= _HWMOD_STATE_INITIALIZED
)
2456 list_for_each_entry(os
, &oh
->slave_ports
, node
) {
2460 if (os
->flags
& OCPIF_SWSUP_IDLE
) {
2462 * we might have multiple users of one iclk with
2463 * different requirements, disable autoidle when
2464 * the module is enabled, e.g. dss iclk
2467 /* we are enabling autoidle afterwards anyways */
2468 clk_enable(os
->_clk
);
2476 * _setup_reset - reset an IP block during the setup process
2477 * @oh: struct omap_hwmod *
2479 * Reset the IP block corresponding to the hwmod @oh during the setup
2480 * process. The IP block is first enabled so it can be successfully
2481 * reset. Returns 0 upon success or a negative error code upon
2484 static int _setup_reset(struct omap_hwmod
*oh
)
2488 if (oh
->_state
!= _HWMOD_STATE_INITIALIZED
)
2491 if (oh
->flags
& HWMOD_EXT_OPT_MAIN_CLK
)
2494 if (oh
->rst_lines_cnt
== 0) {
2497 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2498 oh
->name
, oh
->_state
);
2503 if (!(oh
->flags
& HWMOD_INIT_NO_RESET
))
2510 * _setup_postsetup - transition to the appropriate state after _setup
2511 * @oh: struct omap_hwmod *
2513 * Place an IP block represented by @oh into a "post-setup" state --
2514 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2515 * this function is called at the end of _setup().) The postsetup
2516 * state for an IP block can be changed by calling
2517 * omap_hwmod_enter_postsetup_state() early in the boot process,
2518 * before one of the omap_hwmod_setup*() functions are called for the
2521 * The IP block stays in this state until a PM runtime-based driver is
2522 * loaded for that IP block. A post-setup state of IDLE is
2523 * appropriate for almost all IP blocks with runtime PM-enabled
2524 * drivers, since those drivers are able to enable the IP block. A
2525 * post-setup state of ENABLED is appropriate for kernels with PM
2526 * runtime disabled. The DISABLED state is appropriate for unusual IP
2527 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2528 * included, since the WDTIMER starts running on reset and will reset
2529 * the MPU if left active.
2531 * This post-setup mechanism is deprecated. Once all of the OMAP
2532 * drivers have been converted to use PM runtime, and all of the IP
2533 * block data and interconnect data is available to the hwmod code, it
2534 * should be possible to replace this mechanism with a "lazy reset"
2535 * arrangement. In a "lazy reset" setup, each IP block is enabled
2536 * when the driver first probes, then all remaining IP blocks without
2537 * drivers are either shut down or enabled after the drivers have
2538 * loaded. However, this cannot take place until the above
2539 * preconditions have been met, since otherwise the late reset code
2540 * has no way of knowing which IP blocks are in use by drivers, and
2541 * which ones are unused.
2545 static void _setup_postsetup(struct omap_hwmod
*oh
)
2549 if (oh
->rst_lines_cnt
> 0)
2552 postsetup_state
= oh
->_postsetup_state
;
2553 if (postsetup_state
== _HWMOD_STATE_UNKNOWN
)
2554 postsetup_state
= _HWMOD_STATE_ENABLED
;
2557 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2558 * it should be set by the core code as a runtime flag during startup
2560 if ((oh
->flags
& (HWMOD_INIT_NO_IDLE
| HWMOD_NO_IDLE
)) &&
2561 (postsetup_state
== _HWMOD_STATE_IDLE
)) {
2562 oh
->_int_flags
|= _HWMOD_SKIP_ENABLE
;
2563 postsetup_state
= _HWMOD_STATE_ENABLED
;
2566 if (postsetup_state
== _HWMOD_STATE_IDLE
)
2568 else if (postsetup_state
== _HWMOD_STATE_DISABLED
)
2570 else if (postsetup_state
!= _HWMOD_STATE_ENABLED
)
2571 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2572 oh
->name
, postsetup_state
);
2578 * _setup - prepare IP block hardware for use
2579 * @oh: struct omap_hwmod *
2580 * @n: (unused, pass NULL)
2582 * Configure the IP block represented by @oh. This may include
2583 * enabling the IP block, resetting it, and placing it into a
2584 * post-setup state, depending on the type of IP block and applicable
2585 * flags. IP blocks are reset to prevent any previous configuration
2586 * by the bootloader or previous operating system from interfering
2587 * with power management or other parts of the system. The reset can
2588 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2589 * two phases for hwmod initialization. Code called here generally
2590 * affects the IP block hardware, or system integration hardware
2591 * associated with the IP block. Returns 0.
2593 static int _setup(struct omap_hwmod
*oh
, void *data
)
2595 if (oh
->_state
!= _HWMOD_STATE_INITIALIZED
)
2598 if (oh
->parent_hwmod
) {
2601 r
= _enable(oh
->parent_hwmod
);
2602 WARN(r
, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2603 oh
->name
, oh
->parent_hwmod
->name
);
2606 _setup_iclk_autoidle(oh
);
2608 if (!_setup_reset(oh
))
2609 _setup_postsetup(oh
);
2611 if (oh
->parent_hwmod
) {
2614 postsetup_state
= oh
->parent_hwmod
->_postsetup_state
;
2616 if (postsetup_state
== _HWMOD_STATE_IDLE
)
2617 _idle(oh
->parent_hwmod
);
2618 else if (postsetup_state
== _HWMOD_STATE_DISABLED
)
2619 _shutdown(oh
->parent_hwmod
);
2620 else if (postsetup_state
!= _HWMOD_STATE_ENABLED
)
2621 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2622 oh
->parent_hwmod
->name
, postsetup_state
);
2629 * _register - register a struct omap_hwmod
2630 * @oh: struct omap_hwmod *
2632 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2633 * already has been registered by the same name; -EINVAL if the
2634 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2635 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2636 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2639 * XXX The data should be copied into bootmem, so the original data
2640 * should be marked __initdata and freed after init. This would allow
2641 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2642 * that the copy process would be relatively complex due to the large number
2645 static int _register(struct omap_hwmod
*oh
)
2647 if (!oh
|| !oh
->name
|| !oh
->class || !oh
->class->name
||
2648 (oh
->_state
!= _HWMOD_STATE_UNKNOWN
))
2651 pr_debug("omap_hwmod: %s: registering\n", oh
->name
);
2653 if (_lookup(oh
->name
))
2656 list_add_tail(&oh
->node
, &omap_hwmod_list
);
2658 INIT_LIST_HEAD(&oh
->slave_ports
);
2659 spin_lock_init(&oh
->_lock
);
2660 lockdep_set_class(&oh
->_lock
, &oh
->hwmod_key
);
2662 oh
->_state
= _HWMOD_STATE_REGISTERED
;
2665 * XXX Rather than doing a strcmp(), this should test a flag
2666 * set in the hwmod data, inserted by the autogenerator code.
2668 if (!strcmp(oh
->name
, MPU_INITIATOR_NAME
))
2675 * _add_link - add an interconnect between two IP blocks
2676 * @oi: pointer to a struct omap_hwmod_ocp_if record
2678 * Add struct omap_hwmod_link records connecting the slave IP block
2679 * specified in @oi->slave to @oi. This code is assumed to run before
2680 * preemption or SMP has been enabled, thus avoiding the need for
2681 * locking in this code. Changes to this assumption will require
2682 * additional locking. Returns 0.
2684 static int _add_link(struct omap_hwmod_ocp_if
*oi
)
2686 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi
->master
->name
,
2689 list_add(&oi
->node
, &oi
->slave
->slave_ports
);
2690 oi
->slave
->slaves_cnt
++;
2696 * _register_link - register a struct omap_hwmod_ocp_if
2697 * @oi: struct omap_hwmod_ocp_if *
2699 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2700 * has already been registered; -EINVAL if @oi is NULL or if the
2701 * record pointed to by @oi is missing required fields; or 0 upon
2704 * XXX The data should be copied into bootmem, so the original data
2705 * should be marked __initdata and freed after init. This would allow
2706 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2708 static int __init
_register_link(struct omap_hwmod_ocp_if
*oi
)
2710 if (!oi
|| !oi
->master
|| !oi
->slave
|| !oi
->user
)
2713 if (oi
->_int_flags
& _OCPIF_INT_FLAGS_REGISTERED
)
2716 pr_debug("omap_hwmod: registering link from %s to %s\n",
2717 oi
->master
->name
, oi
->slave
->name
);
2720 * Register the connected hwmods, if they haven't been
2721 * registered already
2723 if (oi
->master
->_state
!= _HWMOD_STATE_REGISTERED
)
2724 _register(oi
->master
);
2726 if (oi
->slave
->_state
!= _HWMOD_STATE_REGISTERED
)
2727 _register(oi
->slave
);
2731 oi
->_int_flags
|= _OCPIF_INT_FLAGS_REGISTERED
;
2736 /* Static functions intended only for use in soc_ops field function pointers */
2739 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2740 * @oh: struct omap_hwmod *
2742 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2743 * does not have an IDLEST bit or if the module successfully leaves
2744 * slave idle; otherwise, pass along the return value of the
2745 * appropriate *_cm*_wait_module_ready() function.
2747 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod
*oh
)
2752 if (oh
->flags
& HWMOD_NO_IDLEST
)
2755 if (!_find_mpu_rt_port(oh
))
2758 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2760 return omap_cm_wait_module_ready(0, oh
->prcm
.omap2
.module_offs
,
2761 oh
->prcm
.omap2
.idlest_reg_id
,
2762 oh
->prcm
.omap2
.idlest_idle_bit
);
2766 * _omap4_wait_target_ready - wait for a module to leave slave idle
2767 * @oh: struct omap_hwmod *
2769 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2770 * does not have an IDLEST bit or if the module successfully leaves
2771 * slave idle; otherwise, pass along the return value of the
2772 * appropriate *_cm*_wait_module_ready() function.
2774 static int _omap4_wait_target_ready(struct omap_hwmod
*oh
)
2779 if (oh
->flags
& HWMOD_NO_IDLEST
|| !oh
->clkdm
)
2782 if (!_find_mpu_rt_port(oh
))
2785 if (_omap4_clkctrl_managed_by_clkfwk(oh
))
2788 if (!_omap4_has_clkctrl_clock(oh
))
2791 /* XXX check module SIDLEMODE, hardreset status */
2793 return omap_cm_wait_module_ready(oh
->clkdm
->prcm_partition
,
2795 oh
->prcm
.omap4
.clkctrl_offs
, 0);
2799 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2800 * @oh: struct omap_hwmod * to assert hardreset
2801 * @ohri: hardreset line data
2803 * Call omap2_prm_assert_hardreset() with parameters extracted from
2804 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2805 * use as an soc_ops function pointer. Passes along the return value
2806 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2807 * for removal when the PRM code is moved into drivers/.
2809 static int _omap2_assert_hardreset(struct omap_hwmod
*oh
,
2810 struct omap_hwmod_rst_info
*ohri
)
2812 return omap_prm_assert_hardreset(ohri
->rst_shift
, 0,
2813 oh
->prcm
.omap2
.module_offs
, 0);
2817 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2818 * @oh: struct omap_hwmod * to deassert hardreset
2819 * @ohri: hardreset line data
2821 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2822 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2823 * use as an soc_ops function pointer. Passes along the return value
2824 * from omap2_prm_deassert_hardreset(). XXX This function is
2825 * scheduled for removal when the PRM code is moved into drivers/.
2827 static int _omap2_deassert_hardreset(struct omap_hwmod
*oh
,
2828 struct omap_hwmod_rst_info
*ohri
)
2830 return omap_prm_deassert_hardreset(ohri
->rst_shift
, ohri
->st_shift
, 0,
2831 oh
->prcm
.omap2
.module_offs
, 0, 0);
2835 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2836 * @oh: struct omap_hwmod * to test hardreset
2837 * @ohri: hardreset line data
2839 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2840 * from the hwmod @oh and the hardreset line data @ohri. Only
2841 * intended for use as an soc_ops function pointer. Passes along the
2842 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2843 * function is scheduled for removal when the PRM code is moved into
2846 static int _omap2_is_hardreset_asserted(struct omap_hwmod
*oh
,
2847 struct omap_hwmod_rst_info
*ohri
)
2849 return omap_prm_is_hardreset_asserted(ohri
->st_shift
, 0,
2850 oh
->prcm
.omap2
.module_offs
, 0);
2854 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2855 * @oh: struct omap_hwmod * to assert hardreset
2856 * @ohri: hardreset line data
2858 * Call omap4_prminst_assert_hardreset() with parameters extracted
2859 * from the hwmod @oh and the hardreset line data @ohri. Only
2860 * intended for use as an soc_ops function pointer. Passes along the
2861 * return value from omap4_prminst_assert_hardreset(). XXX This
2862 * function is scheduled for removal when the PRM code is moved into
2865 static int _omap4_assert_hardreset(struct omap_hwmod
*oh
,
2866 struct omap_hwmod_rst_info
*ohri
)
2871 return omap_prm_assert_hardreset(ohri
->rst_shift
,
2872 oh
->clkdm
->pwrdm
.ptr
->prcm_partition
,
2873 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
2874 oh
->prcm
.omap4
.rstctrl_offs
);
2878 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2879 * @oh: struct omap_hwmod * to deassert hardreset
2880 * @ohri: hardreset line data
2882 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2883 * from the hwmod @oh and the hardreset line data @ohri. Only
2884 * intended for use as an soc_ops function pointer. Passes along the
2885 * return value from omap4_prminst_deassert_hardreset(). XXX This
2886 * function is scheduled for removal when the PRM code is moved into
2889 static int _omap4_deassert_hardreset(struct omap_hwmod
*oh
,
2890 struct omap_hwmod_rst_info
*ohri
)
2896 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2897 oh
->name
, ohri
->name
);
2898 return omap_prm_deassert_hardreset(ohri
->rst_shift
, ohri
->rst_shift
,
2899 oh
->clkdm
->pwrdm
.ptr
->prcm_partition
,
2900 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
2901 oh
->prcm
.omap4
.rstctrl_offs
,
2902 oh
->prcm
.omap4
.rstctrl_offs
+
2903 OMAP4_RST_CTRL_ST_OFFSET
);
2907 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2908 * @oh: struct omap_hwmod * to test hardreset
2909 * @ohri: hardreset line data
2911 * Call omap4_prminst_is_hardreset_asserted() with parameters
2912 * extracted from the hwmod @oh and the hardreset line data @ohri.
2913 * Only intended for use as an soc_ops function pointer. Passes along
2914 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2915 * This function is scheduled for removal when the PRM code is moved
2918 static int _omap4_is_hardreset_asserted(struct omap_hwmod
*oh
,
2919 struct omap_hwmod_rst_info
*ohri
)
2924 return omap_prm_is_hardreset_asserted(ohri
->rst_shift
,
2925 oh
->clkdm
->pwrdm
.ptr
->
2927 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
2928 oh
->prcm
.omap4
.rstctrl_offs
);
2932 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2933 * @oh: struct omap_hwmod * to disable control for
2935 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2936 * will be using its main_clk to enable/disable the module. Returns
2939 static int _omap4_disable_direct_prcm(struct omap_hwmod
*oh
)
2944 oh
->prcm
.omap4
.flags
|= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK
;
2950 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2951 * @oh: struct omap_hwmod * to deassert hardreset
2952 * @ohri: hardreset line data
2954 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2955 * from the hwmod @oh and the hardreset line data @ohri. Only
2956 * intended for use as an soc_ops function pointer. Passes along the
2957 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2958 * function is scheduled for removal when the PRM code is moved into
2961 static int _am33xx_deassert_hardreset(struct omap_hwmod
*oh
,
2962 struct omap_hwmod_rst_info
*ohri
)
2964 return omap_prm_deassert_hardreset(ohri
->rst_shift
, ohri
->st_shift
,
2965 oh
->clkdm
->pwrdm
.ptr
->prcm_partition
,
2966 oh
->clkdm
->pwrdm
.ptr
->prcm_offs
,
2967 oh
->prcm
.omap4
.rstctrl_offs
,
2968 oh
->prcm
.omap4
.rstst_offs
);
2971 /* Public functions */
2973 u32
omap_hwmod_read(struct omap_hwmod
*oh
, u16 reg_offs
)
2975 if (oh
->flags
& HWMOD_16BIT_REG
)
2976 return readw_relaxed(oh
->_mpu_rt_va
+ reg_offs
);
2978 return readl_relaxed(oh
->_mpu_rt_va
+ reg_offs
);
2981 void omap_hwmod_write(u32 v
, struct omap_hwmod
*oh
, u16 reg_offs
)
2983 if (oh
->flags
& HWMOD_16BIT_REG
)
2984 writew_relaxed(v
, oh
->_mpu_rt_va
+ reg_offs
);
2986 writel_relaxed(v
, oh
->_mpu_rt_va
+ reg_offs
);
2990 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2991 * @oh: struct omap_hwmod *
2993 * This is a public function exposed to drivers. Some drivers may need to do
2994 * some settings before and after resetting the device. Those drivers after
2995 * doing the necessary settings could use this function to start a reset by
2996 * setting the SYSCONFIG.SOFTRESET bit.
2998 int omap_hwmod_softreset(struct omap_hwmod
*oh
)
3003 if (!oh
|| !(oh
->_sysc_cache
))
3006 v
= oh
->_sysc_cache
;
3007 ret
= _set_softreset(oh
, &v
);
3010 _write_sysconfig(v
, oh
);
3012 ret
= _clear_softreset(oh
, &v
);
3015 _write_sysconfig(v
, oh
);
3022 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3023 * @name: name of the omap_hwmod to look up
3025 * Given a @name of an omap_hwmod, return a pointer to the registered
3026 * struct omap_hwmod *, or NULL upon error.
3028 struct omap_hwmod
*omap_hwmod_lookup(const char *name
)
3030 struct omap_hwmod
*oh
;
3041 * omap_hwmod_for_each - call function for each registered omap_hwmod
3042 * @fn: pointer to a callback function
3043 * @data: void * data to pass to callback function
3045 * Call @fn for each registered omap_hwmod, passing @data to each
3046 * function. @fn must return 0 for success or any other value for
3047 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3048 * will stop and the non-zero return value will be passed to the
3049 * caller of omap_hwmod_for_each(). @fn is called with
3050 * omap_hwmod_for_each() held.
3052 int omap_hwmod_for_each(int (*fn
)(struct omap_hwmod
*oh
, void *data
),
3055 struct omap_hwmod
*temp_oh
;
3061 list_for_each_entry(temp_oh
, &omap_hwmod_list
, node
) {
3062 ret
= (*fn
)(temp_oh
, data
);
3071 * omap_hwmod_register_links - register an array of hwmod links
3072 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3074 * Intended to be called early in boot before the clock framework is
3075 * initialized. If @ois is not null, will register all omap_hwmods
3076 * listed in @ois that are valid for this chip. Returns -EINVAL if
3077 * omap_hwmod_init() hasn't been called before calling this function,
3078 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3081 int __init
omap_hwmod_register_links(struct omap_hwmod_ocp_if
**ois
)
3091 if (ois
[0] == NULL
) /* Empty list */
3096 r
= _register_link(ois
[i
]);
3097 WARN(r
&& r
!= -EEXIST
,
3098 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3099 ois
[i
]->master
->name
, ois
[i
]->slave
->name
, r
);
3106 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3107 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3109 * If the hwmod data corresponding to the MPU subsystem IP block
3110 * hasn't been initialized and set up yet, do so now. This must be
3111 * done first since sleep dependencies may be added from other hwmods
3112 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3115 static void __init
_ensure_mpu_hwmod_is_setup(struct omap_hwmod
*oh
)
3117 if (!mpu_oh
|| mpu_oh
->_state
== _HWMOD_STATE_UNKNOWN
)
3118 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3119 __func__
, MPU_INITIATOR_NAME
);
3120 else if (mpu_oh
->_state
== _HWMOD_STATE_REGISTERED
&& oh
!= mpu_oh
)
3121 omap_hwmod_setup_one(MPU_INITIATOR_NAME
);
3125 * omap_hwmod_setup_one - set up a single hwmod
3126 * @oh_name: const char * name of the already-registered hwmod to set up
3128 * Initialize and set up a single hwmod. Intended to be used for a
3129 * small number of early devices, such as the timer IP blocks used for
3130 * the scheduler clock. Must be called after omap2_clk_init().
3131 * Resolves the struct clk names to struct clk pointers for each
3132 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3133 * -EINVAL upon error or 0 upon success.
3135 int __init
omap_hwmod_setup_one(const char *oh_name
)
3137 struct omap_hwmod
*oh
;
3139 pr_debug("omap_hwmod: %s: %s\n", oh_name
, __func__
);
3141 oh
= _lookup(oh_name
);
3143 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name
);
3147 _ensure_mpu_hwmod_is_setup(oh
);
3155 static void omap_hwmod_check_one(struct device
*dev
,
3156 const char *name
, s8 v1
, u8 v2
)
3162 dev_warn(dev
, "%s %d != %d\n", name
, v1
, v2
);
3166 * omap_hwmod_check_sysc - check sysc against platform sysc
3167 * @dev: struct device
3168 * @data: module data
3169 * @sysc_fields: new sysc configuration
3171 static int omap_hwmod_check_sysc(struct device
*dev
,
3172 const struct ti_sysc_module_data
*data
,
3173 struct sysc_regbits
*sysc_fields
)
3175 const struct sysc_regbits
*regbits
= data
->cap
->regbits
;
3177 omap_hwmod_check_one(dev
, "dmadisable_shift",
3178 regbits
->dmadisable_shift
,
3179 sysc_fields
->dmadisable_shift
);
3180 omap_hwmod_check_one(dev
, "midle_shift",
3181 regbits
->midle_shift
,
3182 sysc_fields
->midle_shift
);
3183 omap_hwmod_check_one(dev
, "sidle_shift",
3184 regbits
->sidle_shift
,
3185 sysc_fields
->sidle_shift
);
3186 omap_hwmod_check_one(dev
, "clkact_shift",
3187 regbits
->clkact_shift
,
3188 sysc_fields
->clkact_shift
);
3189 omap_hwmod_check_one(dev
, "enwkup_shift",
3190 regbits
->enwkup_shift
,
3191 sysc_fields
->enwkup_shift
);
3192 omap_hwmod_check_one(dev
, "srst_shift",
3193 regbits
->srst_shift
,
3194 sysc_fields
->srst_shift
);
3195 omap_hwmod_check_one(dev
, "autoidle_shift",
3196 regbits
->autoidle_shift
,
3197 sysc_fields
->autoidle_shift
);
3203 * omap_hwmod_init_regbits - init sysconfig specific register bits
3204 * @dev: struct device
3205 * @data: module data
3206 * @sysc_fields: new sysc configuration
3208 static int omap_hwmod_init_regbits(struct device
*dev
,
3209 const struct ti_sysc_module_data
*data
,
3210 struct sysc_regbits
**sysc_fields
)
3212 *sysc_fields
= NULL
;
3214 switch (data
->cap
->type
) {
3216 case TI_SYSC_OMAP2_TIMER
:
3217 *sysc_fields
= &omap_hwmod_sysc_type1
;
3219 case TI_SYSC_OMAP3_SHAM
:
3220 *sysc_fields
= &omap3_sham_sysc_fields
;
3222 case TI_SYSC_OMAP3_AES
:
3223 *sysc_fields
= &omap3xxx_aes_sysc_fields
;
3226 case TI_SYSC_OMAP4_TIMER
:
3227 *sysc_fields
= &omap_hwmod_sysc_type2
;
3229 case TI_SYSC_OMAP4_SIMPLE
:
3230 *sysc_fields
= &omap_hwmod_sysc_type3
;
3232 case TI_SYSC_OMAP34XX_SR
:
3233 *sysc_fields
= &omap34xx_sr_sysc_fields
;
3235 case TI_SYSC_OMAP36XX_SR
:
3236 *sysc_fields
= &omap36xx_sr_sysc_fields
;
3238 case TI_SYSC_OMAP4_SR
:
3239 *sysc_fields
= &omap36xx_sr_sysc_fields
;
3241 case TI_SYSC_OMAP4_MCASP
:
3242 *sysc_fields
= &omap_hwmod_sysc_type_mcasp
;
3244 case TI_SYSC_OMAP4_USB_HOST_FS
:
3245 *sysc_fields
= &omap_hwmod_sysc_type_usb_host_fs
;
3251 return omap_hwmod_check_sysc(dev
, data
, *sysc_fields
);
3255 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3256 * @dev: struct device
3257 * @data: module data
3258 * @rev_offs: revision register offset
3259 * @sysc_offs: sysc register offset
3260 * @syss_offs: syss register offset
3262 static int omap_hwmod_init_reg_offs(struct device
*dev
,
3263 const struct ti_sysc_module_data
*data
,
3264 s32
*rev_offs
, s32
*sysc_offs
,
3267 *rev_offs
= -ENODEV
;
3271 if (data
->offsets
[SYSC_REVISION
] >= 0)
3272 *rev_offs
= data
->offsets
[SYSC_REVISION
];
3274 if (data
->offsets
[SYSC_SYSCONFIG
] >= 0)
3275 *sysc_offs
= data
->offsets
[SYSC_SYSCONFIG
];
3277 if (data
->offsets
[SYSC_SYSSTATUS
] >= 0)
3278 *syss_offs
= data
->offsets
[SYSC_SYSSTATUS
];
3284 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3285 * @dev: struct device
3286 * @data: module data
3287 * @sysc_flags: module configuration
3289 static int omap_hwmod_init_sysc_flags(struct device
*dev
,
3290 const struct ti_sysc_module_data
*data
,
3295 switch (data
->cap
->type
) {
3297 case TI_SYSC_OMAP2_TIMER
:
3298 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3299 if (data
->cfg
->sysc_val
& SYSC_OMAP2_CLOCKACTIVITY
)
3300 *sysc_flags
|= SYSC_HAS_CLOCKACTIVITY
;
3301 if (data
->cfg
->sysc_val
& SYSC_OMAP2_EMUFREE
)
3302 *sysc_flags
|= SYSC_HAS_EMUFREE
;
3303 if (data
->cfg
->sysc_val
& SYSC_OMAP2_ENAWAKEUP
)
3304 *sysc_flags
|= SYSC_HAS_ENAWAKEUP
;
3305 if (data
->cfg
->sysc_val
& SYSC_OMAP2_SOFTRESET
)
3306 *sysc_flags
|= SYSC_HAS_SOFTRESET
;
3307 if (data
->cfg
->sysc_val
& SYSC_OMAP2_AUTOIDLE
)
3308 *sysc_flags
|= SYSC_HAS_AUTOIDLE
;
3311 case TI_SYSC_OMAP4_TIMER
:
3312 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3313 if (data
->cfg
->sysc_val
& SYSC_OMAP4_DMADISABLE
)
3314 *sysc_flags
|= SYSC_HAS_DMADISABLE
;
3315 if (data
->cfg
->sysc_val
& SYSC_OMAP4_FREEEMU
)
3316 *sysc_flags
|= SYSC_HAS_EMUFREE
;
3317 if (data
->cfg
->sysc_val
& SYSC_OMAP4_SOFTRESET
)
3318 *sysc_flags
|= SYSC_HAS_SOFTRESET
;
3320 case TI_SYSC_OMAP34XX_SR
:
3321 case TI_SYSC_OMAP36XX_SR
:
3322 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3323 if (data
->cfg
->sysc_val
& SYSC_OMAP3_SR_ENAWAKEUP
)
3324 *sysc_flags
|= SYSC_HAS_ENAWAKEUP
;
3327 if (data
->cap
->regbits
->emufree_shift
>= 0)
3328 *sysc_flags
|= SYSC_HAS_EMUFREE
;
3329 if (data
->cap
->regbits
->enwkup_shift
>= 0)
3330 *sysc_flags
|= SYSC_HAS_ENAWAKEUP
;
3331 if (data
->cap
->regbits
->srst_shift
>= 0)
3332 *sysc_flags
|= SYSC_HAS_SOFTRESET
;
3333 if (data
->cap
->regbits
->autoidle_shift
>= 0)
3334 *sysc_flags
|= SYSC_HAS_AUTOIDLE
;
3338 if (data
->cap
->regbits
->midle_shift
>= 0 &&
3339 data
->cfg
->midlemodes
)
3340 *sysc_flags
|= SYSC_HAS_MIDLEMODE
;
3342 if (data
->cap
->regbits
->sidle_shift
>= 0 &&
3343 data
->cfg
->sidlemodes
)
3344 *sysc_flags
|= SYSC_HAS_SIDLEMODE
;
3346 if (data
->cfg
->quirks
& SYSC_QUIRK_UNCACHED
)
3347 *sysc_flags
|= SYSC_NO_CACHE
;
3348 if (data
->cfg
->quirks
& SYSC_QUIRK_RESET_STATUS
)
3349 *sysc_flags
|= SYSC_HAS_RESET_STATUS
;
3351 if (data
->cfg
->syss_mask
& 1)
3352 *sysc_flags
|= SYSS_HAS_RESET_STATUS
;
3358 * omap_hwmod_init_idlemodes - initialize module idle modes
3359 * @dev: struct device
3360 * @data: module data
3361 * @idlemodes: module supported idle modes
3363 static int omap_hwmod_init_idlemodes(struct device
*dev
,
3364 const struct ti_sysc_module_data
*data
,
3369 if (data
->cfg
->midlemodes
& BIT(SYSC_IDLE_FORCE
))
3370 *idlemodes
|= MSTANDBY_FORCE
;
3371 if (data
->cfg
->midlemodes
& BIT(SYSC_IDLE_NO
))
3372 *idlemodes
|= MSTANDBY_NO
;
3373 if (data
->cfg
->midlemodes
& BIT(SYSC_IDLE_SMART
))
3374 *idlemodes
|= MSTANDBY_SMART
;
3375 if (data
->cfg
->midlemodes
& BIT(SYSC_IDLE_SMART_WKUP
))
3376 *idlemodes
|= MSTANDBY_SMART_WKUP
;
3378 if (data
->cfg
->sidlemodes
& BIT(SYSC_IDLE_FORCE
))
3379 *idlemodes
|= SIDLE_FORCE
;
3380 if (data
->cfg
->sidlemodes
& BIT(SYSC_IDLE_NO
))
3381 *idlemodes
|= SIDLE_NO
;
3382 if (data
->cfg
->sidlemodes
& BIT(SYSC_IDLE_SMART
))
3383 *idlemodes
|= SIDLE_SMART
;
3384 if (data
->cfg
->sidlemodes
& BIT(SYSC_IDLE_SMART_WKUP
))
3385 *idlemodes
|= SIDLE_SMART_WKUP
;
3391 * omap_hwmod_check_module - check new module against platform data
3392 * @dev: struct device
3394 * @data: new module data
3395 * @sysc_fields: sysc register bits
3396 * @rev_offs: revision register offset
3397 * @sysc_offs: sysconfig register offset
3398 * @syss_offs: sysstatus register offset
3399 * @sysc_flags: sysc specific flags
3400 * @idlemodes: sysc supported idlemodes
3402 static int omap_hwmod_check_module(struct device
*dev
,
3403 struct omap_hwmod
*oh
,
3404 const struct ti_sysc_module_data
*data
,
3405 struct sysc_regbits
*sysc_fields
,
3406 s32 rev_offs
, s32 sysc_offs
,
3407 s32 syss_offs
, u32 sysc_flags
,
3410 if (!oh
->class->sysc
)
3413 if (sysc_fields
!= oh
->class->sysc
->sysc_fields
)
3414 dev_warn(dev
, "sysc_fields %p != %p\n", sysc_fields
,
3415 oh
->class->sysc
->sysc_fields
);
3417 if (rev_offs
!= oh
->class->sysc
->rev_offs
)
3418 dev_warn(dev
, "rev_offs %08x != %08x\n", rev_offs
,
3419 oh
->class->sysc
->rev_offs
);
3420 if (sysc_offs
!= oh
->class->sysc
->sysc_offs
)
3421 dev_warn(dev
, "sysc_offs %08x != %08x\n", sysc_offs
,
3422 oh
->class->sysc
->sysc_offs
);
3423 if (syss_offs
!= oh
->class->sysc
->syss_offs
)
3424 dev_warn(dev
, "syss_offs %08x != %08x\n", syss_offs
,
3425 oh
->class->sysc
->syss_offs
);
3427 if (sysc_flags
!= oh
->class->sysc
->sysc_flags
)
3428 dev_warn(dev
, "sysc_flags %08x != %08x\n", sysc_flags
,
3429 oh
->class->sysc
->sysc_flags
);
3431 if (idlemodes
!= oh
->class->sysc
->idlemodes
)
3432 dev_warn(dev
, "idlemodes %08x != %08x\n", idlemodes
,
3433 oh
->class->sysc
->idlemodes
);
3435 if (data
->cfg
->srst_udelay
!= oh
->class->sysc
->srst_udelay
)
3436 dev_warn(dev
, "srst_udelay %i != %i\n",
3437 data
->cfg
->srst_udelay
,
3438 oh
->class->sysc
->srst_udelay
);
3444 * omap_hwmod_allocate_module - allocate new module
3445 * @dev: struct device
3447 * @sysc_fields: sysc register bits
3448 * @rev_offs: revision register offset
3449 * @sysc_offs: sysconfig register offset
3450 * @syss_offs: sysstatus register offset
3451 * @sysc_flags: sysc specific flags
3452 * @idlemodes: sysc supported idlemodes
3454 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3456 static int omap_hwmod_allocate_module(struct device
*dev
, struct omap_hwmod
*oh
,
3457 const struct ti_sysc_module_data
*data
,
3458 struct sysc_regbits
*sysc_fields
,
3459 s32 rev_offs
, s32 sysc_offs
,
3460 s32 syss_offs
, u32 sysc_flags
,
3463 struct omap_hwmod_class_sysconfig
*sysc
;
3464 struct omap_hwmod_class
*class = NULL
;
3465 struct omap_hwmod_ocp_if
*oi
= NULL
;
3466 struct clockdomain
*clkdm
= NULL
;
3467 struct clk
*clk
= NULL
;
3468 void __iomem
*regs
= NULL
;
3469 unsigned long flags
;
3471 sysc
= kzalloc(sizeof(*sysc
), GFP_KERNEL
);
3475 sysc
->sysc_fields
= sysc_fields
;
3476 sysc
->rev_offs
= rev_offs
;
3477 sysc
->sysc_offs
= sysc_offs
;
3478 sysc
->syss_offs
= syss_offs
;
3479 sysc
->sysc_flags
= sysc_flags
;
3480 sysc
->idlemodes
= idlemodes
;
3481 sysc
->srst_udelay
= data
->cfg
->srst_udelay
;
3483 if (!oh
->_mpu_rt_va
) {
3484 regs
= ioremap(data
->module_pa
,
3491 * We may need a new oh->class as the other devices in the same class
3492 * may not yet have ioremapped their registers.
3494 if (oh
->class->name
&& strcmp(oh
->class->name
, data
->name
)) {
3495 class = kmemdup(oh
->class, sizeof(*oh
->class), GFP_KERNEL
);
3500 if (list_empty(&oh
->slave_ports
)) {
3501 oi
= kcalloc(1, sizeof(*oi
), GFP_KERNEL
);
3506 * Note that we assume interconnect interface clocks will be
3507 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3508 * on omap24xx and omap3.
3511 oi
->user
= OCP_USER_MPU
| OCP_USER_SDMA
;
3515 struct clk_hw_omap
*hwclk
;
3517 clk
= of_clk_get_by_name(dev
->of_node
, "fck");
3524 * Populate clockdomain based on dts clock. It is needed for
3525 * clkdm_deny_idle() and clkdm_allow_idle() until we have have
3526 * interconnect driver and reset driver capable of blocking
3527 * clockdomain idle during reset, enable and idle.
3530 hwclk
= to_clk_hw_omap(__clk_get_hw(clk
));
3531 if (hwclk
&& hwclk
->clkdm_name
)
3532 clkdm
= clkdm_lookup(hwclk
->clkdm_name
);
3536 * Note that we assume interconnect driver manages the clocks
3537 * and do not need to populate oh->_clk for dynamically
3538 * allocated modules.
3544 spin_lock_irqsave(&oh
->_lock
, flags
);
3546 oh
->_mpu_rt_va
= regs
;
3549 oh
->class->sysc
= sysc
;
3554 oh
->_state
= _HWMOD_STATE_INITIALIZED
;
3555 oh
->_postsetup_state
= _HWMOD_STATE_DEFAULT
;
3557 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3562 static const struct omap_hwmod_reset omap24xx_reset_quirks
[] = {
3563 { .match
= "msdi", .len
= 4, .reset
= omap_msdi_reset
, },
3566 static const struct omap_hwmod_reset dra7_reset_quirks
[] = {
3567 { .match
= "pcie", .len
= 4, .reset
= dra7xx_pciess_reset
, },
3570 static const struct omap_hwmod_reset omap_reset_quirks
[] = {
3571 { .match
= "dss", .len
= 3, .reset
= omap_dss_reset
, },
3572 { .match
= "hdq1w", .len
= 5, .reset
= omap_hdq1w_reset
, },
3573 { .match
= "i2c", .len
= 3, .reset
= omap_i2c_reset
, },
3574 { .match
= "wd_timer", .len
= 8, .reset
= omap2_wd_timer_reset
, },
3578 omap_hwmod_init_reset_quirk(struct device
*dev
, struct omap_hwmod
*oh
,
3579 const struct ti_sysc_module_data
*data
,
3580 const struct omap_hwmod_reset
*quirks
,
3583 const struct omap_hwmod_reset
*quirk
;
3586 for (i
= 0; i
< quirks_sz
; i
++) {
3588 if (!strncmp(data
->name
, quirk
->match
, quirk
->len
)) {
3589 oh
->class->reset
= quirk
->reset
;
3597 omap_hwmod_init_reset_quirks(struct device
*dev
, struct omap_hwmod
*oh
,
3598 const struct ti_sysc_module_data
*data
)
3600 if (soc_is_omap24xx())
3601 omap_hwmod_init_reset_quirk(dev
, oh
, data
,
3602 omap24xx_reset_quirks
,
3603 ARRAY_SIZE(omap24xx_reset_quirks
));
3605 if (soc_is_dra7xx())
3606 omap_hwmod_init_reset_quirk(dev
, oh
, data
, dra7_reset_quirks
,
3607 ARRAY_SIZE(dra7_reset_quirks
));
3609 omap_hwmod_init_reset_quirk(dev
, oh
, data
, omap_reset_quirks
,
3610 ARRAY_SIZE(omap_reset_quirks
));
3614 * omap_hwmod_init_module - initialize new module
3615 * @dev: struct device
3616 * @data: module data
3617 * @cookie: cookie for the caller to use for later calls
3619 int omap_hwmod_init_module(struct device
*dev
,
3620 const struct ti_sysc_module_data
*data
,
3621 struct ti_sysc_cookie
*cookie
)
3623 struct omap_hwmod
*oh
;
3624 struct sysc_regbits
*sysc_fields
;
3625 s32 rev_offs
, sysc_offs
, syss_offs
;
3626 u32 sysc_flags
, idlemodes
;
3632 oh
= _lookup(data
->name
);
3634 oh
= kzalloc(sizeof(*oh
), GFP_KERNEL
);
3638 oh
->name
= data
->name
;
3639 oh
->_state
= _HWMOD_STATE_UNKNOWN
;
3640 lockdep_register_key(&oh
->hwmod_key
);
3642 /* Unused, can be handled by PRM driver handling resets */
3643 oh
->prcm
.omap4
.flags
= HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT
;
3645 oh
->class = kzalloc(sizeof(*oh
->class), GFP_KERNEL
);
3651 omap_hwmod_init_reset_quirks(dev
, oh
, data
);
3653 oh
->class->name
= data
->name
;
3654 mutex_lock(&list_lock
);
3655 error
= _register(oh
);
3656 mutex_unlock(&list_lock
);
3661 error
= omap_hwmod_init_regbits(dev
, data
, &sysc_fields
);
3665 error
= omap_hwmod_init_reg_offs(dev
, data
, &rev_offs
,
3666 &sysc_offs
, &syss_offs
);
3670 error
= omap_hwmod_init_sysc_flags(dev
, data
, &sysc_flags
);
3674 error
= omap_hwmod_init_idlemodes(dev
, data
, &idlemodes
);
3678 if (data
->cfg
->quirks
& SYSC_QUIRK_NO_IDLE
)
3679 oh
->flags
|= HWMOD_NO_IDLE
;
3680 if (data
->cfg
->quirks
& SYSC_QUIRK_NO_IDLE_ON_INIT
)
3681 oh
->flags
|= HWMOD_INIT_NO_IDLE
;
3682 if (data
->cfg
->quirks
& SYSC_QUIRK_NO_RESET_ON_INIT
)
3683 oh
->flags
|= HWMOD_INIT_NO_RESET
;
3684 if (data
->cfg
->quirks
& SYSC_QUIRK_USE_CLOCKACT
)
3685 oh
->flags
|= HWMOD_SET_DEFAULT_CLOCKACT
;
3686 if (data
->cfg
->quirks
& SYSC_QUIRK_SWSUP_SIDLE
)
3687 oh
->flags
|= HWMOD_SWSUP_SIDLE
;
3688 if (data
->cfg
->quirks
& SYSC_QUIRK_SWSUP_SIDLE_ACT
)
3689 oh
->flags
|= HWMOD_SWSUP_SIDLE_ACT
;
3690 if (data
->cfg
->quirks
& SYSC_QUIRK_SWSUP_MSTANDBY
)
3691 oh
->flags
|= HWMOD_SWSUP_MSTANDBY
;
3693 error
= omap_hwmod_check_module(dev
, oh
, data
, sysc_fields
,
3694 rev_offs
, sysc_offs
, syss_offs
,
3695 sysc_flags
, idlemodes
);
3699 return omap_hwmod_allocate_module(dev
, oh
, data
, sysc_fields
,
3700 rev_offs
, sysc_offs
, syss_offs
,
3701 sysc_flags
, idlemodes
);
3705 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3707 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3708 * early concole so that hwmod core doesn't reset and keep it in idle
3709 * that specific uart.
3711 #ifdef CONFIG_SERIAL_EARLYCON
3712 static void __init
omap_hwmod_setup_earlycon_flags(void)
3714 struct device_node
*np
;
3715 struct omap_hwmod
*oh
;
3718 np
= of_find_node_by_path("/chosen");
3720 uart
= of_get_property(np
, "stdout-path", NULL
);
3722 np
= of_find_node_by_path(uart
);
3724 uart
= of_get_property(np
, "ti,hwmods", NULL
);
3725 oh
= omap_hwmod_lookup(uart
);
3727 uart
= of_get_property(np
->parent
,
3730 oh
= omap_hwmod_lookup(uart
);
3733 oh
->flags
|= DEBUG_OMAPUART_FLAGS
;
3741 * omap_hwmod_setup_all - set up all registered IP blocks
3743 * Initialize and set up all IP blocks registered with the hwmod code.
3744 * Must be called after omap2_clk_init(). Resolves the struct clk
3745 * names to struct clk pointers for each registered omap_hwmod. Also
3746 * calls _setup() on each hwmod. Returns 0 upon success.
3748 static int __init
omap_hwmod_setup_all(void)
3750 _ensure_mpu_hwmod_is_setup(NULL
);
3752 omap_hwmod_for_each(_init
, NULL
);
3753 #ifdef CONFIG_SERIAL_EARLYCON
3754 omap_hwmod_setup_earlycon_flags();
3756 omap_hwmod_for_each(_setup
, NULL
);
3760 omap_postcore_initcall(omap_hwmod_setup_all
);
3763 * omap_hwmod_enable - enable an omap_hwmod
3764 * @oh: struct omap_hwmod *
3766 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3767 * Returns -EINVAL on error or passes along the return value from _enable().
3769 int omap_hwmod_enable(struct omap_hwmod
*oh
)
3772 unsigned long flags
;
3777 spin_lock_irqsave(&oh
->_lock
, flags
);
3779 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3785 * omap_hwmod_idle - idle an omap_hwmod
3786 * @oh: struct omap_hwmod *
3788 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3789 * Returns -EINVAL on error or passes along the return value from _idle().
3791 int omap_hwmod_idle(struct omap_hwmod
*oh
)
3794 unsigned long flags
;
3799 spin_lock_irqsave(&oh
->_lock
, flags
);
3801 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3807 * omap_hwmod_shutdown - shutdown an omap_hwmod
3808 * @oh: struct omap_hwmod *
3810 * Shutdown an omap_hwmod @oh. Intended to be called by
3811 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3812 * the return value from _shutdown().
3814 int omap_hwmod_shutdown(struct omap_hwmod
*oh
)
3817 unsigned long flags
;
3822 spin_lock_irqsave(&oh
->_lock
, flags
);
3824 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3830 * IP block data retrieval functions
3834 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3835 * @oh: struct omap_hwmod *
3837 * Return the powerdomain pointer associated with the OMAP module
3838 * @oh's main clock. If @oh does not have a main clk, return the
3839 * powerdomain associated with the interface clock associated with the
3840 * module's MPU port. (XXX Perhaps this should use the SDMA port
3841 * instead?) Returns NULL on error, or a struct powerdomain * on
3844 struct powerdomain
*omap_hwmod_get_pwrdm(struct omap_hwmod
*oh
)
3847 struct omap_hwmod_ocp_if
*oi
;
3848 struct clockdomain
*clkdm
;
3849 struct clk_hw_omap
*clk
;
3855 return oh
->clkdm
->pwrdm
.ptr
;
3860 oi
= _find_mpu_rt_port(oh
);
3866 clk
= to_clk_hw_omap(__clk_get_hw(c
));
3871 return clkdm
->pwrdm
.ptr
;
3875 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3876 * @oh: struct omap_hwmod *
3878 * Returns the virtual address corresponding to the beginning of the
3879 * module's register target, in the address range that is intended to
3880 * be used by the MPU. Returns the virtual address upon success or NULL
3883 void __iomem
*omap_hwmod_get_mpu_rt_va(struct omap_hwmod
*oh
)
3888 if (oh
->_int_flags
& _HWMOD_NO_MPU_PORT
)
3891 if (oh
->_state
== _HWMOD_STATE_UNKNOWN
)
3894 return oh
->_mpu_rt_va
;
3898 * XXX what about functions for drivers to save/restore ocp_sysconfig
3899 * for context save/restore operations?
3903 * omap_hwmod_enable_wakeup - allow device to wake up the system
3904 * @oh: struct omap_hwmod *
3906 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3907 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3908 * this IP block if it has dynamic mux entries. Eventually this
3909 * should set PRCM wakeup registers to cause the PRCM to receive
3910 * wakeup events from the module. Does not set any wakeup routing
3911 * registers beyond this point - if the module is to wake up any other
3912 * module or subsystem, that must be set separately. Called by
3913 * omap_device code. Returns -EINVAL on error or 0 upon success.
3915 int omap_hwmod_enable_wakeup(struct omap_hwmod
*oh
)
3917 unsigned long flags
;
3920 spin_lock_irqsave(&oh
->_lock
, flags
);
3922 if (oh
->class->sysc
&&
3923 (oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
)) {
3924 v
= oh
->_sysc_cache
;
3925 _enable_wakeup(oh
, &v
);
3926 _write_sysconfig(v
, oh
);
3929 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3935 * omap_hwmod_disable_wakeup - prevent device from waking the system
3936 * @oh: struct omap_hwmod *
3938 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3939 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3940 * events for this IP block if it has dynamic mux entries. Eventually
3941 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3942 * wakeup events from the module. Does not set any wakeup routing
3943 * registers beyond this point - if the module is to wake up any other
3944 * module or subsystem, that must be set separately. Called by
3945 * omap_device code. Returns -EINVAL on error or 0 upon success.
3947 int omap_hwmod_disable_wakeup(struct omap_hwmod
*oh
)
3949 unsigned long flags
;
3952 spin_lock_irqsave(&oh
->_lock
, flags
);
3954 if (oh
->class->sysc
&&
3955 (oh
->class->sysc
->sysc_flags
& SYSC_HAS_ENAWAKEUP
)) {
3956 v
= oh
->_sysc_cache
;
3957 _disable_wakeup(oh
, &v
);
3958 _write_sysconfig(v
, oh
);
3961 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3967 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3968 * contained in the hwmod module.
3969 * @oh: struct omap_hwmod *
3970 * @name: name of the reset line to lookup and assert
3972 * Some IP like dsp, ipu or iva contain processor that require
3973 * an HW reset line to be assert / deassert in order to enable fully
3974 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3975 * yet supported on this OMAP; otherwise, passes along the return value
3976 * from _assert_hardreset().
3978 int omap_hwmod_assert_hardreset(struct omap_hwmod
*oh
, const char *name
)
3981 unsigned long flags
;
3986 spin_lock_irqsave(&oh
->_lock
, flags
);
3987 ret
= _assert_hardreset(oh
, name
);
3988 spin_unlock_irqrestore(&oh
->_lock
, flags
);
3994 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3995 * contained in the hwmod module.
3996 * @oh: struct omap_hwmod *
3997 * @name: name of the reset line to look up and deassert
3999 * Some IP like dsp, ipu or iva contain processor that require
4000 * an HW reset line to be assert / deassert in order to enable fully
4001 * the IP. Returns -EINVAL if @oh is null or if the operation is not
4002 * yet supported on this OMAP; otherwise, passes along the return value
4003 * from _deassert_hardreset().
4005 int omap_hwmod_deassert_hardreset(struct omap_hwmod
*oh
, const char *name
)
4008 unsigned long flags
;
4013 spin_lock_irqsave(&oh
->_lock
, flags
);
4014 ret
= _deassert_hardreset(oh
, name
);
4015 spin_unlock_irqrestore(&oh
->_lock
, flags
);
4021 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
4022 * @classname: struct omap_hwmod_class name to search for
4023 * @fn: callback function pointer to call for each hwmod in class @classname
4024 * @user: arbitrary context data to pass to the callback function
4026 * For each omap_hwmod of class @classname, call @fn.
4027 * If the callback function returns something other than
4028 * zero, the iterator is terminated, and the callback function's return
4029 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4030 * if @classname or @fn are NULL, or passes back the error code from @fn.
4032 int omap_hwmod_for_each_by_class(const char *classname
,
4033 int (*fn
)(struct omap_hwmod
*oh
,
4037 struct omap_hwmod
*temp_oh
;
4040 if (!classname
|| !fn
)
4043 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4044 __func__
, classname
);
4046 list_for_each_entry(temp_oh
, &omap_hwmod_list
, node
) {
4047 if (!strcmp(temp_oh
->class->name
, classname
)) {
4048 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4049 __func__
, temp_oh
->name
);
4050 ret
= (*fn
)(temp_oh
, user
);
4057 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4064 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4065 * @oh: struct omap_hwmod *
4066 * @state: state that _setup() should leave the hwmod in
4068 * Sets the hwmod state that @oh will enter at the end of _setup()
4069 * (called by omap_hwmod_setup_*()). See also the documentation
4070 * for _setup_postsetup(), above. Returns 0 upon success or
4071 * -EINVAL if there is a problem with the arguments or if the hwmod is
4072 * in the wrong state.
4074 int omap_hwmod_set_postsetup_state(struct omap_hwmod
*oh
, u8 state
)
4077 unsigned long flags
;
4082 if (state
!= _HWMOD_STATE_DISABLED
&&
4083 state
!= _HWMOD_STATE_ENABLED
&&
4084 state
!= _HWMOD_STATE_IDLE
)
4087 spin_lock_irqsave(&oh
->_lock
, flags
);
4089 if (oh
->_state
!= _HWMOD_STATE_REGISTERED
) {
4094 oh
->_postsetup_state
= state
;
4098 spin_unlock_irqrestore(&oh
->_lock
, flags
);
4104 * omap_hwmod_get_context_loss_count - get lost context count
4105 * @oh: struct omap_hwmod *
4107 * Returns the context loss count of associated @oh
4108 * upon success, or zero if no context loss data is available.
4110 * On OMAP4, this queries the per-hwmod context loss register,
4111 * assuming one exists. If not, or on OMAP2/3, this queries the
4112 * enclosing powerdomain context loss count.
4114 int omap_hwmod_get_context_loss_count(struct omap_hwmod
*oh
)
4116 struct powerdomain
*pwrdm
;
4119 if (soc_ops
.get_context_lost
)
4120 return soc_ops
.get_context_lost(oh
);
4122 pwrdm
= omap_hwmod_get_pwrdm(oh
);
4124 ret
= pwrdm_get_context_loss_count(pwrdm
);
4130 * omap_hwmod_init - initialize the hwmod code
4132 * Sets up some function pointers needed by the hwmod code to operate on the
4133 * currently-booted SoC. Intended to be called once during kernel init
4134 * before any hwmods are registered. No return value.
4136 void __init
omap_hwmod_init(void)
4138 if (cpu_is_omap24xx()) {
4139 soc_ops
.wait_target_ready
= _omap2xxx_3xxx_wait_target_ready
;
4140 soc_ops
.assert_hardreset
= _omap2_assert_hardreset
;
4141 soc_ops
.deassert_hardreset
= _omap2_deassert_hardreset
;
4142 soc_ops
.is_hardreset_asserted
= _omap2_is_hardreset_asserted
;
4143 } else if (cpu_is_omap34xx()) {
4144 soc_ops
.wait_target_ready
= _omap2xxx_3xxx_wait_target_ready
;
4145 soc_ops
.assert_hardreset
= _omap2_assert_hardreset
;
4146 soc_ops
.deassert_hardreset
= _omap2_deassert_hardreset
;
4147 soc_ops
.is_hardreset_asserted
= _omap2_is_hardreset_asserted
;
4148 soc_ops
.init_clkdm
= _init_clkdm
;
4149 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4150 soc_ops
.enable_module
= _omap4_enable_module
;
4151 soc_ops
.disable_module
= _omap4_disable_module
;
4152 soc_ops
.wait_target_ready
= _omap4_wait_target_ready
;
4153 soc_ops
.assert_hardreset
= _omap4_assert_hardreset
;
4154 soc_ops
.deassert_hardreset
= _omap4_deassert_hardreset
;
4155 soc_ops
.is_hardreset_asserted
= _omap4_is_hardreset_asserted
;
4156 soc_ops
.init_clkdm
= _init_clkdm
;
4157 soc_ops
.update_context_lost
= _omap4_update_context_lost
;
4158 soc_ops
.get_context_lost
= _omap4_get_context_lost
;
4159 soc_ops
.disable_direct_prcm
= _omap4_disable_direct_prcm
;
4160 soc_ops
.xlate_clkctrl
= _omap4_xlate_clkctrl
;
4161 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4163 soc_ops
.enable_module
= _omap4_enable_module
;
4164 soc_ops
.disable_module
= _omap4_disable_module
;
4165 soc_ops
.wait_target_ready
= _omap4_wait_target_ready
;
4166 soc_ops
.assert_hardreset
= _omap4_assert_hardreset
;
4167 soc_ops
.deassert_hardreset
= _am33xx_deassert_hardreset
;
4168 soc_ops
.is_hardreset_asserted
= _omap4_is_hardreset_asserted
;
4169 soc_ops
.init_clkdm
= _init_clkdm
;
4170 soc_ops
.disable_direct_prcm
= _omap4_disable_direct_prcm
;
4171 soc_ops
.xlate_clkctrl
= _omap4_xlate_clkctrl
;
4173 WARN(1, "omap_hwmod: unknown SoC type\n");
4176 _init_clkctrl_providers();
4182 * omap_hwmod_get_main_clk - get pointer to main clock name
4183 * @oh: struct omap_hwmod *
4185 * Returns the main clock name assocated with @oh upon success,
4186 * or NULL if @oh is NULL.
4188 const char *omap_hwmod_get_main_clk(struct omap_hwmod
*oh
)
4193 return oh
->main_clk
;