2 * OMAP2+ common Power & Reset Management (PRM) IP block functions
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Tero Kristo <t-kristo@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 * For historical purposes, the API used to configure the PRM
13 * interrupt handler refers to it as the "PRCM interrupt." The
14 * underlying registers are located in the PRM on OMAP3/4.
16 * XXX This code should eventually be moved to a PRM driver.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <linux/interrupt.h>
25 #include <linux/slab.h>
27 #include <linux/of_address.h>
28 #include <linux/clk-provider.h>
29 #include <linux/clk/ti.h>
32 #include "prm2xxx_3xxx.h"
46 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
47 * XXX this is technically not needed, since
48 * omap_prcm_register_chain_handler() could allocate this based on the
49 * actual amount of memory needed for the SoC
51 #define OMAP_PRCM_MAX_NR_PENDING_REG 2
54 * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
55 * by the PRCM interrupt handler code. There will be one 'chip' per
56 * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
57 * one "chip" and OMAP4 will have two.)
59 static struct irq_chip_generic
**prcm_irq_chips
;
62 * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
63 * is currently running on. Defined and passed by initialization code
64 * that calls omap_prcm_register_chain_handler().
66 static struct omap_prcm_irq_setup
*prcm_irq_setup
;
68 /* prm_base: base virtual address of the PRM IP block */
69 void __iomem
*prm_base
;
74 * prm_ll_data: function pointers to SoC-specific implementations of
75 * common PRM functions
77 static struct prm_ll_data null_prm_ll_data
;
78 static struct prm_ll_data
*prm_ll_data
= &null_prm_ll_data
;
80 /* Private functions */
83 * Move priority events from events to priority_events array
85 static void omap_prcm_events_filter_priority(unsigned long *events
,
86 unsigned long *priority_events
)
90 for (i
= 0; i
< prcm_irq_setup
->nr_regs
; i
++) {
92 events
[i
] & prcm_irq_setup
->priority_mask
[i
];
93 events
[i
] ^= priority_events
[i
];
98 * PRCM Interrupt Handler
100 * This is a common handler for the OMAP PRCM interrupts. Pending
101 * interrupts are detected by a call to prcm_pending_events and
102 * dispatched accordingly. Clearing of the wakeup events should be
103 * done by the SoC specific individual handlers.
105 static void omap_prcm_irq_handler(struct irq_desc
*desc
)
107 unsigned long pending
[OMAP_PRCM_MAX_NR_PENDING_REG
];
108 unsigned long priority_pending
[OMAP_PRCM_MAX_NR_PENDING_REG
];
109 struct irq_chip
*chip
= irq_desc_get_chip(desc
);
110 unsigned int virtirq
;
111 int nr_irq
= prcm_irq_setup
->nr_regs
* 32;
114 * If we are suspended, mask all interrupts from PRCM level,
115 * this does not ack them, and they will be pending until we
116 * re-enable the interrupts, at which point the
117 * omap_prcm_irq_handler will be executed again. The
118 * _save_and_clear_irqen() function must ensure that the PRM
119 * write to disable all IRQs has reached the PRM before
120 * returning, or spurious PRCM interrupts may occur during
123 if (prcm_irq_setup
->suspended
) {
124 prcm_irq_setup
->save_and_clear_irqen(prcm_irq_setup
->saved_mask
);
125 prcm_irq_setup
->suspend_save_flag
= true;
129 * Loop until all pending irqs are handled, since
130 * generic_handle_irq() can cause new irqs to come
132 while (!prcm_irq_setup
->suspended
) {
133 prcm_irq_setup
->read_pending_irqs(pending
);
135 /* No bit set, then all IRQs are handled */
136 if (find_first_bit(pending
, nr_irq
) >= nr_irq
)
139 omap_prcm_events_filter_priority(pending
, priority_pending
);
142 * Loop on all currently pending irqs so that new irqs
143 * cannot starve previously pending irqs
146 /* Serve priority events first */
147 for_each_set_bit(virtirq
, priority_pending
, nr_irq
)
148 generic_handle_irq(prcm_irq_setup
->base_irq
+ virtirq
);
150 /* Serve normal events next */
151 for_each_set_bit(virtirq
, pending
, nr_irq
)
152 generic_handle_irq(prcm_irq_setup
->base_irq
+ virtirq
);
155 chip
->irq_ack(&desc
->irq_data
);
157 chip
->irq_eoi(&desc
->irq_data
);
158 chip
->irq_unmask(&desc
->irq_data
);
160 prcm_irq_setup
->ocp_barrier(); /* avoid spurious IRQs */
163 /* Public functions */
166 * omap_prcm_event_to_irq - given a PRCM event name, returns the
167 * corresponding IRQ on which the handler should be registered
168 * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
170 * Returns the Linux internal IRQ ID corresponding to @name upon success,
171 * or -ENOENT upon failure.
173 int omap_prcm_event_to_irq(const char *name
)
177 if (!prcm_irq_setup
|| !name
)
180 for (i
= 0; i
< prcm_irq_setup
->nr_irqs
; i
++)
181 if (!strcmp(prcm_irq_setup
->irqs
[i
].name
, name
))
182 return prcm_irq_setup
->base_irq
+
183 prcm_irq_setup
->irqs
[i
].offset
;
189 * omap_prcm_irq_cleanup - reverses memory allocated and other steps
190 * done by omap_prcm_register_chain_handler()
194 void omap_prcm_irq_cleanup(void)
199 if (!prcm_irq_setup
) {
200 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
204 if (prcm_irq_chips
) {
205 for (i
= 0; i
< prcm_irq_setup
->nr_regs
; i
++) {
206 if (prcm_irq_chips
[i
])
207 irq_remove_generic_chip(prcm_irq_chips
[i
],
209 prcm_irq_chips
[i
] = NULL
;
211 kfree(prcm_irq_chips
);
212 prcm_irq_chips
= NULL
;
215 kfree(prcm_irq_setup
->saved_mask
);
216 prcm_irq_setup
->saved_mask
= NULL
;
218 kfree(prcm_irq_setup
->priority_mask
);
219 prcm_irq_setup
->priority_mask
= NULL
;
221 if (prcm_irq_setup
->xlate_irq
)
222 irq
= prcm_irq_setup
->xlate_irq(prcm_irq_setup
->irq
);
224 irq
= prcm_irq_setup
->irq
;
225 irq_set_chained_handler(irq
, NULL
);
227 if (prcm_irq_setup
->base_irq
> 0)
228 irq_free_descs(prcm_irq_setup
->base_irq
,
229 prcm_irq_setup
->nr_regs
* 32);
230 prcm_irq_setup
->base_irq
= 0;
233 void omap_prcm_irq_prepare(void)
235 prcm_irq_setup
->suspended
= true;
238 void omap_prcm_irq_complete(void)
240 prcm_irq_setup
->suspended
= false;
242 /* If we have not saved the masks, do not attempt to restore */
243 if (!prcm_irq_setup
->suspend_save_flag
)
246 prcm_irq_setup
->suspend_save_flag
= false;
249 * Re-enable all masked PRCM irq sources, this causes the PRCM
250 * interrupt to fire immediately if the events were masked
251 * previously in the chain handler
253 prcm_irq_setup
->restore_irqen(prcm_irq_setup
->saved_mask
);
257 * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
258 * handler based on provided parameters
259 * @irq_setup: hardware data about the underlying PRM/PRCM
261 * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
262 * one generic IRQ chip per PRM interrupt status/enable register pair.
263 * Returns 0 upon success, -EINVAL if called twice or if invalid
264 * arguments are passed, or -ENOMEM on any other error.
266 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup
*irq_setup
)
269 u32 mask
[OMAP_PRCM_MAX_NR_PENDING_REG
];
271 struct irq_chip_generic
*gc
;
272 struct irq_chip_type
*ct
;
278 nr_regs
= irq_setup
->nr_regs
;
280 if (prcm_irq_setup
) {
281 pr_err("PRCM: already initialized; won't reinitialize\n");
285 if (nr_regs
> OMAP_PRCM_MAX_NR_PENDING_REG
) {
286 pr_err("PRCM: nr_regs too large\n");
290 prcm_irq_setup
= irq_setup
;
292 prcm_irq_chips
= kzalloc(sizeof(void *) * nr_regs
, GFP_KERNEL
);
293 prcm_irq_setup
->saved_mask
= kzalloc(sizeof(u32
) * nr_regs
, GFP_KERNEL
);
294 prcm_irq_setup
->priority_mask
= kzalloc(sizeof(u32
) * nr_regs
,
297 if (!prcm_irq_chips
|| !prcm_irq_setup
->saved_mask
||
298 !prcm_irq_setup
->priority_mask
)
301 memset(mask
, 0, sizeof(mask
));
303 for (i
= 0; i
< irq_setup
->nr_irqs
; i
++) {
304 offset
= irq_setup
->irqs
[i
].offset
;
305 mask
[offset
>> 5] |= 1 << (offset
& 0x1f);
306 if (irq_setup
->irqs
[i
].priority
)
307 irq_setup
->priority_mask
[offset
>> 5] |=
308 1 << (offset
& 0x1f);
311 if (irq_setup
->xlate_irq
)
312 irq
= irq_setup
->xlate_irq(irq_setup
->irq
);
314 irq
= irq_setup
->irq
;
315 irq_set_chained_handler(irq
, omap_prcm_irq_handler
);
317 irq_setup
->base_irq
= irq_alloc_descs(-1, 0, irq_setup
->nr_regs
* 32,
320 if (irq_setup
->base_irq
< 0) {
321 pr_err("PRCM: failed to allocate irq descs: %d\n",
322 irq_setup
->base_irq
);
326 for (i
= 0; i
< irq_setup
->nr_regs
; i
++) {
327 gc
= irq_alloc_generic_chip("PRCM", 1,
328 irq_setup
->base_irq
+ i
* 32, prm_base
,
332 pr_err("PRCM: failed to allocate generic chip\n");
336 ct
->chip
.irq_ack
= irq_gc_ack_set_bit
;
337 ct
->chip
.irq_mask
= irq_gc_mask_clr_bit
;
338 ct
->chip
.irq_unmask
= irq_gc_mask_set_bit
;
340 ct
->regs
.ack
= irq_setup
->ack
+ i
* 4;
341 ct
->regs
.mask
= irq_setup
->mask
+ i
* 4;
343 irq_setup_generic_chip(gc
, mask
[i
], 0, IRQ_NOREQUEST
, 0);
344 prcm_irq_chips
[i
] = gc
;
347 if (of_have_populated_dt()) {
348 int irq
= omap_prcm_event_to_irq("io");
349 omap_pcs_legacy_init(irq
, irq_setup
->reconfigure_io_chain
);
355 omap_prcm_irq_cleanup();
360 * omap2_set_globals_prm - set the PRM base address (for early use)
361 * @prm: PRM base virtual address
363 * XXX Will be replaced when the PRM/CM drivers are completed.
365 void __init
omap2_set_globals_prm(void __iomem
*prm
)
371 * prm_read_reset_sources - return the sources of the SoC's last reset
373 * Return a u32 bitmask representing the reset sources that caused the
374 * SoC to reset. The low-level per-SoC functions called by this
375 * function remap the SoC-specific reset source bits into an
376 * OMAP-common set of reset source bits, defined in
377 * arch/arm/mach-omap2/prm.h. Returns the standardized reset source
378 * u32 bitmask from the hardware upon success, or returns (1 <<
379 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
380 * function was registered.
382 u32
prm_read_reset_sources(void)
384 u32 ret
= 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT
;
386 if (prm_ll_data
->read_reset_sources
)
387 ret
= prm_ll_data
->read_reset_sources();
389 WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__
);
395 * prm_was_any_context_lost_old - was device context lost? (old API)
396 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
397 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
398 * @idx: CONTEXT register offset
400 * Return 1 if any bits were set in the *_CONTEXT_* register
401 * identified by (@part, @inst, @idx), which means that some context
402 * was lost for that module; otherwise, return 0. XXX Deprecated;
403 * callers need to use a less-SoC-dependent way to identify hardware
406 bool prm_was_any_context_lost_old(u8 part
, s16 inst
, u16 idx
)
410 if (prm_ll_data
->was_any_context_lost_old
)
411 ret
= prm_ll_data
->was_any_context_lost_old(part
, inst
, idx
);
413 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
420 * prm_clear_context_lost_flags_old - clear context loss flags (old API)
421 * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
422 * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
423 * @idx: CONTEXT register offset
425 * Clear hardware context loss bits for the module identified by
426 * (@part, @inst, @idx). No return value. XXX Deprecated; callers
427 * need to use a less-SoC-dependent way to identify hardware IP
430 void prm_clear_context_loss_flags_old(u8 part
, s16 inst
, u16 idx
)
432 if (prm_ll_data
->clear_context_loss_flags_old
)
433 prm_ll_data
->clear_context_loss_flags_old(part
, inst
, idx
);
435 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
440 * omap_prm_assert_hardreset - assert hardreset for an IP block
441 * @shift: register bit shift corresponding to the reset line
442 * @part: PRM partition
443 * @prm_mod: PRM submodule base or instance offset
444 * @offset: register offset
446 * Asserts a hardware reset line for an IP block.
448 int omap_prm_assert_hardreset(u8 shift
, u8 part
, s16 prm_mod
, u16 offset
)
450 if (!prm_ll_data
->assert_hardreset
) {
451 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
456 return prm_ll_data
->assert_hardreset(shift
, part
, prm_mod
, offset
);
460 * omap_prm_deassert_hardreset - deassert hardreset for an IP block
461 * @shift: register bit shift corresponding to the reset line
462 * @st_shift: reset status bit shift corresponding to the reset line
463 * @part: PRM partition
464 * @prm_mod: PRM submodule base or instance offset
465 * @offset: register offset
466 * @st_offset: status register offset
468 * Deasserts a hardware reset line for an IP block.
470 int omap_prm_deassert_hardreset(u8 shift
, u8 st_shift
, u8 part
, s16 prm_mod
,
471 u16 offset
, u16 st_offset
)
473 if (!prm_ll_data
->deassert_hardreset
) {
474 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
479 return prm_ll_data
->deassert_hardreset(shift
, st_shift
, part
, prm_mod
,
484 * omap_prm_is_hardreset_asserted - check the hardreset status for an IP block
485 * @shift: register bit shift corresponding to the reset line
486 * @part: PRM partition
487 * @prm_mod: PRM submodule base or instance offset
488 * @offset: register offset
490 * Checks if a hardware reset line for an IP block is enabled or not.
492 int omap_prm_is_hardreset_asserted(u8 shift
, u8 part
, s16 prm_mod
, u16 offset
)
494 if (!prm_ll_data
->is_hardreset_asserted
) {
495 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
500 return prm_ll_data
->is_hardreset_asserted(shift
, part
, prm_mod
, offset
);
504 * omap_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
506 * Clear any previously-latched I/O wakeup events and ensure that the
507 * I/O wakeup gates are aligned with the current mux settings.
508 * Calls SoC specific I/O chain reconfigure function if available,
509 * otherwise does nothing.
511 void omap_prm_reconfigure_io_chain(void)
513 if (!prcm_irq_setup
|| !prcm_irq_setup
->reconfigure_io_chain
)
516 prcm_irq_setup
->reconfigure_io_chain();
520 * omap_prm_reset_system - trigger global SW reset
522 * Triggers SoC specific global warm reset to reboot the device.
524 void omap_prm_reset_system(void)
526 if (!prm_ll_data
->reset_system
) {
527 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
532 prm_ll_data
->reset_system();
539 * omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt
540 * @module: PRM module to clear wakeups from
541 * @regs: register to clear
542 * @wkst_mask: wkst bits to clear
544 * Clears any wakeup events for the module and register set defined.
545 * Uses SoC specific implementation to do the actual wakeup status
548 int omap_prm_clear_mod_irqs(s16 module
, u8 regs
, u32 wkst_mask
)
550 if (!prm_ll_data
->clear_mod_irqs
) {
551 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
556 return prm_ll_data
->clear_mod_irqs(module
, regs
, wkst_mask
);
560 * omap_prm_vp_check_txdone - check voltage processor TX done status
562 * Checks if voltage processor transmission has been completed.
563 * Returns non-zero if a transmission has completed, 0 otherwise.
565 u32
omap_prm_vp_check_txdone(u8 vp_id
)
567 if (!prm_ll_data
->vp_check_txdone
) {
568 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
573 return prm_ll_data
->vp_check_txdone(vp_id
);
577 * omap_prm_vp_clear_txdone - clears voltage processor TX done status
579 * Clears the status bit for completed voltage processor transmission
580 * returned by prm_vp_check_txdone.
582 void omap_prm_vp_clear_txdone(u8 vp_id
)
584 if (!prm_ll_data
->vp_clear_txdone
) {
585 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
590 prm_ll_data
->vp_clear_txdone(vp_id
);
594 * prm_register - register per-SoC low-level data with the PRM
595 * @pld: low-level per-SoC OMAP PRM data & function pointers to register
597 * Register per-SoC low-level OMAP PRM data and function pointers with
598 * the OMAP PRM common interface. The caller must keep the data
599 * pointed to by @pld valid until it calls prm_unregister() and
600 * it returns successfully. Returns 0 upon success, -EINVAL if @pld
601 * is NULL, or -EEXIST if prm_register() has already been called
602 * without an intervening prm_unregister().
604 int prm_register(struct prm_ll_data
*pld
)
609 if (prm_ll_data
!= &null_prm_ll_data
)
618 * prm_unregister - unregister per-SoC low-level data & function pointers
619 * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
621 * Unregister per-SoC low-level OMAP PRM data and function pointers
622 * that were previously registered with prm_register(). The
623 * caller may not destroy any of the data pointed to by @pld until
624 * this function returns successfully. Returns 0 upon success, or
625 * -EINVAL if @pld is NULL or if @pld does not match the struct
626 * prm_ll_data * previously registered by prm_register().
628 int prm_unregister(struct prm_ll_data
*pld
)
630 if (!pld
|| prm_ll_data
!= pld
)
633 prm_ll_data
= &null_prm_ll_data
;
638 #ifdef CONFIG_ARCH_OMAP2
639 static struct omap_prcm_init_data omap2_prm_data __initdata
= {
640 .index
= TI_CLKM_PRM
,
641 .init
= omap2xxx_prm_init
,
645 #ifdef CONFIG_ARCH_OMAP3
646 static struct omap_prcm_init_data omap3_prm_data __initdata
= {
647 .index
= TI_CLKM_PRM
,
648 .init
= omap3xxx_prm_init
,
651 * IVA2 offset is a negative value, must offset the prm_base
652 * address by this to get it to positive
654 .offset
= -OMAP3430_IVA2_MOD
,
658 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
659 static struct omap_prcm_init_data am3_prm_data __initdata
= {
660 .index
= TI_CLKM_PRM
,
661 .init
= am33xx_prm_init
,
665 #ifdef CONFIG_SOC_TI81XX
666 static struct omap_prcm_init_data dm814_pllss_data __initdata
= {
667 .index
= TI_CLKM_PLLSS
,
668 .init
= am33xx_prm_init
,
672 #ifdef CONFIG_ARCH_OMAP4
673 static struct omap_prcm_init_data omap4_prm_data __initdata
= {
674 .index
= TI_CLKM_PRM
,
675 .init
= omap44xx_prm_init
,
676 .device_inst_offset
= OMAP4430_PRM_DEVICE_INST
,
677 .flags
= PRM_HAS_IO_WAKEUP
| PRM_HAS_VOLTAGE
| PRM_IRQ_DEFAULT
,
681 #ifdef CONFIG_SOC_OMAP5
682 static struct omap_prcm_init_data omap5_prm_data __initdata
= {
683 .index
= TI_CLKM_PRM
,
684 .init
= omap44xx_prm_init
,
685 .device_inst_offset
= OMAP54XX_PRM_DEVICE_INST
,
686 .flags
= PRM_HAS_IO_WAKEUP
| PRM_HAS_VOLTAGE
,
690 #ifdef CONFIG_SOC_DRA7XX
691 static struct omap_prcm_init_data dra7_prm_data __initdata
= {
692 .index
= TI_CLKM_PRM
,
693 .init
= omap44xx_prm_init
,
694 .device_inst_offset
= DRA7XX_PRM_DEVICE_INST
,
695 .flags
= PRM_HAS_IO_WAKEUP
,
699 #ifdef CONFIG_SOC_AM43XX
700 static struct omap_prcm_init_data am4_prm_data __initdata
= {
701 .index
= TI_CLKM_PRM
,
702 .init
= omap44xx_prm_init
,
703 .device_inst_offset
= AM43XX_PRM_DEVICE_INST
,
704 .flags
= PRM_HAS_IO_WAKEUP
,
708 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
709 static struct omap_prcm_init_data scrm_data __initdata
= {
710 .index
= TI_CLKM_SCRM
,
714 static const struct of_device_id omap_prcm_dt_match_table
[] __initconst
= {
715 #ifdef CONFIG_SOC_AM33XX
716 { .compatible
= "ti,am3-prcm", .data
= &am3_prm_data
},
718 #ifdef CONFIG_SOC_AM43XX
719 { .compatible
= "ti,am4-prcm", .data
= &am4_prm_data
},
721 #ifdef CONFIG_SOC_TI81XX
722 { .compatible
= "ti,dm814-prcm", .data
= &am3_prm_data
},
723 { .compatible
= "ti,dm814-pllss", .data
= &dm814_pllss_data
},
724 { .compatible
= "ti,dm816-prcm", .data
= &am3_prm_data
},
726 #ifdef CONFIG_ARCH_OMAP2
727 { .compatible
= "ti,omap2-prcm", .data
= &omap2_prm_data
},
729 #ifdef CONFIG_ARCH_OMAP3
730 { .compatible
= "ti,omap3-prm", .data
= &omap3_prm_data
},
732 #ifdef CONFIG_ARCH_OMAP4
733 { .compatible
= "ti,omap4-prm", .data
= &omap4_prm_data
},
734 { .compatible
= "ti,omap4-scrm", .data
= &scrm_data
},
736 #ifdef CONFIG_SOC_OMAP5
737 { .compatible
= "ti,omap5-prm", .data
= &omap5_prm_data
},
738 { .compatible
= "ti,omap5-scrm", .data
= &scrm_data
},
740 #ifdef CONFIG_SOC_DRA7XX
741 { .compatible
= "ti,dra7-prm", .data
= &dra7_prm_data
},
747 * omap2_prm_base_init - initialize iomappings for the PRM driver
749 * Detects and initializes the iomappings for the PRM driver, based
750 * on the DT data. Returns 0 in success, negative error value
753 int __init
omap2_prm_base_init(void)
755 struct device_node
*np
;
756 const struct of_device_id
*match
;
757 struct omap_prcm_init_data
*data
;
760 for_each_matching_node_and_match(np
, omap_prcm_dt_match_table
, &match
) {
761 data
= (struct omap_prcm_init_data
*)match
->data
;
763 mem
= of_iomap(np
, 0);
767 if (data
->index
== TI_CLKM_PRM
)
768 prm_base
= mem
+ data
->offset
;
781 int __init
omap2_prcm_base_init(void)
785 ret
= omap2_prm_base_init();
789 return omap2_cm_base_init();
793 * omap_prcm_init - low level init for the PRCM drivers
795 * Initializes the low level clock infrastructure for PRCM drivers.
796 * Returns 0 in success, negative error value in failure.
798 int __init
omap_prcm_init(void)
800 struct device_node
*np
;
801 const struct of_device_id
*match
;
802 const struct omap_prcm_init_data
*data
;
805 for_each_matching_node_and_match(np
, omap_prcm_dt_match_table
, &match
) {
808 ret
= omap2_clk_provider_init(np
, data
->index
, NULL
, data
->mem
);
818 static int __init
prm_late_init(void)
820 if (prm_ll_data
->late_init
)
821 return prm_ll_data
->late_init();
824 subsys_initcall(prm_late_init
);