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1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6
7 #include <asm/pmu.h>
8 #include <mach/udc.h>
9 #include <mach/pxafb.h>
10 #include <mach/mmc.h>
11 #include <mach/irda.h>
12 #include <mach/ohci.h>
13 #include <mach/pxa27x_keypad.h>
14 #include <mach/pxa2xx_spi.h>
15 #include <mach/camera.h>
16 #include <mach/audio.h>
17 #include <mach/hardware.h>
18 #include <plat/i2c.h>
19 #include <plat/pxa3xx_nand.h>
20
21 #include "devices.h"
22 #include "generic.h"
23
24 void __init pxa_register_device(struct platform_device *dev, void *data)
25 {
26 int ret;
27
28 dev->dev.platform_data = data;
29
30 ret = platform_device_register(dev);
31 if (ret)
32 dev_err(&dev->dev, "unable to register device: %d\n", ret);
33 }
34
35 static struct resource pxa_resource_pmu = {
36 .start = IRQ_PMU,
37 .end = IRQ_PMU,
38 .flags = IORESOURCE_IRQ,
39 };
40
41 struct platform_device pxa_device_pmu = {
42 .name = "arm-pmu",
43 .id = ARM_PMU_DEVICE_CPU,
44 .resource = &pxa_resource_pmu,
45 .num_resources = 1,
46 };
47
48 static struct resource pxamci_resources[] = {
49 [0] = {
50 .start = 0x41100000,
51 .end = 0x41100fff,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_MMC,
56 .end = IRQ_MMC,
57 .flags = IORESOURCE_IRQ,
58 },
59 [2] = {
60 .start = 21,
61 .end = 21,
62 .flags = IORESOURCE_DMA,
63 },
64 [3] = {
65 .start = 22,
66 .end = 22,
67 .flags = IORESOURCE_DMA,
68 },
69 };
70
71 static u64 pxamci_dmamask = 0xffffffffUL;
72
73 struct platform_device pxa_device_mci = {
74 .name = "pxa2xx-mci",
75 .id = 0,
76 .dev = {
77 .dma_mask = &pxamci_dmamask,
78 .coherent_dma_mask = 0xffffffff,
79 },
80 .num_resources = ARRAY_SIZE(pxamci_resources),
81 .resource = pxamci_resources,
82 };
83
84 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
85 {
86 pxa_register_device(&pxa_device_mci, info);
87 }
88
89
90 static struct pxa2xx_udc_mach_info pxa_udc_info = {
91 .gpio_pullup = -1,
92 .gpio_vbus = -1,
93 };
94
95 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96 {
97 memcpy(&pxa_udc_info, info, sizeof *info);
98 }
99
100 static struct resource pxa2xx_udc_resources[] = {
101 [0] = {
102 .start = 0x40600000,
103 .end = 0x4060ffff,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = IRQ_USB,
108 .end = IRQ_USB,
109 .flags = IORESOURCE_IRQ,
110 },
111 };
112
113 static u64 udc_dma_mask = ~(u32)0;
114
115 struct platform_device pxa25x_device_udc = {
116 .name = "pxa25x-udc",
117 .id = -1,
118 .resource = pxa2xx_udc_resources,
119 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
120 .dev = {
121 .platform_data = &pxa_udc_info,
122 .dma_mask = &udc_dma_mask,
123 }
124 };
125
126 struct platform_device pxa27x_device_udc = {
127 .name = "pxa27x-udc",
128 .id = -1,
129 .resource = pxa2xx_udc_resources,
130 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
131 .dev = {
132 .platform_data = &pxa_udc_info,
133 .dma_mask = &udc_dma_mask,
134 }
135 };
136
137 static struct resource pxafb_resources[] = {
138 [0] = {
139 .start = 0x44000000,
140 .end = 0x4400ffff,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = IRQ_LCD,
145 .end = IRQ_LCD,
146 .flags = IORESOURCE_IRQ,
147 },
148 };
149
150 static u64 fb_dma_mask = ~(u64)0;
151
152 struct platform_device pxa_device_fb = {
153 .name = "pxa2xx-fb",
154 .id = -1,
155 .dev = {
156 .dma_mask = &fb_dma_mask,
157 .coherent_dma_mask = 0xffffffff,
158 },
159 .num_resources = ARRAY_SIZE(pxafb_resources),
160 .resource = pxafb_resources,
161 };
162
163 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
164 {
165 pxa_register_device(&pxa_device_fb, info);
166 }
167
168 void __init set_pxa_fb_parent(struct device *parent_dev)
169 {
170 pxa_device_fb.dev.parent = parent_dev;
171 }
172
173 static struct resource pxa_resource_ffuart[] = {
174 {
175 .start = 0x40100000,
176 .end = 0x40100023,
177 .flags = IORESOURCE_MEM,
178 }, {
179 .start = IRQ_FFUART,
180 .end = IRQ_FFUART,
181 .flags = IORESOURCE_IRQ,
182 }
183 };
184
185 struct platform_device pxa_device_ffuart = {
186 .name = "pxa2xx-uart",
187 .id = 0,
188 .resource = pxa_resource_ffuart,
189 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
190 };
191
192 void __init pxa_set_ffuart_info(void *info)
193 {
194 pxa_register_device(&pxa_device_ffuart, info);
195 }
196
197 static struct resource pxa_resource_btuart[] = {
198 {
199 .start = 0x40200000,
200 .end = 0x40200023,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_BTUART,
204 .end = IRQ_BTUART,
205 .flags = IORESOURCE_IRQ,
206 }
207 };
208
209 struct platform_device pxa_device_btuart = {
210 .name = "pxa2xx-uart",
211 .id = 1,
212 .resource = pxa_resource_btuart,
213 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
214 };
215
216 void __init pxa_set_btuart_info(void *info)
217 {
218 pxa_register_device(&pxa_device_btuart, info);
219 }
220
221 static struct resource pxa_resource_stuart[] = {
222 {
223 .start = 0x40700000,
224 .end = 0x40700023,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = IRQ_STUART,
228 .end = IRQ_STUART,
229 .flags = IORESOURCE_IRQ,
230 }
231 };
232
233 struct platform_device pxa_device_stuart = {
234 .name = "pxa2xx-uart",
235 .id = 2,
236 .resource = pxa_resource_stuart,
237 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
238 };
239
240 void __init pxa_set_stuart_info(void *info)
241 {
242 pxa_register_device(&pxa_device_stuart, info);
243 }
244
245 static struct resource pxa_resource_hwuart[] = {
246 {
247 .start = 0x41600000,
248 .end = 0x4160002F,
249 .flags = IORESOURCE_MEM,
250 }, {
251 .start = IRQ_HWUART,
252 .end = IRQ_HWUART,
253 .flags = IORESOURCE_IRQ,
254 }
255 };
256
257 struct platform_device pxa_device_hwuart = {
258 .name = "pxa2xx-uart",
259 .id = 3,
260 .resource = pxa_resource_hwuart,
261 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
262 };
263
264 void __init pxa_set_hwuart_info(void *info)
265 {
266 if (cpu_is_pxa255())
267 pxa_register_device(&pxa_device_hwuart, info);
268 else
269 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
270 }
271
272 static struct resource pxai2c_resources[] = {
273 {
274 .start = 0x40301680,
275 .end = 0x403016a3,
276 .flags = IORESOURCE_MEM,
277 }, {
278 .start = IRQ_I2C,
279 .end = IRQ_I2C,
280 .flags = IORESOURCE_IRQ,
281 },
282 };
283
284 struct platform_device pxa_device_i2c = {
285 .name = "pxa2xx-i2c",
286 .id = 0,
287 .resource = pxai2c_resources,
288 .num_resources = ARRAY_SIZE(pxai2c_resources),
289 };
290
291 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
292 {
293 pxa_register_device(&pxa_device_i2c, info);
294 }
295
296 #ifdef CONFIG_PXA27x
297 static struct resource pxa27x_resources_i2c_power[] = {
298 {
299 .start = 0x40f00180,
300 .end = 0x40f001a3,
301 .flags = IORESOURCE_MEM,
302 }, {
303 .start = IRQ_PWRI2C,
304 .end = IRQ_PWRI2C,
305 .flags = IORESOURCE_IRQ,
306 },
307 };
308
309 struct platform_device pxa27x_device_i2c_power = {
310 .name = "pxa2xx-i2c",
311 .id = 1,
312 .resource = pxa27x_resources_i2c_power,
313 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
314 };
315 #endif
316
317 #ifdef CONFIG_PXA3xx
318 static struct resource pxa3xx_resources_i2c_power[] = {
319 {
320 .start = 0x40f500c0,
321 .end = 0x40f500d3,
322 .flags = IORESOURCE_MEM,
323 }, {
324 .start = IRQ_PWRI2C,
325 .end = IRQ_PWRI2C,
326 .flags = IORESOURCE_IRQ,
327 },
328 };
329
330 struct platform_device pxa3xx_device_i2c_power = {
331 .name = "pxa3xx-pwri2c",
332 .id = 1,
333 .resource = pxa3xx_resources_i2c_power,
334 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
335 };
336 #endif
337
338 static struct resource pxai2s_resources[] = {
339 {
340 .start = 0x40400000,
341 .end = 0x40400083,
342 .flags = IORESOURCE_MEM,
343 }, {
344 .start = IRQ_I2S,
345 .end = IRQ_I2S,
346 .flags = IORESOURCE_IRQ,
347 },
348 };
349
350 struct platform_device pxa_device_i2s = {
351 .name = "pxa2xx-i2s",
352 .id = -1,
353 .resource = pxai2s_resources,
354 .num_resources = ARRAY_SIZE(pxai2s_resources),
355 };
356
357 struct platform_device pxa_device_asoc_ssp1 = {
358 .name = "pxa-ssp-dai",
359 .id = 0,
360 };
361
362 struct platform_device pxa_device_asoc_ssp2= {
363 .name = "pxa-ssp-dai",
364 .id = 1,
365 };
366
367 struct platform_device pxa_device_asoc_ssp3 = {
368 .name = "pxa-ssp-dai",
369 .id = 2,
370 };
371
372 struct platform_device pxa_device_asoc_ssp4 = {
373 .name = "pxa-ssp-dai",
374 .id = 3,
375 };
376
377 struct platform_device pxa_device_asoc_platform = {
378 .name = "pxa-pcm-audio",
379 .id = -1,
380 };
381
382 static u64 pxaficp_dmamask = ~(u32)0;
383
384 struct platform_device pxa_device_ficp = {
385 .name = "pxa2xx-ir",
386 .id = -1,
387 .dev = {
388 .dma_mask = &pxaficp_dmamask,
389 .coherent_dma_mask = 0xffffffff,
390 },
391 };
392
393 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
394 {
395 pxa_register_device(&pxa_device_ficp, info);
396 }
397
398 static struct resource pxa_rtc_resources[] = {
399 [0] = {
400 .start = 0x40900000,
401 .end = 0x40900000 + 0x3b,
402 .flags = IORESOURCE_MEM,
403 },
404 [1] = {
405 .start = IRQ_RTC1Hz,
406 .end = IRQ_RTC1Hz,
407 .flags = IORESOURCE_IRQ,
408 },
409 [2] = {
410 .start = IRQ_RTCAlrm,
411 .end = IRQ_RTCAlrm,
412 .flags = IORESOURCE_IRQ,
413 },
414 };
415
416 struct platform_device sa1100_device_rtc = {
417 .name = "sa1100-rtc",
418 .id = -1,
419 };
420
421 struct platform_device pxa_device_rtc = {
422 .name = "pxa-rtc",
423 .id = -1,
424 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
425 .resource = pxa_rtc_resources,
426 };
427
428 static struct resource pxa_ac97_resources[] = {
429 [0] = {
430 .start = 0x40500000,
431 .end = 0x40500000 + 0xfff,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = IRQ_AC97,
436 .end = IRQ_AC97,
437 .flags = IORESOURCE_IRQ,
438 },
439 };
440
441 static u64 pxa_ac97_dmamask = 0xffffffffUL;
442
443 struct platform_device pxa_device_ac97 = {
444 .name = "pxa2xx-ac97",
445 .id = -1,
446 .dev = {
447 .dma_mask = &pxa_ac97_dmamask,
448 .coherent_dma_mask = 0xffffffff,
449 },
450 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
451 .resource = pxa_ac97_resources,
452 };
453
454 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
455 {
456 pxa_register_device(&pxa_device_ac97, ops);
457 }
458
459 #ifdef CONFIG_PXA25x
460
461 static struct resource pxa25x_resource_pwm0[] = {
462 [0] = {
463 .start = 0x40b00000,
464 .end = 0x40b0000f,
465 .flags = IORESOURCE_MEM,
466 },
467 };
468
469 struct platform_device pxa25x_device_pwm0 = {
470 .name = "pxa25x-pwm",
471 .id = 0,
472 .resource = pxa25x_resource_pwm0,
473 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
474 };
475
476 static struct resource pxa25x_resource_pwm1[] = {
477 [0] = {
478 .start = 0x40c00000,
479 .end = 0x40c0000f,
480 .flags = IORESOURCE_MEM,
481 },
482 };
483
484 struct platform_device pxa25x_device_pwm1 = {
485 .name = "pxa25x-pwm",
486 .id = 1,
487 .resource = pxa25x_resource_pwm1,
488 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
489 };
490
491 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
492
493 static struct resource pxa25x_resource_ssp[] = {
494 [0] = {
495 .start = 0x41000000,
496 .end = 0x4100001f,
497 .flags = IORESOURCE_MEM,
498 },
499 [1] = {
500 .start = IRQ_SSP,
501 .end = IRQ_SSP,
502 .flags = IORESOURCE_IRQ,
503 },
504 [2] = {
505 /* DRCMR for RX */
506 .start = 13,
507 .end = 13,
508 .flags = IORESOURCE_DMA,
509 },
510 [3] = {
511 /* DRCMR for TX */
512 .start = 14,
513 .end = 14,
514 .flags = IORESOURCE_DMA,
515 },
516 };
517
518 struct platform_device pxa25x_device_ssp = {
519 .name = "pxa25x-ssp",
520 .id = 0,
521 .dev = {
522 .dma_mask = &pxa25x_ssp_dma_mask,
523 .coherent_dma_mask = DMA_BIT_MASK(32),
524 },
525 .resource = pxa25x_resource_ssp,
526 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
527 };
528
529 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
530
531 static struct resource pxa25x_resource_nssp[] = {
532 [0] = {
533 .start = 0x41400000,
534 .end = 0x4140002f,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .start = IRQ_NSSP,
539 .end = IRQ_NSSP,
540 .flags = IORESOURCE_IRQ,
541 },
542 [2] = {
543 /* DRCMR for RX */
544 .start = 15,
545 .end = 15,
546 .flags = IORESOURCE_DMA,
547 },
548 [3] = {
549 /* DRCMR for TX */
550 .start = 16,
551 .end = 16,
552 .flags = IORESOURCE_DMA,
553 },
554 };
555
556 struct platform_device pxa25x_device_nssp = {
557 .name = "pxa25x-nssp",
558 .id = 1,
559 .dev = {
560 .dma_mask = &pxa25x_nssp_dma_mask,
561 .coherent_dma_mask = DMA_BIT_MASK(32),
562 },
563 .resource = pxa25x_resource_nssp,
564 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
565 };
566
567 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
568
569 static struct resource pxa25x_resource_assp[] = {
570 [0] = {
571 .start = 0x41500000,
572 .end = 0x4150002f,
573 .flags = IORESOURCE_MEM,
574 },
575 [1] = {
576 .start = IRQ_ASSP,
577 .end = IRQ_ASSP,
578 .flags = IORESOURCE_IRQ,
579 },
580 [2] = {
581 /* DRCMR for RX */
582 .start = 23,
583 .end = 23,
584 .flags = IORESOURCE_DMA,
585 },
586 [3] = {
587 /* DRCMR for TX */
588 .start = 24,
589 .end = 24,
590 .flags = IORESOURCE_DMA,
591 },
592 };
593
594 struct platform_device pxa25x_device_assp = {
595 /* ASSP is basically equivalent to NSSP */
596 .name = "pxa25x-nssp",
597 .id = 2,
598 .dev = {
599 .dma_mask = &pxa25x_assp_dma_mask,
600 .coherent_dma_mask = DMA_BIT_MASK(32),
601 },
602 .resource = pxa25x_resource_assp,
603 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
604 };
605 #endif /* CONFIG_PXA25x */
606
607 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
608
609 static struct resource pxa27x_resource_keypad[] = {
610 [0] = {
611 .start = 0x41500000,
612 .end = 0x4150004c,
613 .flags = IORESOURCE_MEM,
614 },
615 [1] = {
616 .start = IRQ_KEYPAD,
617 .end = IRQ_KEYPAD,
618 .flags = IORESOURCE_IRQ,
619 },
620 };
621
622 struct platform_device pxa27x_device_keypad = {
623 .name = "pxa27x-keypad",
624 .id = -1,
625 .resource = pxa27x_resource_keypad,
626 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
627 };
628
629 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
630 {
631 pxa_register_device(&pxa27x_device_keypad, info);
632 }
633
634 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
635
636 static struct resource pxa27x_resource_ohci[] = {
637 [0] = {
638 .start = 0x4C000000,
639 .end = 0x4C00ff6f,
640 .flags = IORESOURCE_MEM,
641 },
642 [1] = {
643 .start = IRQ_USBH1,
644 .end = IRQ_USBH1,
645 .flags = IORESOURCE_IRQ,
646 },
647 };
648
649 struct platform_device pxa27x_device_ohci = {
650 .name = "pxa27x-ohci",
651 .id = -1,
652 .dev = {
653 .dma_mask = &pxa27x_ohci_dma_mask,
654 .coherent_dma_mask = DMA_BIT_MASK(32),
655 },
656 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
657 .resource = pxa27x_resource_ohci,
658 };
659
660 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
661 {
662 pxa_register_device(&pxa27x_device_ohci, info);
663 }
664
665 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
666
667 static struct resource pxa27x_resource_ssp1[] = {
668 [0] = {
669 .start = 0x41000000,
670 .end = 0x4100003f,
671 .flags = IORESOURCE_MEM,
672 },
673 [1] = {
674 .start = IRQ_SSP,
675 .end = IRQ_SSP,
676 .flags = IORESOURCE_IRQ,
677 },
678 [2] = {
679 /* DRCMR for RX */
680 .start = 13,
681 .end = 13,
682 .flags = IORESOURCE_DMA,
683 },
684 [3] = {
685 /* DRCMR for TX */
686 .start = 14,
687 .end = 14,
688 .flags = IORESOURCE_DMA,
689 },
690 };
691
692 struct platform_device pxa27x_device_ssp1 = {
693 .name = "pxa27x-ssp",
694 .id = 0,
695 .dev = {
696 .dma_mask = &pxa27x_ssp1_dma_mask,
697 .coherent_dma_mask = DMA_BIT_MASK(32),
698 },
699 .resource = pxa27x_resource_ssp1,
700 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
701 };
702
703 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
704
705 static struct resource pxa27x_resource_ssp2[] = {
706 [0] = {
707 .start = 0x41700000,
708 .end = 0x4170003f,
709 .flags = IORESOURCE_MEM,
710 },
711 [1] = {
712 .start = IRQ_SSP2,
713 .end = IRQ_SSP2,
714 .flags = IORESOURCE_IRQ,
715 },
716 [2] = {
717 /* DRCMR for RX */
718 .start = 15,
719 .end = 15,
720 .flags = IORESOURCE_DMA,
721 },
722 [3] = {
723 /* DRCMR for TX */
724 .start = 16,
725 .end = 16,
726 .flags = IORESOURCE_DMA,
727 },
728 };
729
730 struct platform_device pxa27x_device_ssp2 = {
731 .name = "pxa27x-ssp",
732 .id = 1,
733 .dev = {
734 .dma_mask = &pxa27x_ssp2_dma_mask,
735 .coherent_dma_mask = DMA_BIT_MASK(32),
736 },
737 .resource = pxa27x_resource_ssp2,
738 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
739 };
740
741 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
742
743 static struct resource pxa27x_resource_ssp3[] = {
744 [0] = {
745 .start = 0x41900000,
746 .end = 0x4190003f,
747 .flags = IORESOURCE_MEM,
748 },
749 [1] = {
750 .start = IRQ_SSP3,
751 .end = IRQ_SSP3,
752 .flags = IORESOURCE_IRQ,
753 },
754 [2] = {
755 /* DRCMR for RX */
756 .start = 66,
757 .end = 66,
758 .flags = IORESOURCE_DMA,
759 },
760 [3] = {
761 /* DRCMR for TX */
762 .start = 67,
763 .end = 67,
764 .flags = IORESOURCE_DMA,
765 },
766 };
767
768 struct platform_device pxa27x_device_ssp3 = {
769 .name = "pxa27x-ssp",
770 .id = 2,
771 .dev = {
772 .dma_mask = &pxa27x_ssp3_dma_mask,
773 .coherent_dma_mask = DMA_BIT_MASK(32),
774 },
775 .resource = pxa27x_resource_ssp3,
776 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
777 };
778
779 static struct resource pxa27x_resource_pwm0[] = {
780 [0] = {
781 .start = 0x40b00000,
782 .end = 0x40b0001f,
783 .flags = IORESOURCE_MEM,
784 },
785 };
786
787 struct platform_device pxa27x_device_pwm0 = {
788 .name = "pxa27x-pwm",
789 .id = 0,
790 .resource = pxa27x_resource_pwm0,
791 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
792 };
793
794 static struct resource pxa27x_resource_pwm1[] = {
795 [0] = {
796 .start = 0x40c00000,
797 .end = 0x40c0001f,
798 .flags = IORESOURCE_MEM,
799 },
800 };
801
802 struct platform_device pxa27x_device_pwm1 = {
803 .name = "pxa27x-pwm",
804 .id = 1,
805 .resource = pxa27x_resource_pwm1,
806 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
807 };
808
809 static struct resource pxa27x_resource_camera[] = {
810 [0] = {
811 .start = 0x50000000,
812 .end = 0x50000fff,
813 .flags = IORESOURCE_MEM,
814 },
815 [1] = {
816 .start = IRQ_CAMERA,
817 .end = IRQ_CAMERA,
818 .flags = IORESOURCE_IRQ,
819 },
820 };
821
822 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
823
824 static struct platform_device pxa27x_device_camera = {
825 .name = "pxa27x-camera",
826 .id = 0, /* This is used to put cameras on this interface */
827 .dev = {
828 .dma_mask = &pxa27x_dma_mask_camera,
829 .coherent_dma_mask = 0xffffffff,
830 },
831 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
832 .resource = pxa27x_resource_camera,
833 };
834
835 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
836 {
837 pxa_register_device(&pxa27x_device_camera, info);
838 }
839 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
840
841 #ifdef CONFIG_PXA3xx
842 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
843
844 static struct resource pxa3xx_resource_ssp4[] = {
845 [0] = {
846 .start = 0x41a00000,
847 .end = 0x41a0003f,
848 .flags = IORESOURCE_MEM,
849 },
850 [1] = {
851 .start = IRQ_SSP4,
852 .end = IRQ_SSP4,
853 .flags = IORESOURCE_IRQ,
854 },
855 [2] = {
856 /* DRCMR for RX */
857 .start = 2,
858 .end = 2,
859 .flags = IORESOURCE_DMA,
860 },
861 [3] = {
862 /* DRCMR for TX */
863 .start = 3,
864 .end = 3,
865 .flags = IORESOURCE_DMA,
866 },
867 };
868
869 struct platform_device pxa3xx_device_ssp4 = {
870 /* PXA3xx SSP is basically equivalent to PXA27x */
871 .name = "pxa27x-ssp",
872 .id = 3,
873 .dev = {
874 .dma_mask = &pxa3xx_ssp4_dma_mask,
875 .coherent_dma_mask = DMA_BIT_MASK(32),
876 },
877 .resource = pxa3xx_resource_ssp4,
878 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
879 };
880
881 static struct resource pxa3xx_resources_mci2[] = {
882 [0] = {
883 .start = 0x42000000,
884 .end = 0x42000fff,
885 .flags = IORESOURCE_MEM,
886 },
887 [1] = {
888 .start = IRQ_MMC2,
889 .end = IRQ_MMC2,
890 .flags = IORESOURCE_IRQ,
891 },
892 [2] = {
893 .start = 93,
894 .end = 93,
895 .flags = IORESOURCE_DMA,
896 },
897 [3] = {
898 .start = 94,
899 .end = 94,
900 .flags = IORESOURCE_DMA,
901 },
902 };
903
904 struct platform_device pxa3xx_device_mci2 = {
905 .name = "pxa2xx-mci",
906 .id = 1,
907 .dev = {
908 .dma_mask = &pxamci_dmamask,
909 .coherent_dma_mask = 0xffffffff,
910 },
911 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
912 .resource = pxa3xx_resources_mci2,
913 };
914
915 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
916 {
917 pxa_register_device(&pxa3xx_device_mci2, info);
918 }
919
920 static struct resource pxa3xx_resources_mci3[] = {
921 [0] = {
922 .start = 0x42500000,
923 .end = 0x42500fff,
924 .flags = IORESOURCE_MEM,
925 },
926 [1] = {
927 .start = IRQ_MMC3,
928 .end = IRQ_MMC3,
929 .flags = IORESOURCE_IRQ,
930 },
931 [2] = {
932 .start = 100,
933 .end = 100,
934 .flags = IORESOURCE_DMA,
935 },
936 [3] = {
937 .start = 101,
938 .end = 101,
939 .flags = IORESOURCE_DMA,
940 },
941 };
942
943 struct platform_device pxa3xx_device_mci3 = {
944 .name = "pxa2xx-mci",
945 .id = 2,
946 .dev = {
947 .dma_mask = &pxamci_dmamask,
948 .coherent_dma_mask = 0xffffffff,
949 },
950 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
951 .resource = pxa3xx_resources_mci3,
952 };
953
954 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
955 {
956 pxa_register_device(&pxa3xx_device_mci3, info);
957 }
958
959 static struct resource pxa3xx_resources_nand[] = {
960 [0] = {
961 .start = 0x43100000,
962 .end = 0x43100053,
963 .flags = IORESOURCE_MEM,
964 },
965 [1] = {
966 .start = IRQ_NAND,
967 .end = IRQ_NAND,
968 .flags = IORESOURCE_IRQ,
969 },
970 [2] = {
971 /* DRCMR for Data DMA */
972 .start = 97,
973 .end = 97,
974 .flags = IORESOURCE_DMA,
975 },
976 [3] = {
977 /* DRCMR for Command DMA */
978 .start = 99,
979 .end = 99,
980 .flags = IORESOURCE_DMA,
981 },
982 };
983
984 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
985
986 struct platform_device pxa3xx_device_nand = {
987 .name = "pxa3xx-nand",
988 .id = -1,
989 .dev = {
990 .dma_mask = &pxa3xx_nand_dma_mask,
991 .coherent_dma_mask = DMA_BIT_MASK(32),
992 },
993 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
994 .resource = pxa3xx_resources_nand,
995 };
996
997 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
998 {
999 pxa_register_device(&pxa3xx_device_nand, info);
1000 }
1001
1002 static struct resource pxa3xx_resources_gcu[] = {
1003 {
1004 .start = 0x54000000,
1005 .end = 0x54000fff,
1006 .flags = IORESOURCE_MEM,
1007 },
1008 {
1009 .start = IRQ_GCU,
1010 .end = IRQ_GCU,
1011 .flags = IORESOURCE_IRQ,
1012 },
1013 };
1014
1015 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
1016
1017 struct platform_device pxa3xx_device_gcu = {
1018 .name = "pxa3xx-gcu",
1019 .id = -1,
1020 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
1021 .resource = pxa3xx_resources_gcu,
1022 .dev = {
1023 .dma_mask = &pxa3xx_gcu_dmamask,
1024 .coherent_dma_mask = 0xffffffff,
1025 },
1026 };
1027
1028 #endif /* CONFIG_PXA3xx */
1029
1030 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1031 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1032 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1033 {
1034 struct platform_device *pd;
1035
1036 pd = platform_device_alloc("pxa2xx-spi", id);
1037 if (pd == NULL) {
1038 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1039 id);
1040 return;
1041 }
1042
1043 pd->dev.platform_data = info;
1044 platform_device_add(pd);
1045 }