arch/arm/mach-pxa/generic.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/generic.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Jun 15, 2001
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code common to all PXA machines.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  * Since this file should be linked before any other machine specific file,
  15  * the __initcall() here will be executed first.  This serves as default
  16  * initialization stuff for PXA machines which can be overridden later if
  17  * need be.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22
  23 #include <mach/hardware.h>
  24 #include <asm/system.h>
  25 #include <asm/pgtable.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach-types.h>
  28
  29 #include <mach/reset.h>
  30 #include <mach/gpio.h>
  31 #include <mach/pxa2xx-gpio.h>
  32
  33 #include "generic.h"
  34
  35 void clear_reset_status(unsigned int mask)
  36 {
  37         if (cpu_is_pxa2xx())
  38                 pxa2xx_clear_reset_status(mask);
  39
  40         if (cpu_is_pxa3xx())
  41                 pxa3xx_clear_reset_status(mask);
  42 }
  43
  44 unsigned long get_clock_tick_rate(void)
  45 {
  46         unsigned long clock_tick_rate;
  47
  48         if (cpu_is_pxa25x())
  49                 clock_tick_rate = 3686400;
  50         else if (machine_is_mainstone())
  51                 clock_tick_rate = 3249600;
  52         else
  53                 clock_tick_rate = 3250000;
  54
  55         return clock_tick_rate;
  56 }
  57 EXPORT_SYMBOL(get_clock_tick_rate);
  58
  59 /*
  60  * Get the clock frequency as reflected by CCCR and the turbo flag.
  61  * We assume these values have been applied via a fcs.
  62  * If info is not 0 we also display the current settings.
  63  */
  64 unsigned int get_clk_frequency_khz(int info)
  65 {
  66         if (cpu_is_pxa25x())
  67                 return pxa25x_get_clk_frequency_khz(info);
  68         else if (cpu_is_pxa27x())
  69                 return pxa27x_get_clk_frequency_khz(info);
  70         else
  71                 return pxa3xx_get_clk_frequency_khz(info);
  72 }
  73 EXPORT_SYMBOL(get_clk_frequency_khz);
  74
  75 /*
  76  * Return the current memory clock frequency in units of 10kHz
  77  */
  78 unsigned int get_memclk_frequency_10khz(void)
  79 {
  80         if (cpu_is_pxa25x())
  81                 return pxa25x_get_memclk_frequency_10khz();
  82         else if (cpu_is_pxa27x())
  83                 return pxa27x_get_memclk_frequency_10khz();
  84         else
  85                 return pxa3xx_get_memclk_frequency_10khz();
  86 }
  87 EXPORT_SYMBOL(get_memclk_frequency_10khz);
  88
  89 /*
  90  * Intel PXA2xx internal register mapping.
  91  *
  92  * Note 1: not all PXA2xx variants implement all those addresses.
  93  *
  94  * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  95  *         and cache flush area.
  96  */
  97 static struct map_desc standard_io_desc[] __initdata = {
  98         {       /* Devs */
  99                 .virtual        =  0xf2000000,
 100                 .pfn            = __phys_to_pfn(0x40000000),
 101                 .length         = 0x02000000,
 102                 .type           = MT_DEVICE
 103         }, {    /* Mem Ctl */
 104                 .virtual        =  0xf6000000,
 105                 .pfn            = __phys_to_pfn(0x48000000),
 106                 .length         = 0x00200000,
 107                 .type           = MT_DEVICE
 108         }, {    /* Camera */
 109                 .virtual        =  0xfa000000,
 110                 .pfn            = __phys_to_pfn(0x50000000),
 111                 .length         = 0x00100000,
 112                 .type           = MT_DEVICE
 113         }, {    /* IMem ctl */
 114                 .virtual        =  0xfe000000,
 115                 .pfn            = __phys_to_pfn(0x58000000),
 116                 .length         = 0x00100000,
 117                 .type           = MT_DEVICE
 118         }, {    /* UNCACHED_PHYS_0 */
 119                 .virtual        = 0xff000000,
 120                 .pfn            = __phys_to_pfn(0x00000000),
 121                 .length         = 0x00100000,
 122                 .type           = MT_DEVICE
 123         }
 124 };
 125
 126 void __init pxa_map_io(void)
 127 {
 128         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 129         get_clk_frequency_khz(1);
 130 }
 131
 132 /*
 133  * Configure pins for GPIO or other functions
 134  */
 135 int pxa_gpio_mode(int gpio_mode)
 136 {
 137         unsigned long flags;
 138         int gpio = gpio_mode & GPIO_MD_MASK_NR;
 139         int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
 140         int gafr;
 141
 142         if (gpio > pxa_last_gpio)
 143                 return -EINVAL;
 144
 145         local_irq_save(flags);
 146         if (gpio_mode & GPIO_DFLT_LOW)
 147                 GPCR(gpio) = GPIO_bit(gpio);
 148         else if (gpio_mode & GPIO_DFLT_HIGH)
 149                 GPSR(gpio) = GPIO_bit(gpio);
 150         if (gpio_mode & GPIO_MD_MASK_DIR)
 151                 GPDR(gpio) |= GPIO_bit(gpio);
 152         else
 153                 GPDR(gpio) &= ~GPIO_bit(gpio);
 154         gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
 155         GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
 156         local_irq_restore(flags);
 157
 158         return 0;
 159 }
 160 EXPORT_SYMBOL(pxa_gpio_mode);