2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <mach/hardware.h>
34 #include <asm/sizes.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
41 #include <mach/pxa27x.h>
42 #include <mach/gpio.h>
43 #include <mach/lpd270.h>
44 #include <mach/audio.h>
45 #include <mach/pxafb.h>
47 #include <mach/irda.h>
48 #include <mach/ohci.h>
53 static unsigned long lpd270_pin_config
[] __initdata
= {
55 GPIO15_nCS_1
, /* Mainboard Flash */
56 GPIO78_nCS_2
, /* CPLD + Ethernet */
58 /* LCD - 16bpp Active TFT */
79 GPIO16_PWM0_OUT
, /* Backlight */
87 GPIO29_AC97_SDATA_IN_0
,
88 GPIO30_AC97_SDATA_OUT
,
92 GPIO1_GPIO
| WAKEUP_ON_EDGE_BOTH
,
95 static unsigned int lpd270_irq_enabled
;
97 static void lpd270_mask_irq(unsigned int irq
)
99 int lpd270_irq
= irq
- LPD270_IRQ(0);
101 __raw_writew(~(1 << lpd270_irq
), LPD270_INT_STATUS
);
103 lpd270_irq_enabled
&= ~(1 << lpd270_irq
);
104 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
107 static void lpd270_unmask_irq(unsigned int irq
)
109 int lpd270_irq
= irq
- LPD270_IRQ(0);
111 lpd270_irq_enabled
|= 1 << lpd270_irq
;
112 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
115 static struct irq_chip lpd270_irq_chip
= {
117 .ack
= lpd270_mask_irq
,
118 .mask
= lpd270_mask_irq
,
119 .unmask
= lpd270_unmask_irq
,
122 static void lpd270_irq_handler(unsigned int irq
, struct irq_desc
*desc
)
124 unsigned long pending
;
126 pending
= __raw_readw(LPD270_INT_STATUS
) & lpd270_irq_enabled
;
128 desc
->chip
->ack(irq
); /* clear useless edge notification */
129 if (likely(pending
)) {
130 irq
= LPD270_IRQ(0) + __ffs(pending
);
131 generic_handle_irq(irq
);
133 pending
= __raw_readw(LPD270_INT_STATUS
) &
139 static void __init
lpd270_init_irq(void)
145 __raw_writew(0, LPD270_INT_MASK
);
146 __raw_writew(0, LPD270_INT_STATUS
);
148 /* setup extra LogicPD PXA270 irqs */
149 for (irq
= LPD270_IRQ(2); irq
<= LPD270_IRQ(4); irq
++) {
150 set_irq_chip(irq
, &lpd270_irq_chip
);
151 set_irq_handler(irq
, handle_level_irq
);
152 set_irq_flags(irq
, IRQF_VALID
| IRQF_PROBE
);
154 set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler
);
155 set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING
);
160 static int lpd270_irq_resume(struct sys_device
*dev
)
162 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
166 static struct sysdev_class lpd270_irq_sysclass
= {
168 .resume
= lpd270_irq_resume
,
171 static struct sys_device lpd270_irq_device
= {
172 .cls
= &lpd270_irq_sysclass
,
175 static int __init
lpd270_irq_device_init(void)
178 if (machine_is_logicpd_pxa270()) {
179 ret
= sysdev_class_register(&lpd270_irq_sysclass
);
181 ret
= sysdev_register(&lpd270_irq_device
);
186 device_initcall(lpd270_irq_device_init
);
190 static struct resource smc91x_resources
[] = {
192 .start
= LPD270_ETH_PHYS
,
193 .end
= (LPD270_ETH_PHYS
+ 0xfffff),
194 .flags
= IORESOURCE_MEM
,
197 .start
= LPD270_ETHERNET_IRQ
,
198 .end
= LPD270_ETHERNET_IRQ
,
199 .flags
= IORESOURCE_IRQ
,
203 static struct platform_device smc91x_device
= {
206 .num_resources
= ARRAY_SIZE(smc91x_resources
),
207 .resource
= smc91x_resources
,
210 static struct resource lpd270_flash_resources
[] = {
212 .start
= PXA_CS0_PHYS
,
213 .end
= PXA_CS0_PHYS
+ SZ_64M
- 1,
214 .flags
= IORESOURCE_MEM
,
217 .start
= PXA_CS1_PHYS
,
218 .end
= PXA_CS1_PHYS
+ SZ_64M
- 1,
219 .flags
= IORESOURCE_MEM
,
223 static struct mtd_partition lpd270_flash0_partitions
[] = {
225 .name
= "Bootloader",
228 .mask_flags
= MTD_WRITEABLE
/* force read-only */
232 .offset
= 0x00040000,
234 .name
= "Filesystem",
235 .size
= MTDPART_SIZ_FULL
,
240 static struct flash_platform_data lpd270_flash_data
[2] = {
242 .name
= "processor-flash",
243 .map_name
= "cfi_probe",
244 .parts
= lpd270_flash0_partitions
,
245 .nr_parts
= ARRAY_SIZE(lpd270_flash0_partitions
),
247 .name
= "mainboard-flash",
248 .map_name
= "cfi_probe",
254 static struct platform_device lpd270_flash_device
[2] = {
256 .name
= "pxa2xx-flash",
259 .platform_data
= &lpd270_flash_data
[0],
261 .resource
= &lpd270_flash_resources
[0],
264 .name
= "pxa2xx-flash",
267 .platform_data
= &lpd270_flash_data
[1],
269 .resource
= &lpd270_flash_resources
[1],
274 static struct platform_pwm_backlight_data lpd270_backlight_data
= {
278 .pwm_period_ns
= 78770,
281 static struct platform_device lpd270_backlight_device
= {
282 .name
= "pwm-backlight",
284 .parent
= &pxa27x_device_pwm0
.dev
,
285 .platform_data
= &lpd270_backlight_data
,
289 /* 5.7" TFT QVGA (LoLo display number 1) */
290 static struct pxafb_mode_info sharp_lq057q3dc02_mode
= {
297 .right_margin
= 0x0a,
299 .upper_margin
= 0x08,
300 .lower_margin
= 0x14,
301 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
304 static struct pxafb_mach_info sharp_lq057q3dc02
= {
305 .modes
= &sharp_lq057q3dc02_mode
,
307 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
308 LCD_ALTERNATE_MAPPING
,
311 /* 12.1" TFT SVGA (LoLo display number 2) */
312 static struct pxafb_mode_info sharp_lq121s1dg31_mode
= {
319 .right_margin
= 0x05,
321 .upper_margin
= 0x14,
322 .lower_margin
= 0x0a,
323 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
326 static struct pxafb_mach_info sharp_lq121s1dg31
= {
327 .modes
= &sharp_lq121s1dg31_mode
,
329 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
330 LCD_ALTERNATE_MAPPING
,
333 /* 3.6" TFT QVGA (LoLo display number 3) */
334 static struct pxafb_mode_info sharp_lq036q1da01_mode
= {
341 .right_margin
= 0x0a,
343 .upper_margin
= 0x03,
344 .lower_margin
= 0x03,
345 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
348 static struct pxafb_mach_info sharp_lq036q1da01
= {
349 .modes
= &sharp_lq036q1da01_mode
,
351 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
352 LCD_ALTERNATE_MAPPING
,
355 /* 6.4" TFT VGA (LoLo display number 5) */
356 static struct pxafb_mode_info sharp_lq64d343_mode
= {
363 .right_margin
= 0x19,
365 .upper_margin
= 0x22,
366 .lower_margin
= 0x00,
367 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
370 static struct pxafb_mach_info sharp_lq64d343
= {
371 .modes
= &sharp_lq64d343_mode
,
373 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
374 LCD_ALTERNATE_MAPPING
,
377 /* 10.4" TFT VGA (LoLo display number 7) */
378 static struct pxafb_mode_info sharp_lq10d368_mode
= {
385 .right_margin
= 0x19,
387 .upper_margin
= 0x22,
388 .lower_margin
= 0x00,
389 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
392 static struct pxafb_mach_info sharp_lq10d368
= {
393 .modes
= &sharp_lq10d368_mode
,
395 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
396 LCD_ALTERNATE_MAPPING
,
399 /* 3.5" TFT QVGA (LoLo display number 8) */
400 static struct pxafb_mode_info sharp_lq035q7db02_20_mode
= {
407 .right_margin
= 0x0a,
409 .upper_margin
= 0x05,
410 .lower_margin
= 0x14,
411 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
414 static struct pxafb_mach_info sharp_lq035q7db02_20
= {
415 .modes
= &sharp_lq035q7db02_20_mode
,
417 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
418 LCD_ALTERNATE_MAPPING
,
421 static struct pxafb_mach_info
*lpd270_lcd_to_use
;
423 static int __init
lpd270_set_lcd(char *str
)
425 if (!strnicmp(str
, "lq057q3dc02", 11)) {
426 lpd270_lcd_to_use
= &sharp_lq057q3dc02
;
427 } else if (!strnicmp(str
, "lq121s1dg31", 11)) {
428 lpd270_lcd_to_use
= &sharp_lq121s1dg31
;
429 } else if (!strnicmp(str
, "lq036q1da01", 11)) {
430 lpd270_lcd_to_use
= &sharp_lq036q1da01
;
431 } else if (!strnicmp(str
, "lq64d343", 8)) {
432 lpd270_lcd_to_use
= &sharp_lq64d343
;
433 } else if (!strnicmp(str
, "lq10d368", 8)) {
434 lpd270_lcd_to_use
= &sharp_lq10d368
;
435 } else if (!strnicmp(str
, "lq035q7db02-20", 14)) {
436 lpd270_lcd_to_use
= &sharp_lq035q7db02_20
;
438 printk(KERN_INFO
"lpd270: unknown lcd panel [%s]\n", str
);
444 __setup("lcd=", lpd270_set_lcd
);
446 static struct platform_device
*platform_devices
[] __initdata
= {
448 &lpd270_backlight_device
,
449 &lpd270_flash_device
[0],
450 &lpd270_flash_device
[1],
453 static struct pxaohci_platform_data lpd270_ohci_platform_data
= {
454 .port_mode
= PMM_PERPORT_MODE
,
455 .flags
= ENABLE_PORT_ALL
| POWER_CONTROL_LOW
| POWER_SENSE_LOW
,
458 static void __init
lpd270_init(void)
460 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config
));
462 pxa_set_ffuart_info(NULL
);
463 pxa_set_btuart_info(NULL
);
464 pxa_set_stuart_info(NULL
);
466 lpd270_flash_data
[0].width
= (BOOT_DEF
& 1) ? 2 : 4;
467 lpd270_flash_data
[1].width
= 4;
470 * System bus arbiter setting:
472 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
474 ARB_CNTRL
= ARB_CORE_PARK
| 0x234;
476 platform_add_devices(platform_devices
, ARRAY_SIZE(platform_devices
));
478 pxa_set_ac97_info(NULL
);
480 if (lpd270_lcd_to_use
!= NULL
)
481 set_pxa_fb_info(lpd270_lcd_to_use
);
483 pxa_set_ohci_info(&lpd270_ohci_platform_data
);
487 static struct map_desc lpd270_io_desc
[] __initdata
= {
489 .virtual = LPD270_CPLD_VIRT
,
490 .pfn
= __phys_to_pfn(LPD270_CPLD_PHYS
),
491 .length
= LPD270_CPLD_SIZE
,
496 static void __init
lpd270_map_io(void)
499 iotable_init(lpd270_io_desc
, ARRAY_SIZE(lpd270_io_desc
));
501 /* for use I SRAM as framebuffer. */
506 MACHINE_START(LOGICPD_PXA270
, "LogicPD PXA270 Card Engine")
507 /* Maintainer: Peter Barada */
508 .boot_params
= 0xa0000100,
509 .map_io
= lpd270_map_io
,
510 .nr_irqs
= LPD270_NR_IRQS
,
511 .init_irq
= lpd270_init_irq
,
513 .init_machine
= lpd270_init
,