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ARM: PXA2xx: MFP: fix bug with MFP_LPM_KEEP_OUTPUT
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1 /*
2 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
3 *
4 * PXA2xx pin mux configuration support
5 *
6 * The GPIOs on PXA2xx can be configured as one of many alternate
7 * functions, this is by concept samilar to the MFP configuration
8 * on PXA3xx, what's more important, the low power pin state and
9 * wakeup detection are also supported by the same framework.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15 #include <linux/gpio.h>
16 #include <linux/gpio-pxa.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/io.h>
21 #include <linux/syscore_ops.h>
22
23 #include <mach/pxa2xx-regs.h>
24 #include <mach/mfp-pxa2xx.h>
25
26 #include "generic.h"
27
28 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
29 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
30 #define GAFR_L(x) __GAFR(0, x)
31 #define GAFR_U(x) __GAFR(1, x)
32
33 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
35 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
36
37 #define PWER_WE35 (1 << 24)
38
39 struct gpio_desc {
40 unsigned valid : 1;
41 unsigned can_wakeup : 1;
42 unsigned keypad_gpio : 1;
43 unsigned dir_inverted : 1;
44 unsigned int mask; /* bit mask in PWER or PKWR */
45 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
46 unsigned long config;
47 };
48
49 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
50
51 static unsigned long gpdr_lpm[4];
52
53 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
54 {
55 unsigned long gafr, mask = GPIO_bit(gpio);
56 int bank = gpio_to_bank(gpio);
57 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
58 int shft = (gpio & 0xf) << 1;
59 int fn = MFP_AF(c);
60 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
61
62 if (fn > 3)
63 return -EINVAL;
64
65 /* alternate function and direction at run-time */
66 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
67 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
68
69 if (uorl == 0)
70 GAFR_L(bank) = gafr;
71 else
72 GAFR_U(bank) = gafr;
73
74 if (is_out ^ gpio_desc[gpio].dir_inverted)
75 GPDR(gpio) |= mask;
76 else
77 GPDR(gpio) &= ~mask;
78
79 /* alternate function and direction at low power mode */
80 switch (c & MFP_LPM_STATE_MASK) {
81 case MFP_LPM_DRIVE_HIGH:
82 PGSR(bank) |= mask;
83 is_out = 1;
84 break;
85 case MFP_LPM_DRIVE_LOW:
86 PGSR(bank) &= ~mask;
87 is_out = 1;
88 break;
89 case MFP_LPM_INPUT:
90 case MFP_LPM_DEFAULT:
91 break;
92 default:
93 /* warning and fall through, treat as MFP_LPM_DEFAULT */
94 pr_warning("%s: GPIO%d: unsupported low power mode\n",
95 __func__, gpio);
96 break;
97 }
98
99 if (is_out ^ gpio_desc[gpio].dir_inverted)
100 gpdr_lpm[bank] |= mask;
101 else
102 gpdr_lpm[bank] &= ~mask;
103
104 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
105 * configurations of those pins not able to wakeup
106 */
107 if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
108 pr_warning("%s: GPIO%d unable to wakeup\n",
109 __func__, gpio);
110 return -EINVAL;
111 }
112
113 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
114 pr_warning("%s: output GPIO%d unable to wakeup\n",
115 __func__, gpio);
116 return -EINVAL;
117 }
118
119 return 0;
120 }
121
122 static inline int __mfp_validate(int mfp)
123 {
124 int gpio = mfp_to_gpio(mfp);
125
126 if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
127 pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
128 return -1;
129 }
130
131 return gpio;
132 }
133
134 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
135 {
136 unsigned long flags;
137 unsigned long *c;
138 int i, gpio;
139
140 for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
141
142 gpio = __mfp_validate(MFP_PIN(*c));
143 if (gpio < 0)
144 continue;
145
146 local_irq_save(flags);
147
148 gpio_desc[gpio].config = *c;
149 __mfp_config_gpio(gpio, *c);
150
151 local_irq_restore(flags);
152 }
153 }
154
155 void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
156 {
157 unsigned long flags, c;
158 int gpio;
159
160 gpio = __mfp_validate(mfp);
161 if (gpio < 0)
162 return;
163
164 local_irq_save(flags);
165
166 c = gpio_desc[gpio].config;
167 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
168 __mfp_config_gpio(gpio, c);
169
170 local_irq_restore(flags);
171 }
172
173 int gpio_set_wake(unsigned int gpio, unsigned int on)
174 {
175 struct gpio_desc *d;
176 unsigned long c, mux_taken;
177
178 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
179 return -EINVAL;
180
181 d = &gpio_desc[gpio];
182 c = d->config;
183
184 if (!d->valid)
185 return -EINVAL;
186
187 /* Allow keypad GPIOs to wakeup system when
188 * configured as generic GPIOs.
189 */
190 if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
191 (d->config & MFP_LPM_CAN_WAKEUP)) {
192 if (on)
193 PKWR |= d->mask;
194 else
195 PKWR &= ~d->mask;
196 return 0;
197 }
198
199 mux_taken = (PWER & d->mux_mask) & (~d->mask);
200 if (on && mux_taken)
201 return -EBUSY;
202
203 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
204 if (on) {
205 PWER = (PWER & ~d->mux_mask) | d->mask;
206
207 if (c & MFP_LPM_EDGE_RISE)
208 PRER |= d->mask;
209 else
210 PRER &= ~d->mask;
211
212 if (c & MFP_LPM_EDGE_FALL)
213 PFER |= d->mask;
214 else
215 PFER &= ~d->mask;
216 } else {
217 PWER &= ~d->mask;
218 PRER &= ~d->mask;
219 PFER &= ~d->mask;
220 }
221 }
222 return 0;
223 }
224
225 #ifdef CONFIG_PXA25x
226 static void __init pxa25x_mfp_init(void)
227 {
228 int i;
229
230 /* running before pxa_gpio_probe() */
231 #ifdef CONFIG_CPU_PXA26x
232 pxa_last_gpio = 89;
233 #else
234 pxa_last_gpio = 84;
235 #endif
236 for (i = 0; i <= pxa_last_gpio; i++)
237 gpio_desc[i].valid = 1;
238
239 for (i = 0; i <= 15; i++) {
240 gpio_desc[i].can_wakeup = 1;
241 gpio_desc[i].mask = GPIO_bit(i);
242 }
243
244 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
245 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
246 */
247 for (i = 86; i <= pxa_last_gpio; i++)
248 gpio_desc[i].dir_inverted = 1;
249 }
250 #else
251 static inline void pxa25x_mfp_init(void) {}
252 #endif /* CONFIG_PXA25x */
253
254 #ifdef CONFIG_PXA27x
255 static int pxa27x_pkwr_gpio[] = {
256 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
257 95, 96, 97, 98, 99, 100, 101, 102
258 };
259
260 int keypad_set_wake(unsigned int on)
261 {
262 unsigned int i, gpio, mask = 0;
263 struct gpio_desc *d;
264
265 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
266
267 gpio = pxa27x_pkwr_gpio[i];
268 d = &gpio_desc[gpio];
269
270 /* skip if configured as generic GPIO */
271 if (MFP_AF(d->config) == 0)
272 continue;
273
274 if (d->config & MFP_LPM_CAN_WAKEUP)
275 mask |= gpio_desc[gpio].mask;
276 }
277
278 if (on)
279 PKWR |= mask;
280 else
281 PKWR &= ~mask;
282 return 0;
283 }
284
285 #define PWER_WEMUX2_GPIO38 (1 << 16)
286 #define PWER_WEMUX2_GPIO53 (2 << 16)
287 #define PWER_WEMUX2_GPIO40 (3 << 16)
288 #define PWER_WEMUX2_GPIO36 (4 << 16)
289 #define PWER_WEMUX2_MASK (7 << 16)
290 #define PWER_WEMUX3_GPIO31 (1 << 19)
291 #define PWER_WEMUX3_GPIO113 (2 << 19)
292 #define PWER_WEMUX3_MASK (3 << 19)
293
294 #define INIT_GPIO_DESC_MUXED(mux, gpio) \
295 do { \
296 gpio_desc[(gpio)].can_wakeup = 1; \
297 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
298 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
299 } while (0)
300
301 static void __init pxa27x_mfp_init(void)
302 {
303 int i, gpio;
304
305 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
306 for (i = 0; i <= pxa_last_gpio; i++) {
307 /* skip GPIO2, 5, 6, 7, 8, they are not
308 * valid pins allow configuration
309 */
310 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
311 continue;
312
313 gpio_desc[i].valid = 1;
314 }
315
316 /* Keypad GPIOs */
317 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
318 gpio = pxa27x_pkwr_gpio[i];
319 gpio_desc[gpio].can_wakeup = 1;
320 gpio_desc[gpio].keypad_gpio = 1;
321 gpio_desc[gpio].mask = 1 << i;
322 }
323
324 /* Overwrite GPIO13 as a PWER wakeup source */
325 for (i = 0; i <= 15; i++) {
326 /* skip GPIO2, 5, 6, 7, 8 */
327 if (GPIO_bit(i) & 0x1e4)
328 continue;
329
330 gpio_desc[i].can_wakeup = 1;
331 gpio_desc[i].mask = GPIO_bit(i);
332 }
333
334 gpio_desc[35].can_wakeup = 1;
335 gpio_desc[35].mask = PWER_WE35;
336
337 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
338 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
339 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
340 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
341 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
342 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
343 }
344 #else
345 static inline void pxa27x_mfp_init(void) {}
346 #endif /* CONFIG_PXA27x */
347
348 #ifdef CONFIG_PM
349 static unsigned long saved_gafr[2][4];
350 static unsigned long saved_gpdr[4];
351 static unsigned long saved_pgsr[4];
352
353 static int pxa2xx_mfp_suspend(void)
354 {
355 int i;
356
357 /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
358 for (i = 0; i < pxa_last_gpio; i++) {
359 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
360 (GPDR(i) & GPIO_bit(i))) {
361 if (GPLR(i) & GPIO_bit(i))
362 PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
363 else
364 PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
365 }
366 }
367
368 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
369 saved_gafr[0][i] = GAFR_L(i);
370 saved_gafr[1][i] = GAFR_U(i);
371 saved_gpdr[i] = GPDR(i * 32);
372 saved_pgsr[i] = PGSR(i);
373 }
374
375 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
376 for (i = 0; i < pxa_last_gpio; i++) {
377 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
378 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
379 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
380 GPDR(i) |= GPIO_bit(i);
381 else
382 GPDR(i) &= ~GPIO_bit(i);
383 }
384
385 return 0;
386 }
387
388 static void pxa2xx_mfp_resume(void)
389 {
390 int i;
391
392 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
393 GAFR_L(i) = saved_gafr[0][i];
394 GAFR_U(i) = saved_gafr[1][i];
395 GPDR(i * 32) = saved_gpdr[i];
396 PGSR(i) = saved_pgsr[i];
397 }
398 PSSR = PSSR_RDH | PSSR_PH;
399 }
400 #else
401 #define pxa2xx_mfp_suspend NULL
402 #define pxa2xx_mfp_resume NULL
403 #endif
404
405 struct syscore_ops pxa2xx_mfp_syscore_ops = {
406 .suspend = pxa2xx_mfp_suspend,
407 .resume = pxa2xx_mfp_resume,
408 };
409
410 static int __init pxa2xx_mfp_init(void)
411 {
412 int i;
413
414 if (!cpu_is_pxa2xx())
415 return 0;
416
417 if (cpu_is_pxa25x())
418 pxa25x_mfp_init();
419
420 if (cpu_is_pxa27x())
421 pxa27x_mfp_init();
422
423 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
424 PSSR = PSSR_RDH;
425
426 /* initialize gafr_run[], pgsr_lpm[] from existing values */
427 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
428 gpdr_lpm[i] = GPDR(i * 32);
429
430 return 0;
431 }
432 postcore_initcall(pxa2xx_mfp_init);