arch/arm/mach-pxa/pxa25x.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/pxa25x.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Jun 15, 2001
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code specific to PXA21x/25x/26x variants.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  * Since this file should be linked before any other machine specific file,
  15  * the __initcall() here will be executed first.  This serves as default
  16  * initialization stuff for PXA machines which can be overridden later if
  17  * need be.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/pm.h>
  23
  24 #include <asm/hardware.h>
  25 #include <asm/arch/irqs.h>
  26 #include <asm/arch/pxa-regs.h>
  27 #include <asm/arch/pm.h>
  28 #include <asm/arch/dma.h>
  29
  30 #include "generic.h"
  31
  32 /*
  33  * Various clock factors driven by the CCCR register.
  34  */
  35
  36 /* Crystal Frequency to Memory Frequency Multiplier (L) */
  37 static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
  38
  39 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
  40 static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
  41
  42 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
  43 /* Note: we store the value N * 2 here. */
  44 static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
  45
  46 /* Crystal clock */
  47 #define BASE_CLK        3686400
  48
  49 /*
  50  * Get the clock frequency as reflected by CCCR and the turbo flag.
  51  * We assume these values have been applied via a fcs.
  52  * If info is not 0 we also display the current settings.
  53  */
  54 unsigned int get_clk_frequency_khz(int info)
  55 {
  56         unsigned long cccr, turbo;
  57         unsigned int l, L, m, M, n2, N;
  58
  59         cccr = CCCR;
  60         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
  61
  62         l  =  L_clk_mult[(cccr >> 0) & 0x1f];
  63         m  =  M_clk_mult[(cccr >> 5) & 0x03];
  64         n2 = N2_clk_mult[(cccr >> 7) & 0x07];
  65
  66         L = l * BASE_CLK;
  67         M = m * L;
  68         N = n2 * M / 2;
  69
  70         if(info)
  71         {
  72                 L += 5000;
  73                 printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
  74                         L / 1000000, (L % 1000000) / 10000, l );
  75                 M += 5000;
  76                 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  77                         M / 1000000, (M % 1000000) / 10000, m );
  78                 N += 5000;
  79                 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  80                         N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
  81                         (turbo & 1) ? "" : "in" );
  82         }
  83
  84         return (turbo & 1) ? (N/1000) : (M/1000);
  85 }
  86
  87 EXPORT_SYMBOL(get_clk_frequency_khz);
  88
  89 /*
  90  * Return the current memory clock frequency in units of 10kHz
  91  */
  92 unsigned int get_memclk_frequency_10khz(void)
  93 {
  94         return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
  95 }
  96
  97 EXPORT_SYMBOL(get_memclk_frequency_10khz);
  98
  99 /*
 100  * Return the current LCD clock frequency in units of 10kHz
 101  */
 102 unsigned int get_lcdclk_frequency_10khz(void)
 103 {
 104         return get_memclk_frequency_10khz();
 105 }
 106
 107 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
 108
 109 #ifdef CONFIG_PM
 110
 111 void pxa_cpu_pm_enter(suspend_state_t state)
 112 {
 113         extern void pxa_cpu_suspend(unsigned int);
 114         extern void pxa_cpu_resume(void);
 115
 116         CKEN = 0;
 117
 118         switch (state) {
 119         case PM_SUSPEND_MEM:
 120                 /* set resume return address */
 121                 PSPR = virt_to_phys(pxa_cpu_resume);
 122                 pxa_cpu_suspend(PWRMODE_SLEEP);
 123                 break;
 124         }
 125 }
 126
 127 static struct pm_ops pxa25x_pm_ops = {
 128         .enter          = pxa_pm_enter,
 129         .valid          = pm_valid_only_mem,
 130 };
 131 #endif
 132
 133 void __init pxa25x_init_irq(void)
 134 {
 135         pxa_init_irq_low();
 136         pxa_init_irq_gpio(85);
 137 }
 138
 139 static int __init pxa25x_init(void)
 140 {
 141         int ret = 0;
 142
 143         if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
 144                 if ((ret = pxa_init_dma(16)))
 145                         return ret;
 146 #ifdef CONFIG_PM
 147                 pm_set_ops(&pxa25x_pm_ops);
 148 #endif
 149         }
 150         return 0;
 151 }
 152
 153 subsys_initcall(pxa25x_init);