2 * arch/arm/mach-pxa/time.c
4 * PXA clocksource, clockevents, and OST interrupt handlers.
5 * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.
7 * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001
8 * by MontaVista Software, Inc. (Nico, your code rocks!)
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/clockchips.h>
20 #include <asm/div64.h>
21 #include <asm/mach/irq.h>
22 #include <asm/mach/time.h>
23 #include <asm/sched_clock.h>
24 #include <mach/regs-ost.h>
25 #include <mach/irqs.h>
28 * This is PXA's sched_clock implementation. This has a resolution
29 * of at least 308 ns and a maximum value of 208 days.
31 * The return value is guaranteed to be monotonic in that range as
32 * long as there is always less than 582 seconds between successive
33 * calls to sched_clock() which should always be the case in practice.
36 static u32 notrace
pxa_read_sched_clock(void)
38 return readl_relaxed(OSCR
);
42 #define MIN_OSCR_DELTA 16
45 pxa_ost0_interrupt(int irq
, void *dev_id
)
47 struct clock_event_device
*c
= dev_id
;
49 /* Disarm the compare/match, signal the event. */
50 writel_relaxed(readl_relaxed(OIER
) & ~OIER_E0
, OIER
);
51 writel_relaxed(OSSR_M0
, OSSR
);
58 pxa_osmr0_set_next_event(unsigned long delta
, struct clock_event_device
*dev
)
60 unsigned long next
, oscr
;
62 writel_relaxed(readl_relaxed(OIER
) | OIER_E0
, OIER
);
63 next
= readl_relaxed(OSCR
) + delta
;
64 writel_relaxed(next
, OSMR0
);
65 oscr
= readl_relaxed(OSCR
);
67 return (signed)(next
- oscr
) <= MIN_OSCR_DELTA
? -ETIME
: 0;
71 pxa_osmr0_set_mode(enum clock_event_mode mode
, struct clock_event_device
*dev
)
74 case CLOCK_EVT_MODE_ONESHOT
:
75 writel_relaxed(readl_relaxed(OIER
) & ~OIER_E0
, OIER
);
76 writel_relaxed(OSSR_M0
, OSSR
);
79 case CLOCK_EVT_MODE_UNUSED
:
80 case CLOCK_EVT_MODE_SHUTDOWN
:
81 /* initializing, released, or preparing for suspend */
82 writel_relaxed(readl_relaxed(OIER
) & ~OIER_E0
, OIER
);
83 writel_relaxed(OSSR_M0
, OSSR
);
86 case CLOCK_EVT_MODE_RESUME
:
87 case CLOCK_EVT_MODE_PERIODIC
:
93 static unsigned long osmr
[4], oier
, oscr
;
95 static void pxa_timer_suspend(struct clock_event_device
*cedev
)
97 osmr
[0] = readl_relaxed(OSMR0
);
98 osmr
[1] = readl_relaxed(OSMR1
);
99 osmr
[2] = readl_relaxed(OSMR2
);
100 osmr
[3] = readl_relaxed(OSMR3
);
101 oier
= readl_relaxed(OIER
);
102 oscr
= readl_relaxed(OSCR
);
105 static void pxa_timer_resume(struct clock_event_device
*cedev
)
108 * Ensure that we have at least MIN_OSCR_DELTA between match
109 * register 0 and the OSCR, to guarantee that we will receive
110 * the one-shot timer interrupt. We adjust OSMR0 in preference
111 * to OSCR to guarantee that OSCR is monotonically incrementing.
113 if (osmr
[0] - oscr
< MIN_OSCR_DELTA
)
114 osmr
[0] += MIN_OSCR_DELTA
;
116 writel_relaxed(osmr
[0], OSMR0
);
117 writel_relaxed(osmr
[1], OSMR1
);
118 writel_relaxed(osmr
[2], OSMR2
);
119 writel_relaxed(osmr
[3], OSMR3
);
120 writel_relaxed(oier
, OIER
);
121 writel_relaxed(oscr
, OSCR
);
124 #define pxa_timer_suspend NULL
125 #define pxa_timer_resume NULL
128 static struct clock_event_device ckevt_pxa_osmr0
= {
130 .features
= CLOCK_EVT_FEAT_ONESHOT
,
132 .set_next_event
= pxa_osmr0_set_next_event
,
133 .set_mode
= pxa_osmr0_set_mode
,
134 .suspend
= pxa_timer_suspend
,
135 .resume
= pxa_timer_resume
,
138 static struct irqaction pxa_ost0_irq
= {
140 .flags
= IRQF_DISABLED
| IRQF_TIMER
| IRQF_IRQPOLL
,
141 .handler
= pxa_ost0_interrupt
,
142 .dev_id
= &ckevt_pxa_osmr0
,
145 void __init
pxa_timer_init(void)
147 unsigned long clock_tick_rate
= get_clock_tick_rate();
149 writel_relaxed(0, OIER
);
150 writel_relaxed(OSSR_M0
| OSSR_M1
| OSSR_M2
| OSSR_M3
, OSSR
);
152 setup_sched_clock(pxa_read_sched_clock
, 32, clock_tick_rate
);
154 clockevents_calc_mult_shift(&ckevt_pxa_osmr0
, clock_tick_rate
, 4);
155 ckevt_pxa_osmr0
.max_delta_ns
=
156 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0
);
157 ckevt_pxa_osmr0
.min_delta_ns
=
158 clockevent_delta2ns(MIN_OSCR_DELTA
* 2, &ckevt_pxa_osmr0
) + 1;
159 ckevt_pxa_osmr0
.cpumask
= cpumask_of(0);
161 setup_irq(IRQ_OST0
, &pxa_ost0_irq
);
163 clocksource_mmio_init(OSCR
, "oscr0", clock_tick_rate
, 200, 32,
164 clocksource_mmio_readl_up
);
165 clockevents_register_device(&ckevt_pxa_osmr0
);