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1 /*
2 * linux/arch/arm/mach-pxa/viper.c
3 *
4 * Support for the Arcom VIPER SBC.
5 *
6 * Author: Ian Campbell
7 * Created: Feb 03, 2003
8 * Copyright: Arcom Control Systems
9 *
10 * Maintained by Marc Zyngier <maz@misterjones.org>
11 * <marc.zyngier@altran.com>
12 *
13 * Based on lubbock.c:
14 * Author: Nicolas Pitre
15 * Created: Jun 15, 2001
16 * Copyright: MontaVista Software Inc.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/types.h>
24 #include <linux/memory.h>
25 #include <linux/cpu.h>
26 #include <linux/cpufreq.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/init.h>
30 #include <linux/interrupt.h>
31 #include <linux/major.h>
32 #include <linux/module.h>
33 #include <linux/pm.h>
34 #include <linux/sched.h>
35 #include <linux/gpio.h>
36 #include <linux/i2c-gpio.h>
37 #include <linux/serial_8250.h>
38 #include <linux/smc91x.h>
39 #include <linux/pwm_backlight.h>
40 #include <linux/usb/isp116x.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/partitions.h>
43 #include <linux/mtd/physmap.h>
44
45 #include <mach/pxa25x.h>
46 #include <mach/audio.h>
47 #include <mach/pxafb.h>
48 #include <mach/i2c.h>
49 #include <mach/viper.h>
50
51 #include <asm/setup.h>
52 #include <asm/mach-types.h>
53 #include <asm/irq.h>
54 #include <asm/sizes.h>
55
56 #include <asm/mach/arch.h>
57 #include <asm/mach/map.h>
58 #include <asm/mach/irq.h>
59
60 #include "generic.h"
61 #include "devices.h"
62
63 static unsigned int icr;
64
65 static void viper_icr_set_bit(unsigned int bit)
66 {
67 icr |= bit;
68 VIPER_ICR = icr;
69 }
70
71 static void viper_icr_clear_bit(unsigned int bit)
72 {
73 icr &= ~bit;
74 VIPER_ICR = icr;
75 }
76
77 /* This function is used from the pcmcia module to reset the CF */
78 void viper_cf_rst(int state)
79 {
80 if (state)
81 viper_icr_set_bit(VIPER_ICR_CF_RST);
82 else
83 viper_icr_clear_bit(VIPER_ICR_CF_RST);
84 }
85 EXPORT_SYMBOL(viper_cf_rst);
86
87 /*
88 * The CPLD version register was not present on VIPER boards prior to
89 * v2i1. On v1 boards where the version register is not present we
90 * will just read back the previous value from the databus.
91 *
92 * Therefore we do two reads. The first time we write 0 to the
93 * (read-only) register before reading and the second time we write
94 * 0xff first. If the two reads do not match or they read back as 0xff
95 * or 0x00 then we have version 1 hardware.
96 */
97 static u8 viper_hw_version(void)
98 {
99 u8 v1, v2;
100 unsigned long flags;
101
102 local_irq_save(flags);
103
104 VIPER_VERSION = 0;
105 v1 = VIPER_VERSION;
106 VIPER_VERSION = 0xff;
107 v2 = VIPER_VERSION;
108
109 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
110
111 local_irq_restore(flags);
112 return v1;
113 }
114
115 /* CPU sysdev */
116 static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
117 {
118 viper_icr_set_bit(VIPER_ICR_R_DIS);
119 return 0;
120 }
121
122 static int viper_cpu_resume(struct sys_device *sysdev)
123 {
124 viper_icr_clear_bit(VIPER_ICR_R_DIS);
125 return 0;
126 }
127
128 static struct sysdev_driver viper_cpu_sysdev_driver = {
129 .suspend = viper_cpu_suspend,
130 .resume = viper_cpu_resume,
131 };
132
133 static unsigned int current_voltage_divisor;
134
135 /*
136 * If force is not true then step from existing to new divisor. If
137 * force is true then jump straight to the new divisor. Stepping is
138 * used because if the jump in voltage is too large, the VCC can dip
139 * too low and the regulator cuts out.
140 *
141 * force can be used to initialize the divisor to a know state by
142 * setting the value for the current clock speed, since we are already
143 * running at that speed we know the voltage should be pretty close so
144 * the jump won't be too large
145 */
146 static void viper_set_core_cpu_voltage(unsigned long khz, int force)
147 {
148 int i = 0;
149 unsigned int divisor = 0;
150 const char *v;
151
152 if (khz < 200000) {
153 v = "1.0"; divisor = 0xfff;
154 } else if (khz < 300000) {
155 v = "1.1"; divisor = 0xde5;
156 } else {
157 v = "1.3"; divisor = 0x325;
158 }
159
160 pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
161 v, (int)khz / 1000, (int)khz % 1000);
162
163 #define STEP 0x100
164 do {
165 int step;
166
167 if (force)
168 step = divisor;
169 else if (current_voltage_divisor < divisor - STEP)
170 step = current_voltage_divisor + STEP;
171 else if (current_voltage_divisor > divisor + STEP)
172 step = current_voltage_divisor - STEP;
173 else
174 step = divisor;
175 force = 0;
176
177 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
178 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
179
180 for (i = 1 << 11 ; i > 0 ; i >>= 1) {
181 udelay(1);
182
183 gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
184 udelay(1);
185
186 gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
187 udelay(1);
188
189 gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
190 }
191 udelay(1);
192
193 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
194 udelay(1);
195
196 gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
197
198 current_voltage_divisor = step;
199 } while (current_voltage_divisor != divisor);
200 }
201
202 /* Interrupt handling */
203 static unsigned long viper_irq_enabled_mask;
204 static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
205 static const int viper_isa_irq_map[] = {
206 0, /* ISA irq #0, invalid */
207 0, /* ISA irq #1, invalid */
208 0, /* ISA irq #2, invalid */
209 1 << 0, /* ISA irq #3 */
210 1 << 1, /* ISA irq #4 */
211 1 << 2, /* ISA irq #5 */
212 1 << 3, /* ISA irq #6 */
213 1 << 4, /* ISA irq #7 */
214 0, /* ISA irq #8, invalid */
215 1 << 8, /* ISA irq #9 */
216 1 << 5, /* ISA irq #10 */
217 1 << 6, /* ISA irq #11 */
218 1 << 7, /* ISA irq #12 */
219 0, /* ISA irq #13, invalid */
220 1 << 9, /* ISA irq #14 */
221 1 << 10, /* ISA irq #15 */
222 };
223
224 static inline int viper_irq_to_bitmask(unsigned int irq)
225 {
226 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
227 }
228
229 static inline int viper_bit_to_irq(int bit)
230 {
231 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
232 }
233
234 static void viper_ack_irq(unsigned int irq)
235 {
236 int viper_irq = viper_irq_to_bitmask(irq);
237
238 if (viper_irq & 0xff)
239 VIPER_LO_IRQ_STATUS = viper_irq;
240 else
241 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
242 }
243
244 static void viper_mask_irq(unsigned int irq)
245 {
246 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
247 }
248
249 static void viper_unmask_irq(unsigned int irq)
250 {
251 viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
252 }
253
254 static inline unsigned long viper_irq_pending(void)
255 {
256 return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
257 viper_irq_enabled_mask;
258 }
259
260 static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
261 {
262 unsigned long pending;
263
264 pending = viper_irq_pending();
265 do {
266 /* we're in a chained irq handler,
267 * so ack the interrupt by hand */
268 GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
269
270 if (likely(pending)) {
271 irq = viper_bit_to_irq(__ffs(pending));
272 generic_handle_irq(irq);
273 }
274 pending = viper_irq_pending();
275 } while (pending);
276 }
277
278 static struct irq_chip viper_irq_chip = {
279 .name = "ISA",
280 .ack = viper_ack_irq,
281 .mask = viper_mask_irq,
282 .unmask = viper_unmask_irq
283 };
284
285 static void __init viper_init_irq(void)
286 {
287 int level;
288 int isa_irq;
289
290 pxa25x_init_irq();
291
292 /* setup ISA IRQs */
293 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
294 isa_irq = viper_bit_to_irq(level);
295 set_irq_chip(isa_irq, &viper_irq_chip);
296 set_irq_handler(isa_irq, handle_edge_irq);
297 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
298 }
299
300 set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
301 viper_irq_handler);
302 set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
303
304 #ifndef CONFIG_SERIAL_PXA
305 /*
306 * 8250 doesn't support IRQ_TYPE being passed as part
307 * of the plat_serial8250_port structure...
308 */
309 set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
310 set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
311 #endif
312 }
313
314 /* Flat Panel */
315 static struct pxafb_mode_info fb_mode_info[] = {
316 {
317 .pixclock = 157500,
318
319 .xres = 320,
320 .yres = 240,
321
322 .bpp = 16,
323
324 .hsync_len = 63,
325 .left_margin = 7,
326 .right_margin = 13,
327
328 .vsync_len = 20,
329 .upper_margin = 0,
330 .lower_margin = 0,
331
332 .sync = 0,
333 },
334 };
335
336 static struct pxafb_mach_info fb_info = {
337 .modes = fb_mode_info,
338 .num_modes = 1,
339 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
340 };
341
342 static int viper_backlight_init(struct device *dev)
343 {
344 int ret;
345
346 /* GPIO9 and 10 control FB backlight. Initialise to off */
347 ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
348 if (ret)
349 goto err_request_bckl;
350
351 ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
352 if (ret)
353 goto err_request_lcd;
354
355 ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
356 if (ret)
357 goto err_dir;
358
359 ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
360 if (ret)
361 goto err_dir;
362
363 return 0;
364
365 err_dir:
366 gpio_free(VIPER_LCD_EN_GPIO);
367 err_request_lcd:
368 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
369 err_request_bckl:
370 dev_err(dev, "Failed to setup LCD GPIOs\n");
371
372 return ret;
373 }
374
375 static int viper_backlight_notify(int brightness)
376 {
377 gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
378 gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
379
380 return brightness;
381 }
382
383 static void viper_backlight_exit(struct device *dev)
384 {
385 gpio_free(VIPER_LCD_EN_GPIO);
386 gpio_free(VIPER_BCKLIGHT_EN_GPIO);
387 }
388
389 static struct platform_pwm_backlight_data viper_backlight_data = {
390 .pwm_id = 0,
391 .max_brightness = 100,
392 .dft_brightness = 100,
393 .pwm_period_ns = 1000000,
394 .init = viper_backlight_init,
395 .notify = viper_backlight_notify,
396 .exit = viper_backlight_exit,
397 };
398
399 static struct platform_device viper_backlight_device = {
400 .name = "pwm-backlight",
401 .dev = {
402 .parent = &pxa25x_device_pwm0.dev,
403 .platform_data = &viper_backlight_data,
404 },
405 };
406
407 /* Ethernet */
408 static struct resource smc91x_resources[] = {
409 [0] = {
410 .name = "smc91x-regs",
411 .start = VIPER_ETH_PHYS + 0x300,
412 .end = VIPER_ETH_PHYS + 0x30f,
413 .flags = IORESOURCE_MEM,
414 },
415 [1] = {
416 .start = gpio_to_irq(VIPER_ETH_GPIO),
417 .end = gpio_to_irq(VIPER_ETH_GPIO),
418 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
419 },
420 [2] = {
421 .name = "smc91x-data32",
422 .start = VIPER_ETH_DATA_PHYS,
423 .end = VIPER_ETH_DATA_PHYS + 3,
424 .flags = IORESOURCE_MEM,
425 },
426 };
427
428 static struct smc91x_platdata viper_smc91x_info = {
429 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
430 .leda = RPC_LED_100_10,
431 .ledb = RPC_LED_TX_RX,
432 };
433
434 static struct platform_device smc91x_device = {
435 .name = "smc91x",
436 .id = -1,
437 .num_resources = ARRAY_SIZE(smc91x_resources),
438 .resource = smc91x_resources,
439 .dev = {
440 .platform_data = &viper_smc91x_info,
441 },
442 };
443
444 /* i2c */
445 static struct i2c_gpio_platform_data i2c_bus_data = {
446 .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
447 .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
448 .udelay = 10,
449 .timeout = 100,
450 };
451
452 static struct platform_device i2c_bus_device = {
453 .name = "i2c-gpio",
454 .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
455 .dev = {
456 .platform_data = &i2c_bus_data,
457 }
458 };
459
460 static struct i2c_board_info __initdata viper_i2c_devices[] = {
461 {
462 I2C_BOARD_INFO("ds1338", 0x68),
463 },
464 };
465
466 /*
467 * Serial configuration:
468 * You can either have the standard PXA ports driven by the PXA driver,
469 * or all the ports (PXA + 16850) driven by the 8250 driver.
470 * Choose your poison.
471 */
472
473 static struct resource viper_serial_resources[] = {
474 #ifndef CONFIG_SERIAL_PXA
475 {
476 .start = 0x40100000,
477 .end = 0x4010001f,
478 .flags = IORESOURCE_MEM,
479 },
480 {
481 .start = 0x40200000,
482 .end = 0x4020001f,
483 .flags = IORESOURCE_MEM,
484 },
485 {
486 .start = 0x40700000,
487 .end = 0x4070001f,
488 .flags = IORESOURCE_MEM,
489 },
490 {
491 .start = VIPER_UARTA_PHYS,
492 .end = VIPER_UARTA_PHYS + 0xf,
493 .flags = IORESOURCE_MEM,
494 },
495 {
496 .start = VIPER_UARTB_PHYS,
497 .end = VIPER_UARTB_PHYS + 0xf,
498 .flags = IORESOURCE_MEM,
499 },
500 #else
501 {
502 0,
503 },
504 #endif
505 };
506
507 static struct plat_serial8250_port serial_platform_data[] = {
508 #ifndef CONFIG_SERIAL_PXA
509 /* Internal UARTs */
510 {
511 .membase = (void *)&FFUART,
512 .mapbase = __PREG(FFUART),
513 .irq = IRQ_FFUART,
514 .uartclk = 921600 * 16,
515 .regshift = 2,
516 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
517 .iotype = UPIO_MEM,
518 },
519 {
520 .membase = (void *)&BTUART,
521 .mapbase = __PREG(BTUART),
522 .irq = IRQ_BTUART,
523 .uartclk = 921600 * 16,
524 .regshift = 2,
525 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
526 .iotype = UPIO_MEM,
527 },
528 {
529 .membase = (void *)&STUART,
530 .mapbase = __PREG(STUART),
531 .irq = IRQ_STUART,
532 .uartclk = 921600 * 16,
533 .regshift = 2,
534 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
535 .iotype = UPIO_MEM,
536 },
537 /* External UARTs */
538 {
539 .mapbase = VIPER_UARTA_PHYS,
540 .irq = gpio_to_irq(VIPER_UARTA_GPIO),
541 .uartclk = 1843200,
542 .regshift = 1,
543 .iotype = UPIO_MEM,
544 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
545 UPF_SKIP_TEST,
546 },
547 {
548 .mapbase = VIPER_UARTB_PHYS,
549 .irq = gpio_to_irq(VIPER_UARTB_GPIO),
550 .uartclk = 1843200,
551 .regshift = 1,
552 .iotype = UPIO_MEM,
553 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
554 UPF_SKIP_TEST,
555 },
556 #endif
557 { },
558 };
559
560 static struct platform_device serial_device = {
561 .name = "serial8250",
562 .id = 0,
563 .dev = {
564 .platform_data = serial_platform_data,
565 },
566 .num_resources = ARRAY_SIZE(viper_serial_resources),
567 .resource = viper_serial_resources,
568 };
569
570 /* USB */
571 static void isp116x_delay(struct device *dev, int delay)
572 {
573 ndelay(delay);
574 }
575
576 static struct resource isp116x_resources[] = {
577 [0] = { /* DATA */
578 .start = VIPER_USB_PHYS + 0,
579 .end = VIPER_USB_PHYS + 1,
580 .flags = IORESOURCE_MEM,
581 },
582 [1] = { /* ADDR */
583 .start = VIPER_USB_PHYS + 2,
584 .end = VIPER_USB_PHYS + 3,
585 .flags = IORESOURCE_MEM,
586 },
587 [2] = {
588 .start = gpio_to_irq(VIPER_USB_GPIO),
589 .end = gpio_to_irq(VIPER_USB_GPIO),
590 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
591 },
592 };
593
594 /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
595 static struct isp116x_platform_data isp116x_platform_data = {
596 /* Enable internal resistors on downstream ports */
597 .sel15Kres = 1,
598 /* On-chip overcurrent protection */
599 .oc_enable = 1,
600 /* INT output polarity */
601 .int_act_high = 1,
602 /* INT edge or level triggered */
603 .int_edge_triggered = 0,
604
605 /* WAKEUP pin connected - NOT SUPPORTED */
606 /* .remote_wakeup_connected = 0, */
607 /* Wakeup by devices on usb bus enabled */
608 .remote_wakeup_enable = 0,
609 .delay = isp116x_delay,
610 };
611
612 static struct platform_device isp116x_device = {
613 .name = "isp116x-hcd",
614 .id = -1,
615 .num_resources = ARRAY_SIZE(isp116x_resources),
616 .resource = isp116x_resources,
617 .dev = {
618 .platform_data = &isp116x_platform_data,
619 },
620
621 };
622
623 /* MTD */
624 static struct resource mtd_resources[] = {
625 [0] = { /* RedBoot config + filesystem flash */
626 .start = VIPER_FLASH_PHYS,
627 .end = VIPER_FLASH_PHYS + SZ_32M - 1,
628 .flags = IORESOURCE_MEM,
629 },
630 [1] = { /* Boot flash */
631 .start = VIPER_BOOT_PHYS,
632 .end = VIPER_BOOT_PHYS + SZ_1M - 1,
633 .flags = IORESOURCE_MEM,
634 },
635 [2] = { /*
636 * SRAM size is actually 256KB, 8bits, with a sparse mapping
637 * (each byte is on a 16bit boundary).
638 */
639 .start = _VIPER_SRAM_BASE,
640 .end = _VIPER_SRAM_BASE + SZ_512K - 1,
641 .flags = IORESOURCE_MEM,
642 },
643 };
644
645 static struct mtd_partition viper_boot_flash_partition = {
646 .name = "RedBoot",
647 .size = SZ_1M,
648 .offset = 0,
649 .mask_flags = MTD_WRITEABLE, /* force R/O */
650 };
651
652 static struct physmap_flash_data viper_flash_data[] = {
653 [0] = {
654 .width = 2,
655 .parts = NULL,
656 .nr_parts = 0,
657 },
658 [1] = {
659 .width = 2,
660 .parts = &viper_boot_flash_partition,
661 .nr_parts = 1,
662 },
663 };
664
665 static struct platform_device viper_mtd_devices[] = {
666 [0] = {
667 .name = "physmap-flash",
668 .id = 0,
669 .dev = {
670 .platform_data = &viper_flash_data[0],
671 },
672 .resource = &mtd_resources[0],
673 .num_resources = 1,
674 },
675 [1] = {
676 .name = "physmap-flash",
677 .id = 1,
678 .dev = {
679 .platform_data = &viper_flash_data[1],
680 },
681 .resource = &mtd_resources[1],
682 .num_resources = 1,
683 },
684 };
685
686 static struct platform_device *viper_devs[] __initdata = {
687 &smc91x_device,
688 &i2c_bus_device,
689 &serial_device,
690 &isp116x_device,
691 &viper_mtd_devices[0],
692 &viper_mtd_devices[1],
693 &viper_backlight_device,
694 };
695
696 static mfp_cfg_t viper_pin_config[] __initdata = {
697 /* Chip selects */
698 GPIO15_nCS_1,
699 GPIO78_nCS_2,
700 GPIO79_nCS_3,
701 GPIO80_nCS_4,
702 GPIO33_nCS_5,
703
704 /* FP Backlight */
705 GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
706 GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
707 GPIO16_PWM0_OUT,
708
709 /* Ethernet PHY Ready */
710 GPIO18_RDY,
711
712 /* Serial shutdown */
713 GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
714
715 /* Compact-Flash / PC104 */
716 GPIO48_nPOE,
717 GPIO49_nPWE,
718 GPIO50_nPIOR,
719 GPIO51_nPIOW,
720 GPIO52_nPCE_1,
721 GPIO53_nPCE_2,
722 GPIO54_nPSKTSEL,
723 GPIO55_nPREG,
724 GPIO56_nPWAIT,
725 GPIO57_nIOIS16,
726 GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
727 GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
728 GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
729
730 /* Integrated UPS control */
731 GPIO20_GPIO, /* VIPER_UPS_GPIO */
732
733 /* Vcc regulator control */
734 GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
735 GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
736 GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
737
738 /* i2c busses */
739 GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
740 GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
741 GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
742 GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
743
744 /* PC/104 Interrupt */
745 GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
746 };
747
748 static unsigned long viper_tpm;
749
750 static int __init viper_tpm_setup(char *str)
751 {
752 strict_strtoul(str, 10, &viper_tpm);
753 return 1;
754 }
755
756 __setup("tpm=", viper_tpm_setup);
757
758 static void __init viper_tpm_init(void)
759 {
760 struct platform_device *tpm_device;
761 struct i2c_gpio_platform_data i2c_tpm_data = {
762 .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
763 .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
764 .udelay = 10,
765 .timeout = 100,
766 };
767 char *errstr;
768
769 /* Allocate TPM i2c bus if requested */
770 if (!viper_tpm)
771 return;
772
773 tpm_device = platform_device_alloc("i2c-gpio", 2);
774 if (tpm_device) {
775 if (!platform_device_add_data(tpm_device,
776 &i2c_tpm_data,
777 sizeof(i2c_tpm_data))) {
778 if (platform_device_add(tpm_device)) {
779 errstr = "register TPM i2c bus";
780 goto error_free_tpm;
781 }
782 } else {
783 errstr = "allocate TPM i2c bus data";
784 goto error_free_tpm;
785 }
786 } else {
787 errstr = "allocate TPM i2c device";
788 goto error_tpm;
789 }
790
791 return;
792
793 error_free_tpm:
794 kfree(tpm_device);
795 error_tpm:
796 pr_err("viper: Couldn't %s, giving up\n", errstr);
797 }
798
799 static void __init viper_init_vcore_gpios(void)
800 {
801 if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
802 goto err_request_data;
803
804 if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
805 goto err_request_clk;
806
807 if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
808 goto err_request_cs;
809
810 if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
811 gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
812 gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
813 goto err_dir;
814
815 /* c/should assume redboot set the correct level ??? */
816 viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
817
818 return;
819
820 err_dir:
821 gpio_free(VIPER_PSU_nCS_LD_GPIO);
822 err_request_cs:
823 gpio_free(VIPER_PSU_CLK_GPIO);
824 err_request_clk:
825 gpio_free(VIPER_PSU_DATA_GPIO);
826 err_request_data:
827 pr_err("viper: Failed to setup vcore control GPIOs\n");
828 }
829
830 static void __init viper_init_serial_gpio(void)
831 {
832 if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
833 goto err_request;
834
835 if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
836 goto err_dir;
837
838 return;
839
840 err_dir:
841 gpio_free(VIPER_UART_SHDN_GPIO);
842 err_request:
843 pr_err("viper: Failed to setup UART shutdown GPIO\n");
844 }
845
846 #ifdef CONFIG_CPU_FREQ
847 static int viper_cpufreq_notifier(struct notifier_block *nb,
848 unsigned long val, void *data)
849 {
850 struct cpufreq_freqs *freq = data;
851
852 /* TODO: Adjust timings??? */
853
854 switch (val) {
855 case CPUFREQ_PRECHANGE:
856 if (freq->old < freq->new) {
857 /* we are getting faster so raise the voltage
858 * before we change freq */
859 viper_set_core_cpu_voltage(freq->new, 0);
860 }
861 break;
862 case CPUFREQ_POSTCHANGE:
863 if (freq->old > freq->new) {
864 /* we are slowing down so drop the power
865 * after we change freq */
866 viper_set_core_cpu_voltage(freq->new, 0);
867 }
868 break;
869 case CPUFREQ_RESUMECHANGE:
870 viper_set_core_cpu_voltage(freq->new, 0);
871 break;
872 default:
873 /* ignore */
874 break;
875 }
876
877 return 0;
878 }
879
880 static struct notifier_block viper_cpufreq_notifier_block = {
881 .notifier_call = viper_cpufreq_notifier
882 };
883
884 static void __init viper_init_cpufreq(void)
885 {
886 if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
887 CPUFREQ_TRANSITION_NOTIFIER))
888 pr_err("viper: Failed to setup cpufreq notifier\n");
889 }
890 #else
891 static inline void viper_init_cpufreq(void) {}
892 #endif
893
894 static void viper_power_off(void)
895 {
896 pr_notice("Shutting off UPS\n");
897 gpio_set_value(VIPER_UPS_GPIO, 1);
898 /* Spin to death... */
899 while (1);
900 }
901
902 static void __init viper_init(void)
903 {
904 u8 version;
905
906 pm_power_off = viper_power_off;
907
908 pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
909
910 /* Wake-up serial console */
911 viper_init_serial_gpio();
912
913 set_pxa_fb_info(&fb_info);
914
915 /* v1 hardware cannot use the datacs line */
916 version = viper_hw_version();
917 if (version == 0)
918 smc91x_device.num_resources--;
919
920 pxa_set_i2c_info(NULL);
921 platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
922
923 viper_init_vcore_gpios();
924 viper_init_cpufreq();
925
926 sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
927
928 if (version) {
929 pr_info("viper: hardware v%di%d detected. "
930 "CPLD revision %d.\n",
931 VIPER_BOARD_VERSION(version),
932 VIPER_BOARD_ISSUE(version),
933 VIPER_CPLD_REVISION(version));
934 system_rev = (VIPER_BOARD_VERSION(version) << 8) |
935 (VIPER_BOARD_ISSUE(version) << 4) |
936 VIPER_CPLD_REVISION(version);
937 } else {
938 pr_info("viper: No version register.\n");
939 }
940
941 i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
942
943 viper_tpm_init();
944 pxa_set_ac97_info(NULL);
945 }
946
947 static struct map_desc viper_io_desc[] __initdata = {
948 {
949 .virtual = VIPER_CPLD_BASE,
950 .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
951 .length = 0x00300000,
952 .type = MT_DEVICE,
953 },
954 {
955 .virtual = VIPER_PC104IO_BASE,
956 .pfn = __phys_to_pfn(0x30000000),
957 .length = 0x00800000,
958 .type = MT_DEVICE,
959 },
960 };
961
962 static void __init viper_map_io(void)
963 {
964 pxa_map_io();
965
966 iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
967
968 PCFR |= PCFR_OPDE;
969 }
970
971 MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
972 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
973 .phys_io = 0x40000000,
974 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
975 .boot_params = 0xa0000100,
976 .map_io = viper_map_io,
977 .init_irq = viper_init_irq,
978 .timer = &pxa_timer,
979 .init_machine = viper_init,
980 MACHINE_END