arch/arm/mach-pxa/xcep.c

   1 /*  linux/arch/arm/mach-pxa/xcep.c
   2  *
   3  *  Support for the Iskratel Electronics XCEP platform as used in
   4  *  the Libera instruments from Instrumentation Technologies.
   5  *
   6  *  Author:     Ales Bardorfer <ales@i-tech.si>
   7  *  Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
   8  *  Contributions by: Matej Kenda <matej.kenda@i-tech.si>
   9  *  Created:    June 2006
  10  *  Copyright:  (C) 2006-2009 Instrumentation Technologies
  11  *
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License version 2 as
  14  *  published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c.h>
  19 #include <linux/i2c/pxa-i2c.h>
  20 #include <linux/smc91x.h>
  21 #include <linux/mtd/mtd.h>
  22 #include <linux/mtd/partitions.h>
  23 #include <linux/mtd/physmap.h>
  24
  25 #include <asm/mach-types.h>
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/irq.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <mach/hardware.h>
  31 #include "pxa25x.h"
  32 #include <mach/smemc.h>
  33
  34 #include "generic.h"
  35
  36 #define XCEP_ETH_PHYS           (PXA_CS3_PHYS + 0x00000300)
  37 #define XCEP_ETH_PHYS_END       (PXA_CS3_PHYS + 0x000fffff)
  38 #define XCEP_ETH_ATTR           (PXA_CS3_PHYS + 0x02000000)
  39 #define XCEP_ETH_ATTR_END       (PXA_CS3_PHYS + 0x020fffff)
  40 #define XCEP_ETH_IRQ            IRQ_GPIO0
  41
  42 /*  XCEP CPLD base */
  43 #define XCEP_CPLD_BASE          0xf0000000
  44
  45
  46 /* Flash partitions. */
  47
  48 static struct mtd_partition xcep_partitions[] = {
  49         {
  50                 .name =         "Bootloader",
  51                 .size =         0x00040000,
  52                 .offset =       0,
  53                 .mask_flags =   MTD_WRITEABLE
  54         }, {
  55                 .name =         "Bootloader ENV",
  56                 .size =         0x00040000,
  57                 .offset =       0x00040000,
  58                 .mask_flags =   MTD_WRITEABLE
  59         }, {
  60                 .name =         "Kernel",
  61                 .size =         0x00100000,
  62                 .offset =       0x00080000,
  63         }, {
  64                 .name =         "Rescue fs",
  65                 .size =         0x00280000,
  66                 .offset =       0x00180000,
  67         }, {
  68                 .name =         "Filesystem",
  69                 .size =         MTDPART_SIZ_FULL,
  70                 .offset =       0x00400000
  71         }
  72 };
  73
  74 static struct physmap_flash_data xcep_flash_data[] = {
  75         {
  76                 .width          = 4,            /* bankwidth in bytes */
  77                 .parts          = xcep_partitions,
  78                 .nr_parts       = ARRAY_SIZE(xcep_partitions)
  79         }
  80 };
  81
  82 static struct resource flash_resource = {
  83         .start  = PXA_CS0_PHYS,
  84         .end    = PXA_CS0_PHYS + SZ_32M - 1,
  85         .flags  = IORESOURCE_MEM,
  86 };
  87
  88 static struct platform_device flash_device = {
  89         .name   = "physmap-flash",
  90         .id     = 0,
  91         .dev    = {
  92                 .platform_data = xcep_flash_data,
  93         },
  94         .resource = &flash_resource,
  95         .num_resources = 1,
  96 };
  97
  98
  99
 100 /* SMC LAN91C111 network controller. */
 101
 102 static struct resource smc91x_resources[] = {
 103         [0] = {
 104                 .name   = "smc91x-regs",
 105                 .start  = XCEP_ETH_PHYS,
 106                 .end    = XCEP_ETH_PHYS_END,
 107                 .flags  = IORESOURCE_MEM,
 108         },
 109         [1] = {
 110                 .start  = XCEP_ETH_IRQ,
 111                 .end    = XCEP_ETH_IRQ,
 112                 .flags  = IORESOURCE_IRQ,
 113         },
 114         [2] = {
 115                 .name   = "smc91x-attrib",
 116                 .start  = XCEP_ETH_ATTR,
 117                 .end    = XCEP_ETH_ATTR_END,
 118                 .flags  = IORESOURCE_MEM,
 119         },
 120 };
 121
 122 static struct smc91x_platdata xcep_smc91x_info = {
 123         .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
 124                   SMC91X_NOWAIT | SMC91X_USE_DMA,
 125 };
 126
 127 static struct platform_device smc91x_device = {
 128         .name           = "smc91x",
 129         .id             = -1,
 130         .num_resources  = ARRAY_SIZE(smc91x_resources),
 131         .resource       = smc91x_resources,
 132         .dev            = {
 133                 .platform_data = &xcep_smc91x_info,
 134         },
 135 };
 136
 137
 138 static struct platform_device *devices[] __initdata = {
 139         &flash_device,
 140         &smc91x_device,
 141 };
 142
 143
 144 /* We have to state that there are HWMON devices on the I2C bus on XCEP.
 145  * Drivers for HWMON verify capabilities of the adapter when loading and
 146  * refuse to attach if the adapter doesn't support HWMON class of devices. */
 147 static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
 148         .class = I2C_CLASS_HWMON
 149 };
 150
 151
 152 static mfp_cfg_t xcep_pin_config[] __initdata = {
 153         GPIO79_nCS_3,   /* SMC 91C111 chip select. */
 154         GPIO80_nCS_4,   /* CPLD chip select. */
 155         /* SSP communication to MSP430 */
 156         GPIO23_SSP1_SCLK,
 157         GPIO24_SSP1_SFRM,
 158         GPIO25_SSP1_TXD,
 159         GPIO26_SSP1_RXD,
 160         GPIO27_SSP1_EXTCLK
 161 };
 162
 163 static void __init xcep_init(void)
 164 {
 165         pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
 166
 167         pxa_set_ffuart_info(NULL);
 168         pxa_set_btuart_info(NULL);
 169         pxa_set_stuart_info(NULL);
 170         pxa_set_hwuart_info(NULL);
 171
 172         /* See Intel XScale Developer's Guide for details */
 173         /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
 174         __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
 175         /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
 176         __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
 177
 178         platform_add_devices(ARRAY_AND_SIZE(devices));
 179         pxa_set_i2c_info(&xcep_i2c_platform_data);
 180 }
 181
 182 MACHINE_START(XCEP, "Iskratel XCEP")
 183         .atag_offset    = 0x100,
 184         .init_machine   = xcep_init,
 185         .map_io         = pxa25x_map_io,
 186         .nr_irqs        = PXA_NR_IRQS,
 187         .init_irq       = pxa25x_init_irq,
 188         .handle_irq     = pxa25x_handle_irq,
 189         .init_time      = pxa_timer_init,
 190         .restart        = pxa_restart,
 191 MACHINE_END
 192