2 * Support for the Arcom ZEUS.
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
6 * Loosely based on Arcom's 2.6.16.28.
7 * Maintained by Marc Zyngier <maz@misterjones.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/cpufreq.h>
15 #include <linux/interrupt.h>
16 #include <linux/leds.h>
17 #include <linux/irq.h>
19 #include <linux/gpio.h>
20 #include <linux/gpio/machine.h>
21 #include <linux/serial_8250.h>
22 #include <linux/dm9000.h>
23 #include <linux/mmc/host.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/pxa2xx_spi.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/mtd/physmap.h>
29 #include <linux/i2c.h>
30 #include <linux/platform_data/i2c-pxa.h>
31 #include <linux/platform_data/pca953x.h>
32 #include <linux/apm-emulation.h>
33 #include <linux/can/platform/mcp251x.h>
34 #include <linux/regulator/fixed.h>
35 #include <linux/regulator/machine.h>
37 #include <asm/mach-types.h>
38 #include <asm/suspend.h>
39 #include <asm/system_info.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
45 #include <mach/regs-uart.h>
46 #include <linux/platform_data/usb-ohci-pxa27x.h>
47 #include <linux/platform_data/mmc-pxamci.h>
48 #include "pxa27x-udc.h"
50 #include <linux/platform_data/video-pxafb.h>
52 #include <mach/audio.h>
53 #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
55 #include <mach/smemc.h>
63 static unsigned long zeus_irq_enabled_mask
;
64 static const int zeus_isa_irqs
[] = { 3, 4, 5, 6, 7, 10, 11, 12, };
65 static const int zeus_isa_irq_map
[] = {
66 0, /* ISA irq #0, invalid */
67 0, /* ISA irq #1, invalid */
68 0, /* ISA irq #2, invalid */
69 1 << 0, /* ISA irq #3 */
70 1 << 1, /* ISA irq #4 */
71 1 << 2, /* ISA irq #5 */
72 1 << 3, /* ISA irq #6 */
73 1 << 4, /* ISA irq #7 */
74 0, /* ISA irq #8, invalid */
75 0, /* ISA irq #9, invalid */
76 1 << 5, /* ISA irq #10 */
77 1 << 6, /* ISA irq #11 */
78 1 << 7, /* ISA irq #12 */
81 static inline int zeus_irq_to_bitmask(unsigned int irq
)
83 return zeus_isa_irq_map
[irq
- PXA_ISA_IRQ(0)];
86 static inline int zeus_bit_to_irq(int bit
)
88 return zeus_isa_irqs
[bit
] + PXA_ISA_IRQ(0);
91 static void zeus_ack_irq(struct irq_data
*d
)
93 __raw_writew(zeus_irq_to_bitmask(d
->irq
), ZEUS_CPLD_ISA_IRQ
);
96 static void zeus_mask_irq(struct irq_data
*d
)
98 zeus_irq_enabled_mask
&= ~(zeus_irq_to_bitmask(d
->irq
));
101 static void zeus_unmask_irq(struct irq_data
*d
)
103 zeus_irq_enabled_mask
|= zeus_irq_to_bitmask(d
->irq
);
106 static inline unsigned long zeus_irq_pending(void)
108 return __raw_readw(ZEUS_CPLD_ISA_IRQ
) & zeus_irq_enabled_mask
;
111 static void zeus_irq_handler(struct irq_desc
*desc
)
114 unsigned long pending
;
116 pending
= zeus_irq_pending();
118 /* we're in a chained irq handler,
119 * so ack the interrupt by hand */
120 desc
->irq_data
.chip
->irq_ack(&desc
->irq_data
);
122 if (likely(pending
)) {
123 irq
= zeus_bit_to_irq(__ffs(pending
));
124 generic_handle_irq(irq
);
126 pending
= zeus_irq_pending();
130 static struct irq_chip zeus_irq_chip
= {
132 .irq_ack
= zeus_ack_irq
,
133 .irq_mask
= zeus_mask_irq
,
134 .irq_unmask
= zeus_unmask_irq
,
137 static void __init
zeus_init_irq(void)
144 /* Peripheral IRQs. It would be nice to move those inside driver
145 configuration, but it is not supported at the moment. */
146 irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO
), IRQ_TYPE_EDGE_RISING
);
147 irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO
), IRQ_TYPE_EDGE_RISING
);
148 irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO
), IRQ_TYPE_EDGE_RISING
);
149 irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO
),
150 IRQ_TYPE_EDGE_FALLING
);
151 irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO
), IRQ_TYPE_EDGE_FALLING
);
154 for (level
= 0; level
< ARRAY_SIZE(zeus_isa_irqs
); level
++) {
155 isa_irq
= zeus_bit_to_irq(level
);
156 irq_set_chip_and_handler(isa_irq
, &zeus_irq_chip
,
158 irq_clear_status_flags(isa_irq
, IRQ_NOREQUEST
| IRQ_NOPROBE
);
161 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO
), IRQ_TYPE_EDGE_RISING
);
162 irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO
), zeus_irq_handler
);
171 static struct resource zeus_mtd_resources
[] = {
172 [0] = { /* NOR Flash (up to 64MB) */
173 .start
= ZEUS_FLASH_PHYS
,
174 .end
= ZEUS_FLASH_PHYS
+ SZ_64M
- 1,
175 .flags
= IORESOURCE_MEM
,
178 .start
= ZEUS_SRAM_PHYS
,
179 .end
= ZEUS_SRAM_PHYS
+ SZ_512K
- 1,
180 .flags
= IORESOURCE_MEM
,
184 static struct physmap_flash_data zeus_flash_data
[] = {
192 static struct platform_device zeus_mtd_devices
[] = {
194 .name
= "physmap-flash",
197 .platform_data
= &zeus_flash_data
[0],
199 .resource
= &zeus_mtd_resources
[0],
205 static struct resource zeus_serial_resources
[] = {
209 .flags
= IORESOURCE_MEM
,
214 .flags
= IORESOURCE_MEM
,
219 .flags
= IORESOURCE_MEM
,
224 .flags
= IORESOURCE_MEM
,
229 .flags
= IORESOURCE_MEM
,
234 .flags
= IORESOURCE_MEM
,
238 static struct plat_serial8250_port serial_platform_data
[] = {
240 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
242 .mapbase
= 0x10000000,
243 .irq
= PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO
),
244 .irqflags
= IRQF_TRIGGER_RISING
,
247 .flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
251 .mapbase
= 0x10800000,
252 .irq
= PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO
),
253 .irqflags
= IRQF_TRIGGER_RISING
,
256 .flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
260 .mapbase
= 0x11000000,
261 .irq
= PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO
),
262 .irqflags
= IRQF_TRIGGER_RISING
,
265 .flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
269 .mapbase
= 0x11800000,
270 .irq
= PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO
),
271 .irqflags
= IRQF_TRIGGER_RISING
,
274 .flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
279 .membase
= (void *)&FFUART
,
280 .mapbase
= __PREG(FFUART
),
282 .uartclk
= 921600 * 16,
284 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
288 .membase
= (void *)&BTUART
,
289 .mapbase
= __PREG(BTUART
),
291 .uartclk
= 921600 * 16,
293 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
297 .membase
= (void *)&STUART
,
298 .mapbase
= __PREG(STUART
),
300 .uartclk
= 921600 * 16,
302 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
308 static struct platform_device zeus_serial_device
= {
309 .name
= "serial8250",
310 .id
= PLAT8250_DEV_PLATFORM
,
312 .platform_data
= serial_platform_data
,
314 .num_resources
= ARRAY_SIZE(zeus_serial_resources
),
315 .resource
= zeus_serial_resources
,
319 static struct resource zeus_dm9k0_resource
[] = {
321 .start
= ZEUS_ETH0_PHYS
,
322 .end
= ZEUS_ETH0_PHYS
+ 1,
323 .flags
= IORESOURCE_MEM
326 .start
= ZEUS_ETH0_PHYS
+ 2,
327 .end
= ZEUS_ETH0_PHYS
+ 3,
328 .flags
= IORESOURCE_MEM
331 .start
= PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO
),
332 .end
= PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO
),
333 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_LOWEDGE
,
337 static struct resource zeus_dm9k1_resource
[] = {
339 .start
= ZEUS_ETH1_PHYS
,
340 .end
= ZEUS_ETH1_PHYS
+ 1,
341 .flags
= IORESOURCE_MEM
344 .start
= ZEUS_ETH1_PHYS
+ 2,
345 .end
= ZEUS_ETH1_PHYS
+ 3,
346 .flags
= IORESOURCE_MEM
,
349 .start
= PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO
),
350 .end
= PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO
),
351 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_LOWEDGE
,
355 static struct dm9000_plat_data zeus_dm9k_platdata
= {
356 .flags
= DM9000_PLATF_16BITONLY
,
359 static struct platform_device zeus_dm9k0_device
= {
362 .num_resources
= ARRAY_SIZE(zeus_dm9k0_resource
),
363 .resource
= zeus_dm9k0_resource
,
365 .platform_data
= &zeus_dm9k_platdata
,
369 static struct platform_device zeus_dm9k1_device
= {
372 .num_resources
= ARRAY_SIZE(zeus_dm9k1_resource
),
373 .resource
= zeus_dm9k1_resource
,
375 .platform_data
= &zeus_dm9k_platdata
,
380 static struct resource zeus_sram_resource
= {
381 .start
= ZEUS_SRAM_PHYS
,
382 .end
= ZEUS_SRAM_PHYS
+ ZEUS_SRAM_SIZE
* 2 - 1,
383 .flags
= IORESOURCE_MEM
,
386 static struct platform_device zeus_sram_device
= {
387 .name
= "pxa2xx-8bit-sram",
390 .resource
= &zeus_sram_resource
,
393 /* SPI interface on SSP3 */
394 static struct pxa2xx_spi_controller pxa2xx_spi_ssp3_master_info
= {
400 static struct regulator_consumer_supply can_regulator_consumer
=
401 REGULATOR_SUPPLY("vdd", "spi3.0");
403 static struct regulator_init_data can_regulator_init_data
= {
405 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
407 .consumer_supplies
= &can_regulator_consumer
,
408 .num_consumer_supplies
= 1,
411 static struct fixed_voltage_config can_regulator_pdata
= {
412 .supply_name
= "CAN_SHDN",
413 .microvolts
= 3300000,
414 .init_data
= &can_regulator_init_data
,
417 static struct platform_device can_regulator_device
= {
418 .name
= "reg-fixed-voltage",
421 .platform_data
= &can_regulator_pdata
,
425 static struct gpiod_lookup_table can_regulator_gpiod_table
= {
426 .dev_id
= "reg-fixed-voltage.0",
428 GPIO_LOOKUP("gpio-pxa", ZEUS_CAN_SHDN_GPIO
,
429 NULL
, GPIO_ACTIVE_LOW
),
434 static struct mcp251x_platform_data zeus_mcp2515_pdata
= {
435 .oscillator_frequency
= 16*1000*1000,
438 static struct spi_board_info zeus_spi_board_info
[] = {
440 .modalias
= "mcp2515",
441 .platform_data
= &zeus_mcp2515_pdata
,
442 .irq
= PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO
),
443 .max_speed_hz
= 1*1000*1000,
451 static struct gpio_led zeus_leds
[] = {
453 .name
= "zeus:yellow:1",
454 .default_trigger
= "heartbeat",
455 .gpio
= ZEUS_EXT0_GPIO(3),
459 .name
= "zeus:yellow:2",
460 .default_trigger
= "default-on",
461 .gpio
= ZEUS_EXT0_GPIO(4),
465 .name
= "zeus:yellow:3",
466 .default_trigger
= "default-on",
467 .gpio
= ZEUS_EXT0_GPIO(5),
472 static struct gpio_led_platform_data zeus_leds_info
= {
474 .num_leds
= ARRAY_SIZE(zeus_leds
),
477 static struct platform_device zeus_leds_device
= {
481 .platform_data
= &zeus_leds_info
,
485 static void zeus_cf_reset(int state
)
487 u16 cpld_state
= __raw_readw(ZEUS_CPLD_CONTROL
);
490 cpld_state
|= ZEUS_CPLD_CONTROL_CF_RST
;
492 cpld_state
&= ~ZEUS_CPLD_CONTROL_CF_RST
;
494 __raw_writew(cpld_state
, ZEUS_CPLD_CONTROL
);
497 static struct arcom_pcmcia_pdata zeus_pcmcia_info
= {
498 .cd_gpio
= ZEUS_CF_CD_GPIO
,
499 .rdy_gpio
= ZEUS_CF_RDY_GPIO
,
500 .pwr_gpio
= ZEUS_CF_PWEN_GPIO
,
501 .reset
= zeus_cf_reset
,
504 static struct platform_device zeus_pcmcia_device
= {
505 .name
= "zeus-pcmcia",
508 .platform_data
= &zeus_pcmcia_info
,
512 static struct resource zeus_max6369_resource
= {
513 .start
= ZEUS_CPLD_EXTWDOG_PHYS
,
514 .end
= ZEUS_CPLD_EXTWDOG_PHYS
,
515 .flags
= IORESOURCE_MEM
,
518 struct platform_device zeus_max6369_device
= {
519 .name
= "max6369_wdt",
521 .resource
= &zeus_max6369_resource
,
526 static pxa2xx_audio_ops_t zeus_ac97_info
= {
535 static struct regulator_consumer_supply zeus_ohci_regulator_supplies
[] = {
536 REGULATOR_SUPPLY("vbus2", "pxa27x-ohci"),
539 static struct regulator_init_data zeus_ohci_regulator_data
= {
541 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
543 .num_consumer_supplies
= ARRAY_SIZE(zeus_ohci_regulator_supplies
),
544 .consumer_supplies
= zeus_ohci_regulator_supplies
,
547 static struct fixed_voltage_config zeus_ohci_regulator_config
= {
548 .supply_name
= "vbus2",
549 .microvolts
= 5000000, /* 5.0V */
551 .init_data
= &zeus_ohci_regulator_data
,
554 static struct platform_device zeus_ohci_regulator_device
= {
555 .name
= "reg-fixed-voltage",
558 .platform_data
= &zeus_ohci_regulator_config
,
562 static struct gpiod_lookup_table zeus_ohci_regulator_gpiod_table
= {
563 .dev_id
= "reg-fixed-voltage.0",
565 GPIO_LOOKUP("gpio-pxa", ZEUS_USB2_PWREN_GPIO
,
566 NULL
, GPIO_ACTIVE_HIGH
),
571 static struct pxaohci_platform_data zeus_ohci_platform_data
= {
572 .port_mode
= PMM_NPS_MODE
,
573 /* Clear Power Control Polarity Low and set Power Sense
574 * Polarity Low. Supply power to USB ports. */
575 .flags
= ENABLE_PORT_ALL
| POWER_SENSE_LOW
,
578 static void __init
zeus_register_ohci(void)
580 /* Port 2 is shared between host and client interface. */
581 UP2OCR
= UP2OCR_HXOE
| UP2OCR_HXS
| UP2OCR_DMPDE
| UP2OCR_DPPDE
;
583 pxa_set_ohci_info(&zeus_ohci_platform_data
);
590 static void zeus_lcd_power(int on
, struct fb_var_screeninfo
*si
)
592 gpio_set_value(ZEUS_LCD_EN_GPIO
, on
);
595 static void zeus_backlight_power(int on
)
597 gpio_set_value(ZEUS_BKLEN_GPIO
, on
);
600 static int zeus_setup_fb_gpios(void)
604 if ((err
= gpio_request(ZEUS_LCD_EN_GPIO
, "LCD_EN")))
607 if ((err
= gpio_direction_output(ZEUS_LCD_EN_GPIO
, 0)))
610 if ((err
= gpio_request(ZEUS_BKLEN_GPIO
, "BKLEN")))
613 if ((err
= gpio_direction_output(ZEUS_BKLEN_GPIO
, 0)))
619 gpio_free(ZEUS_BKLEN_GPIO
);
621 gpio_free(ZEUS_LCD_EN_GPIO
);
626 static struct pxafb_mode_info zeus_fb_mode_info
[] = {
647 static struct pxafb_mach_info zeus_fb_info
= {
648 .modes
= zeus_fb_mode_info
,
650 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
,
651 .pxafb_lcd_power
= zeus_lcd_power
,
652 .pxafb_backlight_power
= zeus_backlight_power
,
658 * The card detect interrupt isn't debounced so we delay it by 250ms
659 * to give the card a chance to fully insert/eject.
662 static struct pxamci_platform_data zeus_mci_platform_data
= {
663 .ocr_mask
= MMC_VDD_32_33
|MMC_VDD_33_34
,
664 .detect_delay_ms
= 250,
665 .gpio_card_ro_invert
= 1,
668 static struct gpiod_lookup_table zeus_mci_gpio_table
= {
669 .dev_id
= "pxa2xx-mci.0",
671 GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_CD_GPIO
,
672 "cd", GPIO_ACTIVE_LOW
),
673 GPIO_LOOKUP("gpio-pxa", ZEUS_MMC_WP_GPIO
,
674 "wp", GPIO_ACTIVE_HIGH
),
680 * USB Device Controller
682 static void zeus_udc_command(int cmd
)
685 case PXA2XX_UDC_CMD_DISCONNECT
:
686 pr_info("zeus: disconnecting USB client\n");
687 UP2OCR
= UP2OCR_HXOE
| UP2OCR_HXS
| UP2OCR_DMPDE
| UP2OCR_DPPDE
;
690 case PXA2XX_UDC_CMD_CONNECT
:
691 pr_info("zeus: connecting USB client\n");
692 UP2OCR
= UP2OCR_HXOE
| UP2OCR_DPPUE
;
697 static struct pxa2xx_udc_mach_info zeus_udc_info
= {
698 .udc_command
= zeus_udc_command
,
701 static struct platform_device
*zeus_devices
[] __initdata
= {
703 &zeus_mtd_devices
[0],
709 &zeus_max6369_device
,
710 &can_regulator_device
,
711 &zeus_ohci_regulator_device
,
715 static void zeus_power_off(void)
718 cpu_suspend(PWRMODE_DEEPSLEEP
, pxa27x_finish_suspend
);
721 #define zeus_power_off NULL
724 #ifdef CONFIG_APM_EMULATION
725 static void zeus_get_power_status(struct apm_power_info
*info
)
727 /* Power supply is always present */
728 info
->ac_line_status
= APM_AC_ONLINE
;
729 info
->battery_status
= APM_BATTERY_STATUS_NOT_PRESENT
;
730 info
->battery_flag
= APM_BATTERY_FLAG_NOT_PRESENT
;
733 static inline void zeus_setup_apm(void)
735 apm_get_power_status
= zeus_get_power_status
;
738 static inline void zeus_setup_apm(void)
743 static int zeus_get_pcb_info(struct i2c_client
*client
, unsigned gpio
,
744 unsigned ngpio
, void *context
)
749 for (i
= 0; i
< 8; i
++) {
750 int pcb_bit
= gpio
+ i
+ 8;
752 if (gpio_request(pcb_bit
, "pcb info")) {
753 dev_err(&client
->dev
, "Can't request pcb info %d\n", i
);
757 if (gpio_direction_input(pcb_bit
)) {
758 dev_err(&client
->dev
, "Can't read pcb info %d\n", i
);
763 pcb_info
|= !!gpio_get_value(pcb_bit
) << i
;
768 dev_info(&client
->dev
, "Zeus PCB version %d issue %d\n",
769 pcb_info
>> 4, pcb_info
& 0xf);
774 static struct pca953x_platform_data zeus_pca953x_pdata
[] = {
775 [0] = { .gpio_base
= ZEUS_EXT0_GPIO_BASE
, },
777 .gpio_base
= ZEUS_EXT1_GPIO_BASE
,
778 .setup
= zeus_get_pcb_info
,
780 [2] = { .gpio_base
= ZEUS_USER_GPIO_BASE
, },
783 static struct i2c_board_info __initdata zeus_i2c_devices
[] = {
785 I2C_BOARD_INFO("pca9535", 0x21),
786 .platform_data
= &zeus_pca953x_pdata
[0],
789 I2C_BOARD_INFO("pca9535", 0x22),
790 .platform_data
= &zeus_pca953x_pdata
[1],
793 I2C_BOARD_INFO("pca9535", 0x20),
794 .platform_data
= &zeus_pca953x_pdata
[2],
795 .irq
= PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO
),
797 { I2C_BOARD_INFO("lm75a", 0x48) },
798 { I2C_BOARD_INFO("24c01", 0x50) },
799 { I2C_BOARD_INFO("isl1208", 0x6f) },
802 static mfp_cfg_t zeus_pin_config
[] __initdata
= {
805 GPIO29_AC97_SDATA_IN_0
,
806 GPIO30_AC97_SDATA_OUT
,
849 GPIO36_GPIO
, /* CF CD */
850 GPIO97_GPIO
, /* CF PWREN */
851 GPIO99_GPIO
, /* CF RDY */
855 * DM9k MSCx settings: SRAM, 16 bits
856 * 17 cycles delay first access
857 * 5 cycles delay next access
858 * 13 cycles recovery time
861 #define DM9K_MSC_VALUE 0xe4c9
863 static void __init
zeus_init(void)
865 u16 dm9000_msc
= DM9K_MSC_VALUE
;
868 system_rev
= __raw_readw(ZEUS_CPLD_VERSION
);
869 pr_info("Zeus CPLD V%dI%d\n", (system_rev
& 0xf0) >> 4, (system_rev
& 0x0f));
871 /* Fix timings for dm9000s (CS1/CS2)*/
872 msc0
= (__raw_readl(MSC0
) & 0x0000ffff) | (dm9000_msc
<< 16);
873 msc1
= (__raw_readl(MSC1
) & 0xffff0000) | dm9000_msc
;
874 __raw_writel(msc0
, MSC0
);
875 __raw_writel(msc1
, MSC1
);
877 pm_power_off
= zeus_power_off
;
880 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config
));
882 gpiod_add_lookup_table(&can_regulator_gpiod_table
);
883 gpiod_add_lookup_table(&zeus_ohci_regulator_gpiod_table
);
884 platform_add_devices(zeus_devices
, ARRAY_SIZE(zeus_devices
));
886 zeus_register_ohci();
888 if (zeus_setup_fb_gpios())
889 pr_err("Failed to setup fb gpios\n");
891 pxa_set_fb_info(NULL
, &zeus_fb_info
);
893 gpiod_add_lookup_table(&zeus_mci_gpio_table
);
894 pxa_set_mci_info(&zeus_mci_platform_data
);
895 pxa_set_udc_info(&zeus_udc_info
);
896 pxa_set_ac97_info(&zeus_ac97_info
);
897 pxa_set_i2c_info(NULL
);
898 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices
));
899 pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info
);
900 spi_register_board_info(zeus_spi_board_info
, ARRAY_SIZE(zeus_spi_board_info
));
902 regulator_has_full_constraints();
905 static struct map_desc zeus_io_desc
[] __initdata
= {
907 .virtual = (unsigned long)ZEUS_CPLD_VERSION
,
908 .pfn
= __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS
),
913 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ
,
914 .pfn
= __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS
),
919 .virtual = (unsigned long)ZEUS_CPLD_CONTROL
,
920 .pfn
= __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS
),
925 .virtual = (unsigned long)ZEUS_PC104IO
,
926 .pfn
= __phys_to_pfn(ZEUS_PC104IO_PHYS
),
927 .length
= 0x00800000,
932 static void __init
zeus_map_io(void)
936 iotable_init(zeus_io_desc
, ARRAY_SIZE(zeus_io_desc
));
938 /* Clear PSPR to ensure a full restart on wake-up. */
941 /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
942 writel(readl(OSCC
) | OSCC_OON
, OSCC
);
944 /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
945 * float chip selects and PCMCIA */
946 PCFR
= PCFR_OPDE
| PCFR_DC_EN
| PCFR_FS
| PCFR_FP
;
949 MACHINE_START(ARCOM_ZEUS
, "Arcom/Eurotech ZEUS")
950 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
951 .atag_offset
= 0x100,
952 .map_io
= zeus_map_io
,
953 .nr_irqs
= ZEUS_NR_IRQS
,
954 .init_irq
= zeus_init_irq
,
955 .handle_irq
= pxa27x_handle_irq
,
956 .init_time
= pxa_timer_init
,
957 .init_machine
= zeus_init
,
958 .restart
= pxa_restart
,