arch/arm/mach-s3c64xx/mach-mini6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-mini6410.c
   2  *
   3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
   4  * Copyright 2008 Openmoko, Inc.
   5  * Copyright 2008 Simtec Electronics
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *      http://armlinux.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13 */
  14
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/fb.h>
  18 #include <linux/gpio.h>
  19 #include <linux/kernel.h>
  20 #include <linux/list.h>
  21 #include <linux/dm9000.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/partitions.h>
  24 #include <linux/serial_core.h>
  25 #include <linux/types.h>
  26
  27 #include <asm/hardware/vic.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/map.h>
  31
  32 #include <mach/map.h>
  33 #include <mach/regs-gpio.h>
  34 #include <mach/regs-modem.h>
  35 #include <mach/regs-srom.h>
  36
  37 #include <plat/adc.h>
  38 #include <plat/cpu.h>
  39 #include <plat/devs.h>
  40 #include <plat/fb.h>
  41 #include <plat/nand.h>
  42 #include <plat/regs-serial.h>
  43 #include <plat/ts.h>
  44 #include <plat/regs-fb-v4.h>
  45
  46 #include <video/platform_lcd.h>
  47
  48 #include "common.h"
  49
  50 #define UCON S3C2410_UCON_DEFAULT
  51 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  52 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  53
  54 static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = {
  55         [0] = {
  56                 .hwport = 0,
  57                 .flags  = 0,
  58                 .ucon   = UCON,
  59                 .ulcon  = ULCON,
  60                 .ufcon  = UFCON,
  61         },
  62         [1] = {
  63                 .hwport = 1,
  64                 .flags  = 0,
  65                 .ucon   = UCON,
  66                 .ulcon  = ULCON,
  67                 .ufcon  = UFCON,
  68         },
  69         [2] = {
  70                 .hwport = 2,
  71                 .flags  = 0,
  72                 .ucon   = UCON,
  73                 .ulcon  = ULCON,
  74                 .ufcon  = UFCON,
  75         },
  76         [3] = {
  77                 .hwport = 3,
  78                 .flags  = 0,
  79                 .ucon   = UCON,
  80                 .ulcon  = ULCON,
  81                 .ufcon  = UFCON,
  82         },
  83 };
  84
  85 /* DM9000AEP 10/100 ethernet controller */
  86
  87 static struct resource mini6410_dm9k_resource[] = {
  88         [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
  89         [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
  90         [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
  91                                         | IORESOURCE_IRQ_HIGHLEVEL),
  92 };
  93
  94 static struct dm9000_plat_data mini6410_dm9k_pdata = {
  95         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
  96 };
  97
  98 static struct platform_device mini6410_device_eth = {
  99         .name           = "dm9000",
 100         .id             = -1,
 101         .num_resources  = ARRAY_SIZE(mini6410_dm9k_resource),
 102         .resource       = mini6410_dm9k_resource,
 103         .dev            = {
 104                 .platform_data  = &mini6410_dm9k_pdata,
 105         },
 106 };
 107
 108 static struct mtd_partition mini6410_nand_part[] = {
 109         [0] = {
 110                 .name   = "uboot",
 111                 .size   = SZ_1M,
 112                 .offset = 0,
 113         },
 114         [1] = {
 115                 .name   = "kernel",
 116                 .size   = SZ_2M,
 117                 .offset = SZ_1M,
 118         },
 119         [2] = {
 120                 .name   = "rootfs",
 121                 .size   = MTDPART_SIZ_FULL,
 122                 .offset = SZ_1M + SZ_2M,
 123         },
 124 };
 125
 126 static struct s3c2410_nand_set mini6410_nand_sets[] = {
 127         [0] = {
 128                 .name           = "nand",
 129                 .nr_chips       = 1,
 130                 .nr_partitions  = ARRAY_SIZE(mini6410_nand_part),
 131                 .partitions     = mini6410_nand_part,
 132         },
 133 };
 134
 135 static struct s3c2410_platform_nand mini6410_nand_info = {
 136         .tacls          = 25,
 137         .twrph0         = 55,
 138         .twrph1         = 40,
 139         .nr_sets        = ARRAY_SIZE(mini6410_nand_sets),
 140         .sets           = mini6410_nand_sets,
 141 };
 142
 143 static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
 144         .max_bpp        = 32,
 145         .default_bpp    = 16,
 146         .xres           = 480,
 147         .yres           = 272,
 148 };
 149
 150 static struct fb_videomode mini6410_lcd_type0_timing = {
 151         /* 4.3" 480x272 */
 152         .left_margin    = 3,
 153         .right_margin   = 2,
 154         .upper_margin   = 1,
 155         .lower_margin   = 1,
 156         .hsync_len      = 40,
 157         .vsync_len      = 1,
 158         .xres           = 480,
 159         .yres           = 272,
 160 };
 161
 162 static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
 163         .max_bpp        = 32,
 164         .default_bpp    = 16,
 165         .xres           = 800,
 166         .yres           = 480,
 167 };
 168
 169 static struct fb_videomode mini6410_lcd_type1_timing = {
 170         /* 7.0" 800x480 */
 171         .left_margin    = 8,
 172         .right_margin   = 13,
 173         .upper_margin   = 7,
 174         .lower_margin   = 5,
 175         .hsync_len      = 3,
 176         .vsync_len      = 1,
 177         .xres           = 800,
 178         .yres           = 480,
 179 };
 180
 181 static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
 182         {
 183                 .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 184                 .vtiming        = &mini6410_lcd_type0_timing,
 185                 .win[0]         = &mini6410_lcd_type0_fb_win,
 186                 .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 187                 .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 188         }, {
 189                 .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 190                 .vtiming        = &mini6410_lcd_type1_timing,
 191                 .win[0]         = &mini6410_lcd_type1_fb_win,
 192                 .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 193                 .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 194         },
 195         { },
 196 };
 197
 198 static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
 199                                    unsigned int power)
 200 {
 201         if (power)
 202                 gpio_direction_output(S3C64XX_GPE(0), 1);
 203         else
 204                 gpio_direction_output(S3C64XX_GPE(0), 0);
 205 }
 206
 207 static struct plat_lcd_data mini6410_lcd_power_data = {
 208         .set_power      = mini6410_lcd_power_set,
 209 };
 210
 211 static struct platform_device mini6410_lcd_powerdev = {
 212         .name                   = "platform-lcd",
 213         .dev.parent             = &s3c_device_fb.dev,
 214         .dev.platform_data      = &mini6410_lcd_power_data,
 215 };
 216
 217 static struct platform_device *mini6410_devices[] __initdata = {
 218         &mini6410_device_eth,
 219         &s3c_device_hsmmc0,
 220         &s3c_device_hsmmc1,
 221         &s3c_device_ohci,
 222         &s3c_device_nand,
 223         &s3c_device_fb,
 224         &mini6410_lcd_powerdev,
 225         &s3c_device_adc,
 226         &s3c_device_ts,
 227 };
 228
 229 static void __init mini6410_map_io(void)
 230 {
 231         u32 tmp;
 232
 233         s3c64xx_init_io(NULL, 0);
 234         s3c24xx_init_clocks(12000000);
 235         s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs));
 236
 237         /* set the LCD type */
 238         tmp = __raw_readl(S3C64XX_SPCON);
 239         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 240         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 241         __raw_writel(tmp, S3C64XX_SPCON);
 242
 243         /* remove the LCD bypass */
 244         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 245         tmp &= ~MIFPCON_LCD_BYPASS;
 246         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 247 }
 248
 249 /*
 250  * mini6410_features string
 251  *
 252  * 0-9 LCD configuration
 253  *
 254  */
 255 static char mini6410_features_str[12] __initdata = "0";
 256
 257 static int __init mini6410_features_setup(char *str)
 258 {
 259         if (str)
 260                 strlcpy(mini6410_features_str, str,
 261                         sizeof(mini6410_features_str));
 262         return 1;
 263 }
 264
 265 __setup("mini6410=", mini6410_features_setup);
 266
 267 #define FEATURE_SCREEN (1 << 0)
 268
 269 struct mini6410_features_t {
 270         int done;
 271         int lcd_index;
 272 };
 273
 274 static void mini6410_parse_features(
 275                 struct mini6410_features_t *features,
 276                 const char *features_str)
 277 {
 278         const char *fp = features_str;
 279
 280         features->done = 0;
 281         features->lcd_index = 0;
 282
 283         while (*fp) {
 284                 char f = *fp++;
 285
 286                 switch (f) {
 287                 case '0'...'9': /* tft screen */
 288                         if (features->done & FEATURE_SCREEN) {
 289                                 printk(KERN_INFO "MINI6410: '%c' ignored, "
 290                                         "screen type already set\n", f);
 291                         } else {
 292                                 int li = f - '0';
 293                                 if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
 294                                         printk(KERN_INFO "MINI6410: '%c' out "
 295                                                 "of range LCD mode\n", f);
 296                                 else {
 297                                         features->lcd_index = li;
 298                                 }
 299                         }
 300                         features->done |= FEATURE_SCREEN;
 301                         break;
 302                 }
 303         }
 304 }
 305
 306 static void __init mini6410_machine_init(void)
 307 {
 308         u32 cs1;
 309         struct mini6410_features_t features = { 0 };
 310
 311         printk(KERN_INFO "MINI6410: Option string mini6410=%s\n",
 312                         mini6410_features_str);
 313
 314         /* Parse the feature string */
 315         mini6410_parse_features(&features, mini6410_features_str);
 316
 317         printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
 318                 mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
 319                 mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
 320
 321         s3c_nand_set_platdata(&mini6410_nand_info);
 322         s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
 323         s3c24xx_ts_set_platdata(NULL);
 324
 325         /* configure nCS1 width to 16 bits */
 326
 327         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 328                 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 329         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 330                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 331                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 332                         S3C64XX_SROM_BW__NCS1__SHIFT;
 333         __raw_writel(cs1, S3C64XX_SROM_BW);
 334
 335         /* set timing for nCS1 suitable for ethernet chip */
 336
 337         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 338                 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 339                 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 340                 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 341                 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
 342                 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 343                 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 344
 345         gpio_request(S3C64XX_GPF(15), "LCD power");
 346         gpio_request(S3C64XX_GPE(0), "LCD power");
 347
 348         platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices));
 349 }
 350
 351 MACHINE_START(MINI6410, "MINI6410")
 352         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
 353         .atag_offset    = 0x100,
 354         .init_irq       = s3c6410_init_irq,
 355         .handle_irq     = vic_handle_irq,
 356         .map_io         = mini6410_map_io,
 357         .init_machine   = mini6410_machine_init,
 358         .init_late      = s3c64xx_init_late,
 359         .timer          = &s3c24xx_timer,
 360         .restart        = s3c64xx_restart,
 361 MACHINE_END