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Merge branch 'driver-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git...
[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-s3c64xx / s3c6410.c
1 /* linux/arch/arm/mach-s3c64xx/s3c6410.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/device.h>
22 #include <linux/serial_core.h>
23 #include <linux/platform_device.h>
24
25 #include <asm/mach/arch.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach/irq.h>
28
29 #include <mach/hardware.h>
30 #include <asm/irq.h>
31
32 #include <plat/cpu-freq.h>
33 #include <plat/regs-serial.h>
34 #include <mach/regs-clock.h>
35
36 #include <plat/cpu.h>
37 #include <plat/devs.h>
38 #include <plat/clock.h>
39 #include <plat/sdhci.h>
40 #include <plat/ata-core.h>
41 #include <plat/adc-core.h>
42 #include <plat/iic-core.h>
43 #include <plat/onenand-core.h>
44
45 #include "common.h"
46
47 void __init s3c6410_map_io(void)
48 {
49 /* initialise device information early */
50 s3c6410_default_sdhci0();
51 s3c6410_default_sdhci1();
52 s3c6410_default_sdhci2();
53
54 /* the i2c devices are directly compatible with s3c2440 */
55 s3c_i2c0_setname("s3c2440-i2c");
56 s3c_i2c1_setname("s3c2440-i2c");
57
58 s3c_adc_setname("s3c64xx-adc");
59 s3c_device_nand.name = "s3c6400-nand";
60 s3c_onenand_setname("s3c6410-onenand");
61 s3c64xx_onenand1_setname("s3c6410-onenand");
62 s3c_cfcon_setname("s3c64xx-pata");
63 }
64
65 void __init s3c6410_init_clocks(int xtal)
66 {
67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
69 s3c64xx_setup_clocks();
70 }
71
72 void __init s3c6410_init_irq(void)
73 {
74 /* VIC0 is missing IRQ7, VIC1 is fully populated. */
75 s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
76 }
77
78 struct bus_type s3c6410_subsys = {
79 .name = "s3c6410-core",
80 .dev_name = "s3c6410-core",
81 };
82
83 static struct device s3c6410_dev = {
84 .bus = &s3c6410_subsys,
85 };
86
87 static int __init s3c6410_core_init(void)
88 {
89 return subsys_system_register(&s3c6410_subsys, NULL);
90 }
91
92 core_initcall(s3c6410_core_init);
93
94 int __init s3c6410_init(void)
95 {
96 printk("S3C6410: Initialising architecture\n");
97
98 return device_register(&s3c6410_dev);
99 }