2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
16 #include <linux/platform_device.h>
19 #include <plat/regs-usb-hsotg-phy.h>
20 #include <plat/usb-phy.h>
24 static int s3c_usb_otgphy_init(struct platform_device
*pdev
)
29 writel(readl(S3C64XX_OTHERS
) | S3C64XX_OTHERS_USBMASK
, S3C64XX_OTHERS
);
31 /* set clock frequency for PLL */
32 phyclk
= readl(S3C_PHYCLK
) & ~S3C_PHYCLK_CLKSEL_MASK
;
34 xusbxti
= clk_get(&pdev
->dev
, "xusbxti");
35 if (xusbxti
&& !IS_ERR(xusbxti
)) {
36 switch (clk_get_rate(xusbxti
)) {
38 phyclk
|= S3C_PHYCLK_CLKSEL_12M
;
41 phyclk
|= S3C_PHYCLK_CLKSEL_24M
;
45 /* default reference clock */
51 /* TODO: select external clock/oscillator */
52 writel(phyclk
| S3C_PHYCLK_CLK_FORCE
, S3C_PHYCLK
);
54 /* set to normal OTG PHY */
55 writel((readl(S3C_PHYPWR
) & ~S3C_PHYPWR_NORMAL_MASK
), S3C_PHYPWR
);
58 /* reset OTG PHY and Link */
59 writel(S3C_RSTCON_PHY
| S3C_RSTCON_HCLK
| S3C_RSTCON_PHYCLK
,
61 udelay(20); /* at-least 10uS */
62 writel(0, S3C_RSTCON
);
67 static int s3c_usb_otgphy_exit(struct platform_device
*pdev
)
69 writel((readl(S3C_PHYPWR
) | S3C_PHYPWR_ANALOG_POWERDOWN
|
70 S3C_PHYPWR_OTG_DISABLE
), S3C_PHYPWR
);
72 writel(readl(S3C64XX_OTHERS
) & ~S3C64XX_OTHERS_USBMASK
, S3C64XX_OTHERS
);
77 int s5p_usb_phy_init(struct platform_device
*pdev
, int type
)
79 if (type
== S5P_USB_PHY_DEVICE
)
80 return s3c_usb_otgphy_init(pdev
);
85 int s5p_usb_phy_exit(struct platform_device
*pdev
, int type
)
87 if (type
== S5P_USB_PHY_DEVICE
)
88 return s3c_usb_otgphy_exit(pdev
);