arch/arm/mach-s5p6442/include/mach/map.h

   1 /* linux/arch/arm/mach-s5p6442/include/mach/map.h
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * S5P6442 - Memory map definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #ifndef __ASM_ARCH_MAP_H
  14 #define __ASM_ARCH_MAP_H __FILE__
  15
  16 #include <plat/map-base.h>
  17 #include <plat/map-s5p.h>
  18
  19 #define S5P6442_PA_CHIPID       (0xE0000000)
  20 #define S5P_PA_CHIPID           S5P6442_PA_CHIPID
  21
  22 #define S5P6442_PA_SYSCON       (0xE0100000)
  23 #define S5P_PA_SYSCON           S5P6442_PA_SYSCON
  24
  25 #define S5P6442_PA_GPIO         (0xE0200000)
  26
  27 #define S5P6442_PA_VIC0         (0xE4000000)
  28 #define S5P6442_PA_VIC1         (0xE4100000)
  29 #define S5P6442_PA_VIC2         (0xE4200000)
  30
  31 #define S5P6442_PA_SROMC        (0xE7000000)
  32 #define S5P_PA_SROMC            S5P6442_PA_SROMC
  33
  34 #define S5P6442_PA_MDMA         0xE8000000
  35 #define S5P6442_PA_PDMA         0xE9000000
  36
  37 #define S5P6442_PA_TIMER        (0xEA000000)
  38 #define S5P_PA_TIMER            S5P6442_PA_TIMER
  39
  40 #define S5P6442_PA_SYSTIMER     (0xEA100000)
  41
  42 #define S5P6442_PA_WATCHDOG     (0xEA200000)
  43
  44 #define S5P6442_PA_UART         (0xEC000000)
  45
  46 #define S5P_PA_UART0            (S5P6442_PA_UART + 0x0)
  47 #define S5P_PA_UART1            (S5P6442_PA_UART + 0x400)
  48 #define S5P_PA_UART2            (S5P6442_PA_UART + 0x800)
  49 #define S5P_SZ_UART             SZ_256
  50
  51 #define S5P6442_PA_IIC0         (0xEC100000)
  52
  53 #define S5P6442_PA_SDRAM        (0x20000000)
  54 #define S5P_PA_SDRAM            S5P6442_PA_SDRAM
  55
  56 #define S5P6442_PA_SPI          0xEC300000
  57
  58 /* I2S */
  59 #define S5P6442_PA_I2S0         0xC0B00000
  60 #define S5P6442_PA_I2S1         0xF2200000
  61
  62 /* PCM */
  63 #define S5P6442_PA_PCM0         0xF2400000
  64 #define S5P6442_PA_PCM1         0xF2500000
  65
  66 /* compatibiltiy defines. */
  67 #define S3C_PA_WDT              S5P6442_PA_WATCHDOG
  68 #define S3C_PA_UART             S5P6442_PA_UART
  69 #define S3C_PA_IIC              S5P6442_PA_IIC0
  70
  71 #endif /* __ASM_ARCH_MAP_H */