arch/arm/mach-sa1100/assabet.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/assabet.c
   3  *
   4  * Author: Nicolas Pitre
   5  *
   6  * This file contains all Assabet-specific tweaks.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/errno.h>
  16 #include <linux/ioport.h>
  17 #include <linux/serial_core.h>
  18 #include <linux/mfd/ucb1x00.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/delay.h>
  22 #include <linux/mm.h>
  23
  24 #include <mach/hardware.h>
  25 #include <asm/mach-types.h>
  26 #include <asm/irq.h>
  27 #include <asm/setup.h>
  28 #include <asm/page.h>
  29 #include <asm/pgtable-hwdef.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/tlbflush.h>
  32
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/flash.h>
  35 #include <asm/mach/irda.h>
  36 #include <asm/mach/map.h>
  37 #include <asm/mach/serial_sa1100.h>
  38 #include <mach/assabet.h>
  39 #include <mach/mcp.h>
  40
  41 #include "generic.h"
  42
  43 #define ASSABET_BCR_DB1110 \
  44         (ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
  45          ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  46          ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  47          ASSABET_BCR_IRDA_MD0)
  48
  49 #define ASSABET_BCR_DB1111 \
  50         (ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
  51          ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  52          ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  53          ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  54          ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
  55
  56 unsigned long SCR_value = ASSABET_SCR_INIT;
  57 EXPORT_SYMBOL(SCR_value);
  58
  59 static unsigned long BCR_value = ASSABET_BCR_DB1110;
  60
  61 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  62 {
  63         unsigned long flags;
  64
  65         local_irq_save(flags);
  66         BCR_value = (BCR_value & ~mask) | val;
  67         ASSABET_BCR = BCR_value;
  68         local_irq_restore(flags);
  69 }
  70
  71 EXPORT_SYMBOL(ASSABET_BCR_frob);
  72
  73 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  74 {
  75         if (state == UCB_RST_PROBE)
  76                 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  77 }
  78
  79
  80 static void assabet_backlight_power(int on)
  81 {
  82 #ifndef ASSABET_PAL_VIDEO
  83         if (on)
  84                 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  85         else
  86 #endif
  87                 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  88 }
  89
  90 /*
  91  * Turn on/off the backlight.  When turning the backlight on,
  92  * we wait 500us after turning it on so we don't cause the
  93  * supplies to droop when we enable the LCD controller (and
  94  * cause a hard reset.)
  95  */
  96 static void assabet_lcd_power(int on)
  97 {
  98 #ifndef ASSABET_PAL_VIDEO
  99         if (on) {
 100                 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
 101                 udelay(500);
 102         } else
 103 #endif
 104                 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 105 }
 106
 107
 108 /*
 109  * Assabet flash support code.
 110  */
 111
 112 #ifdef ASSABET_REV_4
 113 /*
 114  * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
 115  */
 116 static struct mtd_partition assabet_partitions[] = {
 117         {
 118                 .name           = "bootloader",
 119                 .size           = 0x00020000,
 120                 .offset         = 0,
 121                 .mask_flags     = MTD_WRITEABLE,
 122         }, {
 123                 .name           = "bootloader params",
 124                 .size           = 0x00020000,
 125                 .offset         = MTDPART_OFS_APPEND,
 126                 .mask_flags     = MTD_WRITEABLE,
 127         }, {
 128                 .name           = "jffs",
 129                 .size           = MTDPART_SIZ_FULL,
 130                 .offset         = MTDPART_OFS_APPEND,
 131         }
 132 };
 133 #else
 134 /*
 135  * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 136  */
 137 static struct mtd_partition assabet_partitions[] = {
 138         {
 139                 .name           = "bootloader",
 140                 .size           = 0x00040000,
 141                 .offset         = 0,
 142                 .mask_flags     = MTD_WRITEABLE,
 143         }, {
 144                 .name           = "bootloader params",
 145                 .size           = 0x00040000,
 146                 .offset         = MTDPART_OFS_APPEND,
 147                 .mask_flags     = MTD_WRITEABLE,
 148         }, {
 149                 .name           = "jffs",
 150                 .size           = MTDPART_SIZ_FULL,
 151                 .offset         = MTDPART_OFS_APPEND,
 152         }
 153 };
 154 #endif
 155
 156 static struct flash_platform_data assabet_flash_data = {
 157         .map_name       = "cfi_probe",
 158         .parts          = assabet_partitions,
 159         .nr_parts       = ARRAY_SIZE(assabet_partitions),
 160 };
 161
 162 static struct resource assabet_flash_resources[] = {
 163         {
 164                 .start  = SA1100_CS0_PHYS,
 165                 .end    = SA1100_CS0_PHYS + SZ_32M - 1,
 166                 .flags  = IORESOURCE_MEM,
 167         }, {
 168                 .start  = SA1100_CS1_PHYS,
 169                 .end    = SA1100_CS1_PHYS + SZ_32M - 1,
 170                 .flags  = IORESOURCE_MEM,
 171         }
 172 };
 173
 174
 175 /*
 176  * Assabet IrDA support code.
 177  */
 178
 179 static int assabet_irda_set_power(struct device *dev, unsigned int state)
 180 {
 181         static unsigned int bcr_state[4] = {
 182                 ASSABET_BCR_IRDA_MD0,
 183                 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
 184                 ASSABET_BCR_IRDA_MD1,
 185                 0
 186         };
 187
 188         if (state < 4) {
 189                 state = bcr_state[state];
 190                 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
 191                                            ASSABET_BCR_IRDA_MD0));
 192                 ASSABET_BCR_set(state);
 193         }
 194         return 0;
 195 }
 196
 197 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
 198 {
 199         if (speed < 4000000)
 200                 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
 201         else
 202                 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
 203 }
 204
 205 static struct irda_platform_data assabet_irda_data = {
 206         .set_power      = assabet_irda_set_power,
 207         .set_speed      = assabet_irda_set_speed,
 208 };
 209
 210 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
 211         .reset          = assabet_ucb1x00_reset,
 212         .gpio_base      = -1,
 213 };
 214
 215 static struct mcp_plat_data assabet_mcp_data = {
 216         .mccr0          = MCCR0_ADM,
 217         .sclk_rate      = 11981000,
 218         .codec_pdata    = &assabet_ucb1x00_data,
 219 };
 220
 221 static void __init assabet_init(void)
 222 {
 223         /*
 224          * Ensure that the power supply is in "high power" mode.
 225          */
 226         GPDR |= GPIO_GPIO16;
 227         GPSR = GPIO_GPIO16;
 228
 229         /*
 230          * Ensure that these pins are set as outputs and are driving
 231          * logic 0.  This ensures that we won't inadvertently toggle
 232          * the WS latch in the CPLD, and we don't float causing
 233          * excessive power drain.  --rmk
 234          */
 235         GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 236         GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 237
 238         /*
 239          * Set up registers for sleep mode.
 240          */
 241         PWER = PWER_GPIO0;
 242         PGSR = 0;
 243         PCFR = 0;
 244         PSDR = 0;
 245         PPDR |= PPC_TXD3 | PPC_TXD1;
 246         PPSR |= PPC_TXD3 | PPC_TXD1;
 247
 248         sa11x0_ppc_configure_mcp();
 249
 250         sa1100fb_lcd_power = assabet_lcd_power;
 251         sa1100fb_backlight_power = assabet_backlight_power;
 252
 253         if (machine_has_neponset()) {
 254                 /*
 255                  * Angel sets this, but other bootloaders may not.
 256                  *
 257                  * This must precede any driver calls to BCR_set()
 258                  * or BCR_clear().
 259                  */
 260                 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
 261
 262 #ifndef CONFIG_ASSABET_NEPONSET
 263                 printk( "Warning: Neponset detected but full support "
 264                         "hasn't been configured in the kernel\n" );
 265 #endif
 266         }
 267
 268         sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
 269                             ARRAY_SIZE(assabet_flash_resources));
 270         sa11x0_register_irda(&assabet_irda_data);
 271         sa11x0_register_mcp(&assabet_mcp_data);
 272 }
 273
 274 /*
 275  * On Assabet, we must probe for the Neponset board _before_
 276  * paging_init() has occurred to actually determine the amount
 277  * of RAM available.  To do so, we map the appropriate IO section
 278  * in the page table here in order to access GPIO registers.
 279  */
 280 static void __init map_sa1100_gpio_regs( void )
 281 {
 282         unsigned long phys = __PREG(GPLR) & PMD_MASK;
 283         unsigned long virt = io_p2v(phys);
 284         int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
 285         pmd_t *pmd;
 286
 287         pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
 288         *pmd = __pmd(phys | prot);
 289         flush_pmd_entry(pmd);
 290 }
 291
 292 /*
 293  * Read System Configuration "Register"
 294  * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 295  * User's Guide", section 4.4.1)
 296  *
 297  * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 298  * to set up the serial port for decompression status messages. We
 299  * repeat it here because the kernel may not be loaded as a zImage, and
 300  * also because it's a hassle to communicate the SCR value to the kernel
 301  * from the decompressor.
 302  *
 303  * Note that IRQs are guaranteed to be disabled.
 304  */
 305 static void __init get_assabet_scr(void)
 306 {
 307         unsigned long scr, i;
 308
 309         GPDR |= 0x3fc;                  /* Configure GPIO 9:2 as outputs */
 310         GPSR = 0x3fc;                   /* Write 0xFF to GPIO 9:2 */
 311         GPDR &= ~(0x3fc);               /* Configure GPIO 9:2 as inputs */
 312         for(i = 100; i--; )             /* Read GPIO 9:2 */
 313                 scr = GPLR;
 314         GPDR |= 0x3fc;                  /*  restore correct pin direction */
 315         scr &= 0x3fc;                   /* save as system configuration byte. */
 316         SCR_value = scr;
 317 }
 318
 319 static void __init
 320 fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
 321 {
 322         /* This must be done before any call to machine_has_neponset() */
 323         map_sa1100_gpio_regs();
 324         get_assabet_scr();
 325
 326         if (machine_has_neponset())
 327                 printk("Neponset expansion board detected\n");
 328 }
 329
 330
 331 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 332 {
 333         if (port->mapbase == _Ser1UTCR0) {
 334                 if (state)
 335                         ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
 336                                           ASSABET_BCR_COM_RTS |
 337                                           ASSABET_BCR_COM_DTR);
 338                 else
 339                         ASSABET_BCR_set(ASSABET_BCR_RS232EN |
 340                                         ASSABET_BCR_COM_RTS |
 341                                         ASSABET_BCR_COM_DTR);
 342         }
 343 }
 344
 345 /*
 346  * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 347  * and UART3 (radio module).  We only handle them for UART1 here.
 348  */
 349 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
 350 {
 351         if (port->mapbase == _Ser1UTCR0) {
 352                 u_int set = 0, clear = 0;
 353
 354                 if (mctrl & TIOCM_RTS)
 355                         clear |= ASSABET_BCR_COM_RTS;
 356                 else
 357                         set |= ASSABET_BCR_COM_RTS;
 358
 359                 if (mctrl & TIOCM_DTR)
 360                         clear |= ASSABET_BCR_COM_DTR;
 361                 else
 362                         set |= ASSABET_BCR_COM_DTR;
 363
 364                 ASSABET_BCR_clear(clear);
 365                 ASSABET_BCR_set(set);
 366         }
 367 }
 368
 369 static u_int assabet_get_mctrl(struct uart_port *port)
 370 {
 371         u_int ret = 0;
 372         u_int bsr = ASSABET_BSR;
 373
 374         /* need 2 reads to read current value */
 375         bsr = ASSABET_BSR;
 376
 377         if (port->mapbase == _Ser1UTCR0) {
 378                 if (bsr & ASSABET_BSR_COM_DCD)
 379                         ret |= TIOCM_CD;
 380                 if (bsr & ASSABET_BSR_COM_CTS)
 381                         ret |= TIOCM_CTS;
 382                 if (bsr & ASSABET_BSR_COM_DSR)
 383                         ret |= TIOCM_DSR;
 384         } else if (port->mapbase == _Ser3UTCR0) {
 385                 if (bsr & ASSABET_BSR_RAD_DCD)
 386                         ret |= TIOCM_CD;
 387                 if (bsr & ASSABET_BSR_RAD_CTS)
 388                         ret |= TIOCM_CTS;
 389                 if (bsr & ASSABET_BSR_RAD_DSR)
 390                         ret |= TIOCM_DSR;
 391                 if (bsr & ASSABET_BSR_RAD_RI)
 392                         ret |= TIOCM_RI;
 393         } else {
 394                 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 395         }
 396
 397         return ret;
 398 }
 399
 400 static struct sa1100_port_fns assabet_port_fns __initdata = {
 401         .set_mctrl      = assabet_set_mctrl,
 402         .get_mctrl      = assabet_get_mctrl,
 403         .pm             = assabet_uart_pm,
 404 };
 405
 406 static struct map_desc assabet_io_desc[] __initdata = {
 407         {       /* Board Control Register */
 408                 .virtual        =  0xf1000000,
 409                 .pfn            = __phys_to_pfn(0x12000000),
 410                 .length         = 0x00100000,
 411                 .type           = MT_DEVICE
 412         }, {    /* MQ200 */
 413                 .virtual        =  0xf2800000,
 414                 .pfn            = __phys_to_pfn(0x4b800000),
 415                 .length         = 0x00800000,
 416                 .type           = MT_DEVICE
 417         }
 418 };
 419
 420 static void __init assabet_map_io(void)
 421 {
 422         sa1100_map_io();
 423         iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 424
 425         /*
 426          * Set SUS bit in SDCR0 so serial port 1 functions.
 427          * Its called GPCLKR0 in my SA1110 manual.
 428          */
 429         Ser1SDCR0 |= SDCR0_SUS;
 430
 431         if (machine_has_neponset()) {
 432 #ifdef CONFIG_ASSABET_NEPONSET
 433                 extern void neponset_map_io(void);
 434
 435                 /*
 436                  * We map Neponset registers even if it isn't present since
 437                  * many drivers will try to probe their stuff (and fail).
 438                  * This is still more friendly than a kernel paging request
 439                  * crash.
 440                  */
 441                 neponset_map_io();
 442 #endif
 443         } else {
 444                 sa1100_register_uart_fns(&assabet_port_fns);
 445         }
 446
 447         /*
 448          * When Neponset is attached, the first UART should be
 449          * UART3.  That's what Angel is doing and many documents
 450          * are stating this.
 451          *
 452          * We do the Neponset mapping even if Neponset support
 453          * isn't compiled in so the user will still get something on
 454          * the expected physical serial port.
 455          *
 456          * We no longer do this; not all boot loaders support it,
 457          * and UART3 appears to be somewhat unreliable with blob.
 458          */
 459         sa1100_register_uart(0, 1);
 460         sa1100_register_uart(2, 3);
 461 }
 462
 463
 464 MACHINE_START(ASSABET, "Intel-Assabet")
 465         .atag_offset    = 0x100,
 466         .fixup          = fixup_assabet,
 467         .map_io         = assabet_map_io,
 468         .init_irq       = sa1100_init_irq,
 469         .timer          = &sa1100_timer,
 470         .init_machine   = assabet_init,
 471 #ifdef CONFIG_SA1111
 472         .dma_zone_size  = SZ_1M,
 473 #endif
 474         .restart        = sa11x0_restart,
 475 MACHINE_END