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[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-shmobile / board-ap4evb.c
1 /*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/clk.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/mfd/tmio.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sh_mobile_sdhi.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/mmc/sh_mmcif.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c/tsc2007.h>
36 #include <linux/io.h>
37 #include <linux/smsc911x.h>
38 #include <linux/sh_intc.h>
39 #include <linux/sh_clk.h>
40 #include <linux/gpio.h>
41 #include <linux/input.h>
42 #include <linux/leds.h>
43 #include <linux/input/sh_keysc.h>
44 #include <linux/usb/r8a66597.h>
45 #include <linux/pm_clock.h>
46 #include <linux/dma-mapping.h>
47
48 #include <media/sh_mobile_ceu.h>
49 #include <media/sh_mobile_csi2.h>
50 #include <media/soc_camera.h>
51
52 #include <sound/sh_fsi.h>
53
54 #include <video/sh_mobile_hdmi.h>
55 #include <video/sh_mobile_lcdc.h>
56 #include <video/sh_mipi_dsi.h>
57
58 #include <mach/common.h>
59 #include <mach/irqs.h>
60 #include <mach/sh7372.h>
61
62 #include <asm/mach-types.h>
63 #include <asm/mach/arch.h>
64 #include <asm/mach/map.h>
65 #include <asm/mach/time.h>
66 #include <asm/setup.h>
67
68 /*
69 * Address Interface BusWidth note
70 * ------------------------------------------------------------------
71 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
72 * 0x0800_0000 user area -
73 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
74 * 0x1400_0000 Ether (LAN9220) 16bit
75 * 0x1600_0000 user area - cannot use with NAND
76 * 0x1800_0000 user area -
77 * 0x1A00_0000 -
78 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
79 */
80
81 /*
82 * NOR Flash ROM
83 *
84 * SW1 | SW2 | SW7 | NOR Flash ROM
85 * bit1 | bit1 bit2 | bit1 | Memory allocation
86 * ------+------------+------+------------------
87 * OFF | ON OFF | ON | Area 0
88 * OFF | ON OFF | OFF | Area 4
89 */
90
91 /*
92 * NAND Flash ROM
93 *
94 * SW1 | SW2 | SW7 | NAND Flash ROM
95 * bit1 | bit1 bit2 | bit2 | Memory allocation
96 * ------+------------+------+------------------
97 * OFF | ON OFF | ON | FCE 0
98 * OFF | ON OFF | OFF | FCE 1
99 */
100
101 /*
102 * SMSC 9220
103 *
104 * SW1 SMSC 9220
105 * -----------------------
106 * ON access disable
107 * OFF access enable
108 */
109
110 /*
111 * LCD / IRQ / KEYSC / IrDA
112 *
113 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
114 * LCD = 2nd LCDC (WVGA)
115 *
116 * | SW43 |
117 * SW3 | ON | OFF |
118 * -------------+-----------------------+---------------+
119 * ON | KEY / IrDA | LCD |
120 * OFF | KEY / IrDA / IRQ | IRQ |
121 *
122 *
123 * QHD / WVGA display
124 *
125 * You can choice display type on menuconfig.
126 * Then, check above dip-switch.
127 */
128
129 /*
130 * USB
131 *
132 * J7 : 1-2 MAX3355E VBUS
133 * 2-3 DC 5.0V
134 *
135 * S39: bit2: off
136 */
137
138 /*
139 * FSI/FSMI
140 *
141 * SW41 : ON : SH-Mobile AP4 Audio Mode
142 * : OFF : Bluetooth Audio Mode
143 */
144
145 /*
146 * MMC0/SDHI1 (CN7)
147 *
148 * J22 : select card voltage
149 * 1-2 pin : 1.8v
150 * 2-3 pin : 3.3v
151 *
152 * SW1 | SW33
153 * | bit1 | bit2 | bit3 | bit4
154 * ------------+------+------+------+-------
155 * MMC0 OFF | OFF | ON | ON | X
156 * SDHI1 OFF | ON | X | OFF | ON
157 *
158 * voltage lebel
159 * CN7 : 1.8v
160 * CN12: 3.3v
161 */
162
163 /* MTD */
164 static struct mtd_partition nor_flash_partitions[] = {
165 {
166 .name = "loader",
167 .offset = 0x00000000,
168 .size = 512 * 1024,
169 .mask_flags = MTD_WRITEABLE,
170 },
171 {
172 .name = "bootenv",
173 .offset = MTDPART_OFS_APPEND,
174 .size = 512 * 1024,
175 .mask_flags = MTD_WRITEABLE,
176 },
177 {
178 .name = "kernel_ro",
179 .offset = MTDPART_OFS_APPEND,
180 .size = 8 * 1024 * 1024,
181 .mask_flags = MTD_WRITEABLE,
182 },
183 {
184 .name = "kernel",
185 .offset = MTDPART_OFS_APPEND,
186 .size = 8 * 1024 * 1024,
187 },
188 {
189 .name = "data",
190 .offset = MTDPART_OFS_APPEND,
191 .size = MTDPART_SIZ_FULL,
192 },
193 };
194
195 static struct physmap_flash_data nor_flash_data = {
196 .width = 2,
197 .parts = nor_flash_partitions,
198 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
199 };
200
201 static struct resource nor_flash_resources[] = {
202 [0] = {
203 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
204 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
205 .flags = IORESOURCE_MEM,
206 }
207 };
208
209 static struct platform_device nor_flash_device = {
210 .name = "physmap-flash",
211 .dev = {
212 .platform_data = &nor_flash_data,
213 },
214 .num_resources = ARRAY_SIZE(nor_flash_resources),
215 .resource = nor_flash_resources,
216 };
217
218 /* SMSC 9220 */
219 static struct resource smc911x_resources[] = {
220 {
221 .start = 0x14000000,
222 .end = 0x16000000 - 1,
223 .flags = IORESOURCE_MEM,
224 }, {
225 .start = evt2irq(0x02c0) /* IRQ6A */,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
227 },
228 };
229
230 static struct smsc911x_platform_config smsc911x_info = {
231 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
232 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
233 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
234 };
235
236 static struct platform_device smc911x_device = {
237 .name = "smsc911x",
238 .id = -1,
239 .num_resources = ARRAY_SIZE(smc911x_resources),
240 .resource = smc911x_resources,
241 .dev = {
242 .platform_data = &smsc911x_info,
243 },
244 };
245
246 /*
247 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
248 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
249 */
250 static int slot_cn7_get_cd(struct platform_device *pdev)
251 {
252 return !gpio_get_value(GPIO_PORT41);
253 }
254 /* MERAM */
255 static struct sh_mobile_meram_info meram_info = {
256 .addr_mode = SH_MOBILE_MERAM_MODE1,
257 };
258
259 static struct resource meram_resources[] = {
260 [0] = {
261 .name = "MERAM",
262 .start = 0xe8000000,
263 .end = 0xe81fffff,
264 .flags = IORESOURCE_MEM,
265 },
266 };
267
268 static struct platform_device meram_device = {
269 .name = "sh_mobile_meram",
270 .id = 0,
271 .num_resources = ARRAY_SIZE(meram_resources),
272 .resource = meram_resources,
273 .dev = {
274 .platform_data = &meram_info,
275 },
276 };
277
278 /* SH_MMCIF */
279 static struct resource sh_mmcif_resources[] = {
280 [0] = {
281 .name = "MMCIF",
282 .start = 0xE6BD0000,
283 .end = 0xE6BD00FF,
284 .flags = IORESOURCE_MEM,
285 },
286 [1] = {
287 /* MMC ERR */
288 .start = evt2irq(0x1ac0),
289 .flags = IORESOURCE_IRQ,
290 },
291 [2] = {
292 /* MMC NOR */
293 .start = evt2irq(0x1ae0),
294 .flags = IORESOURCE_IRQ,
295 },
296 };
297
298 static struct sh_mmcif_dma sh_mmcif_dma = {
299 .chan_priv_rx = {
300 .slave_id = SHDMA_SLAVE_MMCIF_RX,
301 },
302 .chan_priv_tx = {
303 .slave_id = SHDMA_SLAVE_MMCIF_TX,
304 },
305 };
306
307 static struct sh_mmcif_plat_data sh_mmcif_plat = {
308 .sup_pclk = 0,
309 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
310 .caps = MMC_CAP_4_BIT_DATA |
311 MMC_CAP_8_BIT_DATA |
312 MMC_CAP_NEEDS_POLL,
313 .get_cd = slot_cn7_get_cd,
314 .dma = &sh_mmcif_dma,
315 };
316
317 static struct platform_device sh_mmcif_device = {
318 .name = "sh_mmcif",
319 .id = 0,
320 .dev = {
321 .dma_mask = NULL,
322 .coherent_dma_mask = 0xffffffff,
323 .platform_data = &sh_mmcif_plat,
324 },
325 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
326 .resource = sh_mmcif_resources,
327 };
328
329 /* SDHI0 */
330 static struct sh_mobile_sdhi_info sdhi0_info = {
331 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
332 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
333 .tmio_caps = MMC_CAP_SDIO_IRQ,
334 };
335
336 static struct resource sdhi0_resources[] = {
337 [0] = {
338 .name = "SDHI0",
339 .start = 0xe6850000,
340 .end = 0xe68500ff,
341 .flags = IORESOURCE_MEM,
342 },
343 [1] = {
344 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
345 .flags = IORESOURCE_IRQ,
346 },
347 [2] = {
348 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
349 .flags = IORESOURCE_IRQ,
350 },
351 [3] = {
352 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
353 .flags = IORESOURCE_IRQ,
354 },
355 };
356
357 static struct platform_device sdhi0_device = {
358 .name = "sh_mobile_sdhi",
359 .num_resources = ARRAY_SIZE(sdhi0_resources),
360 .resource = sdhi0_resources,
361 .id = 0,
362 .dev = {
363 .platform_data = &sdhi0_info,
364 },
365 };
366
367 /* SDHI1 */
368 static struct sh_mobile_sdhi_info sdhi1_info = {
369 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
370 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
371 .tmio_ocr_mask = MMC_VDD_165_195,
372 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
373 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
374 .get_cd = slot_cn7_get_cd,
375 };
376
377 static struct resource sdhi1_resources[] = {
378 [0] = {
379 .name = "SDHI1",
380 .start = 0xe6860000,
381 .end = 0xe68600ff,
382 .flags = IORESOURCE_MEM,
383 },
384 [1] = {
385 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
386 .flags = IORESOURCE_IRQ,
387 },
388 [2] = {
389 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
390 .flags = IORESOURCE_IRQ,
391 },
392 [3] = {
393 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
394 .flags = IORESOURCE_IRQ,
395 },
396 };
397
398 static struct platform_device sdhi1_device = {
399 .name = "sh_mobile_sdhi",
400 .num_resources = ARRAY_SIZE(sdhi1_resources),
401 .resource = sdhi1_resources,
402 .id = 1,
403 .dev = {
404 .platform_data = &sdhi1_info,
405 },
406 };
407
408 /* USB1 */
409 static void usb1_host_port_power(int port, int power)
410 {
411 if (!power) /* only power-on supported for now */
412 return;
413
414 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
415 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
416 }
417
418 static struct r8a66597_platdata usb1_host_data = {
419 .on_chip = 1,
420 .port_power = usb1_host_port_power,
421 };
422
423 static struct resource usb1_host_resources[] = {
424 [0] = {
425 .name = "USBHS",
426 .start = 0xE68B0000,
427 .end = 0xE68B00E6 - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 [1] = {
431 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
432 .flags = IORESOURCE_IRQ,
433 },
434 };
435
436 static struct platform_device usb1_host_device = {
437 .name = "r8a66597_hcd",
438 .id = 1,
439 .dev = {
440 .dma_mask = NULL, /* not use dma */
441 .coherent_dma_mask = 0xffffffff,
442 .platform_data = &usb1_host_data,
443 },
444 .num_resources = ARRAY_SIZE(usb1_host_resources),
445 .resource = usb1_host_resources,
446 };
447
448 static const struct fb_videomode ap4evb_lcdc_modes[] = {
449 {
450 #ifdef CONFIG_AP4EVB_QHD
451 .name = "R63302(QHD)",
452 .xres = 544,
453 .yres = 961,
454 .left_margin = 72,
455 .right_margin = 600,
456 .hsync_len = 16,
457 .upper_margin = 8,
458 .lower_margin = 8,
459 .vsync_len = 2,
460 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
461 #else
462 .name = "WVGA Panel",
463 .xres = 800,
464 .yres = 480,
465 .left_margin = 220,
466 .right_margin = 110,
467 .hsync_len = 70,
468 .upper_margin = 20,
469 .lower_margin = 5,
470 .vsync_len = 5,
471 .sync = 0,
472 #endif
473 },
474 };
475 static struct sh_mobile_meram_cfg lcd_meram_cfg = {
476 .icb[0] = {
477 .marker_icb = 28,
478 .cache_icb = 24,
479 .meram_offset = 0x0,
480 .meram_size = 0x40,
481 },
482 .icb[1] = {
483 .marker_icb = 29,
484 .cache_icb = 25,
485 .meram_offset = 0x40,
486 .meram_size = 0x40,
487 },
488 };
489
490 static struct sh_mobile_lcdc_info lcdc_info = {
491 .meram_dev = &meram_info,
492 .ch[0] = {
493 .chan = LCDC_CHAN_MAINLCD,
494 .fourcc = V4L2_PIX_FMT_RGB565,
495 .lcd_cfg = ap4evb_lcdc_modes,
496 .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
497 .meram_cfg = &lcd_meram_cfg,
498 }
499 };
500
501 static struct resource lcdc_resources[] = {
502 [0] = {
503 .name = "LCDC",
504 .start = 0xfe940000, /* P4-only space */
505 .end = 0xfe943fff,
506 .flags = IORESOURCE_MEM,
507 },
508 [1] = {
509 .start = intcs_evt2irq(0x580),
510 .flags = IORESOURCE_IRQ,
511 },
512 };
513
514 static struct platform_device lcdc_device = {
515 .name = "sh_mobile_lcdc_fb",
516 .num_resources = ARRAY_SIZE(lcdc_resources),
517 .resource = lcdc_resources,
518 .dev = {
519 .platform_data = &lcdc_info,
520 .coherent_dma_mask = ~0,
521 },
522 };
523
524 /*
525 * QHD display
526 */
527 #ifdef CONFIG_AP4EVB_QHD
528
529 /* KEYSC (Needs SW43 set to ON) */
530 static struct sh_keysc_info keysc_info = {
531 .mode = SH_KEYSC_MODE_1,
532 .scan_timing = 3,
533 .delay = 2500,
534 .keycodes = {
535 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
536 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
537 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
538 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
539 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
540 },
541 };
542
543 static struct resource keysc_resources[] = {
544 [0] = {
545 .name = "KEYSC",
546 .start = 0xe61b0000,
547 .end = 0xe61b0063,
548 .flags = IORESOURCE_MEM,
549 },
550 [1] = {
551 .start = evt2irq(0x0be0), /* KEYSC_KEY */
552 .flags = IORESOURCE_IRQ,
553 },
554 };
555
556 static struct platform_device keysc_device = {
557 .name = "sh_keysc",
558 .id = 0, /* "keysc0" clock */
559 .num_resources = ARRAY_SIZE(keysc_resources),
560 .resource = keysc_resources,
561 .dev = {
562 .platform_data = &keysc_info,
563 },
564 };
565
566 /* MIPI-DSI */
567 #define PHYCTRL 0x0070
568 static int sh_mipi_set_dot_clock(struct platform_device *pdev,
569 void __iomem *base,
570 int enable)
571 {
572 struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
573 void __iomem *phy = base + PHYCTRL;
574
575 if (IS_ERR(pck))
576 return PTR_ERR(pck);
577
578 if (enable) {
579 clk_set_rate(pck, clk_round_rate(pck, 24000000));
580 iowrite32(ioread32(phy) | (0xb << 8), phy);
581 clk_enable(pck);
582 } else {
583 clk_disable(pck);
584 }
585
586 clk_put(pck);
587
588 return 0;
589 }
590
591 static struct resource mipidsi0_resources[] = {
592 [0] = {
593 .start = 0xffc60000,
594 .end = 0xffc63073,
595 .flags = IORESOURCE_MEM,
596 },
597 [1] = {
598 .start = 0xffc68000,
599 .end = 0xffc680ef,
600 .flags = IORESOURCE_MEM,
601 },
602 };
603
604 static struct sh_mipi_dsi_info mipidsi0_info = {
605 .data_format = MIPI_RGB888,
606 .lcd_chan = &lcdc_info.ch[0],
607 .lane = 2,
608 .vsynw_offset = 17,
609 .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
610 SH_MIPI_DSI_HSbyteCLK,
611 .set_dot_clock = sh_mipi_set_dot_clock,
612 };
613
614 static struct platform_device mipidsi0_device = {
615 .name = "sh-mipi-dsi",
616 .num_resources = ARRAY_SIZE(mipidsi0_resources),
617 .resource = mipidsi0_resources,
618 .id = 0,
619 .dev = {
620 .platform_data = &mipidsi0_info,
621 },
622 };
623
624 static struct platform_device *qhd_devices[] __initdata = {
625 &mipidsi0_device,
626 &keysc_device,
627 };
628 #endif /* CONFIG_AP4EVB_QHD */
629
630 /* FSI */
631 #define IRQ_FSI evt2irq(0x1840)
632 static int __fsi_set_rate(struct clk *clk, long rate, int enable)
633 {
634 int ret = 0;
635
636 if (rate <= 0)
637 return ret;
638
639 if (enable) {
640 ret = clk_set_rate(clk, rate);
641 if (0 == ret)
642 ret = clk_enable(clk);
643 } else {
644 clk_disable(clk);
645 }
646
647 return ret;
648 }
649
650 static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
651 {
652 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
653 }
654
655 static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
656 {
657 struct clk *fsia_ick;
658 struct clk *fsiack;
659 int ret = -EIO;
660
661 fsia_ick = clk_get(dev, "icka");
662 if (IS_ERR(fsia_ick))
663 return PTR_ERR(fsia_ick);
664
665 /*
666 * FSIACK is connected to AK4642,
667 * and use external clock pin from it.
668 * it is parent of fsia_ick now.
669 */
670 fsiack = clk_get_parent(fsia_ick);
671 if (!fsiack)
672 goto fsia_ick_out;
673
674 /*
675 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
676 *
677 ** FIXME **
678 * Because the freq_table of external clk (fsiack) are all 0,
679 * the return value of clk_round_rate became 0.
680 * So, it use __fsi_set_rate here.
681 */
682 ret = __fsi_set_rate(fsiack, rate, enable);
683 if (ret < 0)
684 goto fsiack_out;
685
686 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
687 if ((ret < 0) && enable)
688 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
689
690 fsiack_out:
691 clk_put(fsiack);
692
693 fsia_ick_out:
694 clk_put(fsia_ick);
695
696 return 0;
697 }
698
699 static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
700 {
701 struct clk *fsib_clk;
702 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
703 long fsib_rate = 0;
704 long fdiv_rate = 0;
705 int ackmd_bpfmd;
706 int ret;
707
708 switch (rate) {
709 case 44100:
710 fsib_rate = rate * 256;
711 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
712 break;
713 case 48000:
714 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
715 fdiv_rate = rate * 256;
716 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
717 break;
718 default:
719 pr_err("unsupported rate in FSI2 port B\n");
720 return -EINVAL;
721 }
722
723 /* FSI B setting */
724 fsib_clk = clk_get(dev, "ickb");
725 if (IS_ERR(fsib_clk))
726 return -EIO;
727
728 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
729 if (ret < 0)
730 goto fsi_set_rate_end;
731
732 /* FSI DIV setting */
733 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
734 if (ret < 0) {
735 /* disable FSI B */
736 if (enable)
737 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
738 goto fsi_set_rate_end;
739 }
740
741 ret = ackmd_bpfmd;
742
743 fsi_set_rate_end:
744 clk_put(fsib_clk);
745 return ret;
746 }
747
748 static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
749 {
750 int ret;
751
752 if (is_porta)
753 ret = fsi_ak4642_set_rate(dev, rate, enable);
754 else
755 ret = fsi_hdmi_set_rate(dev, rate, enable);
756
757 return ret;
758 }
759
760 static struct sh_fsi_platform_info fsi_info = {
761 .porta_flags = SH_FSI_BRS_INV,
762
763 .portb_flags = SH_FSI_BRS_INV |
764 SH_FSI_BRM_INV |
765 SH_FSI_LRS_INV |
766 SH_FSI_FMT_SPDIF,
767 .set_rate = fsi_set_rate,
768 };
769
770 static struct resource fsi_resources[] = {
771 [0] = {
772 .name = "FSI",
773 .start = 0xFE3C0000,
774 .end = 0xFE3C0400 - 1,
775 .flags = IORESOURCE_MEM,
776 },
777 [1] = {
778 .start = IRQ_FSI,
779 .flags = IORESOURCE_IRQ,
780 },
781 };
782
783 static struct platform_device fsi_device = {
784 .name = "sh_fsi2",
785 .id = -1,
786 .num_resources = ARRAY_SIZE(fsi_resources),
787 .resource = fsi_resources,
788 .dev = {
789 .platform_data = &fsi_info,
790 },
791 };
792
793 static struct fsi_ak4642_info fsi2_ak4643_info = {
794 .name = "AK4643",
795 .card = "FSI2A-AK4643",
796 .cpu_dai = "fsia-dai",
797 .codec = "ak4642-codec.0-0013",
798 .platform = "sh_fsi2",
799 .id = FSI_PORT_A,
800 };
801
802 static struct platform_device fsi_ak4643_device = {
803 .name = "fsi-ak4642-audio",
804 .dev = {
805 .platform_data = &fsi_info,
806 },
807 };
808
809 static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
810 .icb[0] = {
811 .marker_icb = 30,
812 .cache_icb = 26,
813 .meram_offset = 0x80,
814 .meram_size = 0x100,
815 },
816 .icb[1] = {
817 .marker_icb = 31,
818 .cache_icb = 27,
819 .meram_offset = 0x180,
820 .meram_size = 0x100,
821 },
822 };
823
824 static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
825 .clock_source = LCDC_CLK_EXTERNAL,
826 .meram_dev = &meram_info,
827 .ch[0] = {
828 .chan = LCDC_CHAN_MAINLCD,
829 .fourcc = V4L2_PIX_FMT_RGB565,
830 .interface_type = RGB24,
831 .clock_divider = 1,
832 .flags = LCDC_FLAGS_DWPOL,
833 .meram_cfg = &hdmi_meram_cfg,
834 }
835 };
836
837 static struct resource lcdc1_resources[] = {
838 [0] = {
839 .name = "LCDC1",
840 .start = 0xfe944000,
841 .end = 0xfe947fff,
842 .flags = IORESOURCE_MEM,
843 },
844 [1] = {
845 .start = intcs_evt2irq(0x1780),
846 .flags = IORESOURCE_IRQ,
847 },
848 };
849
850 static struct platform_device lcdc1_device = {
851 .name = "sh_mobile_lcdc_fb",
852 .num_resources = ARRAY_SIZE(lcdc1_resources),
853 .resource = lcdc1_resources,
854 .id = 1,
855 .dev = {
856 .platform_data = &sh_mobile_lcdc1_info,
857 .coherent_dma_mask = ~0,
858 },
859 };
860
861 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
862 unsigned long *parent_freq);
863
864
865 static struct sh_mobile_hdmi_info hdmi_info = {
866 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
867 .lcd_dev = &lcdc1_device.dev,
868 .flags = HDMI_SND_SRC_SPDIF,
869 .clk_optimize_parent = ap4evb_clk_optimize,
870 };
871
872 static struct resource hdmi_resources[] = {
873 [0] = {
874 .name = "HDMI",
875 .start = 0xe6be0000,
876 .end = 0xe6be00ff,
877 .flags = IORESOURCE_MEM,
878 },
879 [1] = {
880 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
881 .start = evt2irq(0x17e0),
882 .flags = IORESOURCE_IRQ,
883 },
884 };
885
886 static struct platform_device hdmi_device = {
887 .name = "sh-mobile-hdmi",
888 .num_resources = ARRAY_SIZE(hdmi_resources),
889 .resource = hdmi_resources,
890 .id = -1,
891 .dev = {
892 .platform_data = &hdmi_info,
893 },
894 };
895
896 static struct platform_device fsi_hdmi_device = {
897 .name = "sh_fsi2_b_hdmi",
898 };
899
900 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
901 unsigned long *parent_freq)
902 {
903 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
904 long error;
905
906 if (IS_ERR(hdmi_ick)) {
907 int ret = PTR_ERR(hdmi_ick);
908 pr_err("Cannot get HDMI ICK: %d\n", ret);
909 return ret;
910 }
911
912 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
913
914 clk_put(hdmi_ick);
915
916 return error;
917 }
918
919 static struct gpio_led ap4evb_leds[] = {
920 {
921 .name = "led4",
922 .gpio = GPIO_PORT185,
923 .default_state = LEDS_GPIO_DEFSTATE_ON,
924 },
925 {
926 .name = "led2",
927 .gpio = GPIO_PORT186,
928 .default_state = LEDS_GPIO_DEFSTATE_ON,
929 },
930 {
931 .name = "led3",
932 .gpio = GPIO_PORT187,
933 .default_state = LEDS_GPIO_DEFSTATE_ON,
934 },
935 {
936 .name = "led1",
937 .gpio = GPIO_PORT188,
938 .default_state = LEDS_GPIO_DEFSTATE_ON,
939 }
940 };
941
942 static struct gpio_led_platform_data ap4evb_leds_pdata = {
943 .num_leds = ARRAY_SIZE(ap4evb_leds),
944 .leds = ap4evb_leds,
945 };
946
947 static struct platform_device leds_device = {
948 .name = "leds-gpio",
949 .id = 0,
950 .dev = {
951 .platform_data = &ap4evb_leds_pdata,
952 },
953 };
954
955 static struct i2c_board_info imx074_info = {
956 I2C_BOARD_INFO("imx074", 0x1a),
957 };
958
959 static struct soc_camera_link imx074_link = {
960 .bus_id = 0,
961 .board_info = &imx074_info,
962 .i2c_adapter_id = 0,
963 .module_name = "imx074",
964 };
965
966 static struct platform_device ap4evb_camera = {
967 .name = "soc-camera-pdrv",
968 .id = 0,
969 .dev = {
970 .platform_data = &imx074_link,
971 },
972 };
973
974 static struct sh_csi2_client_config csi2_clients[] = {
975 {
976 .phy = SH_CSI2_PHY_MAIN,
977 .lanes = 0, /* default: 2 lanes */
978 .channel = 0,
979 .pdev = &ap4evb_camera,
980 },
981 };
982
983 static struct sh_csi2_pdata csi2_info = {
984 .type = SH_CSI2C,
985 .clients = csi2_clients,
986 .num_clients = ARRAY_SIZE(csi2_clients),
987 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
988 };
989
990 static struct resource csi2_resources[] = {
991 [0] = {
992 .name = "CSI2",
993 .start = 0xffc90000,
994 .end = 0xffc90fff,
995 .flags = IORESOURCE_MEM,
996 },
997 [1] = {
998 .start = intcs_evt2irq(0x17a0),
999 .flags = IORESOURCE_IRQ,
1000 },
1001 };
1002
1003 static struct sh_mobile_ceu_companion csi2 = {
1004 .id = 0,
1005 .num_resources = ARRAY_SIZE(csi2_resources),
1006 .resource = csi2_resources,
1007 .platform_data = &csi2_info,
1008 };
1009
1010 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1011 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1012 .csi2 = &csi2,
1013 };
1014
1015 static struct resource ceu_resources[] = {
1016 [0] = {
1017 .name = "CEU",
1018 .start = 0xfe910000,
1019 .end = 0xfe91009f,
1020 .flags = IORESOURCE_MEM,
1021 },
1022 [1] = {
1023 .start = intcs_evt2irq(0x880),
1024 .flags = IORESOURCE_IRQ,
1025 },
1026 [2] = {
1027 /* place holder for contiguous memory */
1028 },
1029 };
1030
1031 static struct platform_device ceu_device = {
1032 .name = "sh_mobile_ceu",
1033 .id = 0, /* "ceu0" clock */
1034 .num_resources = ARRAY_SIZE(ceu_resources),
1035 .resource = ceu_resources,
1036 .dev = {
1037 .platform_data = &sh_mobile_ceu_info,
1038 .coherent_dma_mask = 0xffffffff,
1039 },
1040 };
1041
1042 static struct platform_device *ap4evb_devices[] __initdata = {
1043 &leds_device,
1044 &nor_flash_device,
1045 &smc911x_device,
1046 &sdhi0_device,
1047 &sdhi1_device,
1048 &usb1_host_device,
1049 &fsi_device,
1050 &fsi_ak4643_device,
1051 &fsi_hdmi_device,
1052 &sh_mmcif_device,
1053 &lcdc1_device,
1054 &lcdc_device,
1055 &hdmi_device,
1056 &ceu_device,
1057 &ap4evb_camera,
1058 &meram_device,
1059 };
1060
1061 static void __init hdmi_init_pm_clock(void)
1062 {
1063 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1064 int ret;
1065 long rate;
1066
1067 if (IS_ERR(hdmi_ick)) {
1068 ret = PTR_ERR(hdmi_ick);
1069 pr_err("Cannot get HDMI ICK: %d\n", ret);
1070 goto out;
1071 }
1072
1073 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
1074 if (ret < 0) {
1075 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1076 goto out;
1077 }
1078
1079 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1080
1081 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1082 if (rate < 0) {
1083 pr_err("Cannot get suitable rate: %ld\n", rate);
1084 ret = rate;
1085 goto out;
1086 }
1087
1088 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1089 if (ret < 0) {
1090 pr_err("Cannot set rate %ld: %d\n", rate, ret);
1091 goto out;
1092 }
1093
1094 pr_debug("PLLC2 set frequency %lu\n", rate);
1095
1096 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1097 if (ret < 0)
1098 pr_err("Cannot set HDMI parent: %d\n", ret);
1099
1100 out:
1101 if (!IS_ERR(hdmi_ick))
1102 clk_put(hdmi_ick);
1103 }
1104
1105 static void __init fsi_init_pm_clock(void)
1106 {
1107 struct clk *fsia_ick;
1108 int ret;
1109
1110 fsia_ick = clk_get(&fsi_device.dev, "icka");
1111 if (IS_ERR(fsia_ick)) {
1112 ret = PTR_ERR(fsia_ick);
1113 pr_err("Cannot get FSI ICK: %d\n", ret);
1114 return;
1115 }
1116
1117 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1118 if (ret < 0)
1119 pr_err("Cannot set FSI-A parent: %d\n", ret);
1120
1121 clk_put(fsia_ick);
1122 }
1123
1124 /*
1125 * FIXME !!
1126 *
1127 * gpio_no_direction
1128 * are quick_hack.
1129 *
1130 * current gpio frame work doesn't have
1131 * the method to control only pull up/down/free.
1132 * this function should be replaced by correct gpio function
1133 */
1134 static void __init gpio_no_direction(u32 addr)
1135 {
1136 __raw_writeb(0x00, addr);
1137 }
1138
1139 /* TouchScreen */
1140 #ifdef CONFIG_AP4EVB_QHD
1141 # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1142 # define GPIO_TSC_PORT GPIO_PORT123
1143 #else /* WVGA */
1144 # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1145 # define GPIO_TSC_PORT GPIO_PORT40
1146 #endif
1147
1148 #define IRQ28 evt2irq(0x3380) /* IRQ28A */
1149 #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1150 static int ts_get_pendown_state(void)
1151 {
1152 int val;
1153
1154 gpio_free(GPIO_TSC_IRQ);
1155
1156 gpio_request(GPIO_TSC_PORT, NULL);
1157
1158 gpio_direction_input(GPIO_TSC_PORT);
1159
1160 val = gpio_get_value(GPIO_TSC_PORT);
1161
1162 gpio_request(GPIO_TSC_IRQ, NULL);
1163
1164 return !val;
1165 }
1166
1167 static int ts_init(void)
1168 {
1169 gpio_request(GPIO_TSC_IRQ, NULL);
1170
1171 return 0;
1172 }
1173
1174 static struct tsc2007_platform_data tsc2007_info = {
1175 .model = 2007,
1176 .x_plate_ohms = 180,
1177 .get_pendown_state = ts_get_pendown_state,
1178 .init_platform_hw = ts_init,
1179 };
1180
1181 static struct i2c_board_info tsc_device = {
1182 I2C_BOARD_INFO("tsc2007", 0x48),
1183 .type = "tsc2007",
1184 .platform_data = &tsc2007_info,
1185 /*.irq is selected on ap4evb_init */
1186 };
1187
1188 /* I2C */
1189 static struct i2c_board_info i2c0_devices[] = {
1190 {
1191 I2C_BOARD_INFO("ak4643", 0x13),
1192 },
1193 };
1194
1195 static struct i2c_board_info i2c1_devices[] = {
1196 {
1197 I2C_BOARD_INFO("r2025sd", 0x32),
1198 },
1199 };
1200
1201 static struct map_desc ap4evb_io_desc[] __initdata = {
1202 /* create a 1:1 entity map for 0xe6xxxxxx
1203 * used by CPGA, INTC and PFC.
1204 */
1205 {
1206 .virtual = 0xe6000000,
1207 .pfn = __phys_to_pfn(0xe6000000),
1208 .length = 256 << 20,
1209 .type = MT_DEVICE_NONSHARED
1210 },
1211 };
1212
1213 static void __init ap4evb_map_io(void)
1214 {
1215 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1216
1217 /* setup early devices and console here as well */
1218 sh7372_add_early_devices();
1219 shmobile_setup_console();
1220 }
1221
1222 #define GPIO_PORT9CR 0xE6051009
1223 #define GPIO_PORT10CR 0xE605100A
1224 #define USCCR1 0xE6058144
1225 static void __init ap4evb_init(void)
1226 {
1227 u32 srcr4;
1228 struct clk *clk;
1229
1230 sh7372_pinmux_init();
1231
1232 /* enable SCIFA0 */
1233 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1234 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1235
1236 /* enable SMSC911X */
1237 gpio_request(GPIO_FN_CS5A, NULL);
1238 gpio_request(GPIO_FN_IRQ6_39, NULL);
1239
1240 /* enable Debug switch (S6) */
1241 gpio_request(GPIO_PORT32, NULL);
1242 gpio_request(GPIO_PORT33, NULL);
1243 gpio_request(GPIO_PORT34, NULL);
1244 gpio_request(GPIO_PORT35, NULL);
1245 gpio_direction_input(GPIO_PORT32);
1246 gpio_direction_input(GPIO_PORT33);
1247 gpio_direction_input(GPIO_PORT34);
1248 gpio_direction_input(GPIO_PORT35);
1249 gpio_export(GPIO_PORT32, 0);
1250 gpio_export(GPIO_PORT33, 0);
1251 gpio_export(GPIO_PORT34, 0);
1252 gpio_export(GPIO_PORT35, 0);
1253
1254 /* SDHI0 */
1255 gpio_request(GPIO_FN_SDHICD0, NULL);
1256 gpio_request(GPIO_FN_SDHIWP0, NULL);
1257 gpio_request(GPIO_FN_SDHICMD0, NULL);
1258 gpio_request(GPIO_FN_SDHICLK0, NULL);
1259 gpio_request(GPIO_FN_SDHID0_3, NULL);
1260 gpio_request(GPIO_FN_SDHID0_2, NULL);
1261 gpio_request(GPIO_FN_SDHID0_1, NULL);
1262 gpio_request(GPIO_FN_SDHID0_0, NULL);
1263
1264 /* SDHI1 */
1265 gpio_request(GPIO_FN_SDHICMD1, NULL);
1266 gpio_request(GPIO_FN_SDHICLK1, NULL);
1267 gpio_request(GPIO_FN_SDHID1_3, NULL);
1268 gpio_request(GPIO_FN_SDHID1_2, NULL);
1269 gpio_request(GPIO_FN_SDHID1_1, NULL);
1270 gpio_request(GPIO_FN_SDHID1_0, NULL);
1271
1272 /* MMCIF */
1273 gpio_request(GPIO_FN_MMCD0_0, NULL);
1274 gpio_request(GPIO_FN_MMCD0_1, NULL);
1275 gpio_request(GPIO_FN_MMCD0_2, NULL);
1276 gpio_request(GPIO_FN_MMCD0_3, NULL);
1277 gpio_request(GPIO_FN_MMCD0_4, NULL);
1278 gpio_request(GPIO_FN_MMCD0_5, NULL);
1279 gpio_request(GPIO_FN_MMCD0_6, NULL);
1280 gpio_request(GPIO_FN_MMCD0_7, NULL);
1281 gpio_request(GPIO_FN_MMCCMD0, NULL);
1282 gpio_request(GPIO_FN_MMCCLK0, NULL);
1283
1284 /* USB enable */
1285 gpio_request(GPIO_FN_VBUS0_1, NULL);
1286 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1287 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1288 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1289 gpio_request(GPIO_FN_EXTLP_1, NULL);
1290 gpio_request(GPIO_FN_OVCN2_1, NULL);
1291
1292 /* setup USB phy */
1293 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
1294
1295 /* enable FSI2 port A (ak4643) */
1296 gpio_request(GPIO_FN_FSIAIBT, NULL);
1297 gpio_request(GPIO_FN_FSIAILR, NULL);
1298 gpio_request(GPIO_FN_FSIAISLD, NULL);
1299 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1300 gpio_request(GPIO_PORT161, NULL);
1301 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1302
1303 gpio_request(GPIO_PORT9, NULL);
1304 gpio_request(GPIO_PORT10, NULL);
1305 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1306 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1307
1308 /* card detect pin for MMC slot (CN7) */
1309 gpio_request(GPIO_PORT41, NULL);
1310 gpio_direction_input(GPIO_PORT41);
1311
1312 /* setup FSI2 port B (HDMI) */
1313 gpio_request(GPIO_FN_FSIBCK, NULL);
1314 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1315
1316 /* set SPU2 clock to 119.6 MHz */
1317 clk = clk_get(NULL, "spu_clk");
1318 if (!IS_ERR(clk)) {
1319 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1320 clk_put(clk);
1321 }
1322
1323 /*
1324 * set irq priority, to avoid sound chopping
1325 * when NFS rootfs is used
1326 * FSI(3) > SMSC911X(2)
1327 */
1328 intc_set_priority(IRQ_FSI, 3);
1329
1330 i2c_register_board_info(0, i2c0_devices,
1331 ARRAY_SIZE(i2c0_devices));
1332
1333 i2c_register_board_info(1, i2c1_devices,
1334 ARRAY_SIZE(i2c1_devices));
1335
1336 #ifdef CONFIG_AP4EVB_QHD
1337
1338 /*
1339 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1340 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1341 */
1342
1343 /* enable KEYSC */
1344 gpio_request(GPIO_FN_KEYOUT0, NULL);
1345 gpio_request(GPIO_FN_KEYOUT1, NULL);
1346 gpio_request(GPIO_FN_KEYOUT2, NULL);
1347 gpio_request(GPIO_FN_KEYOUT3, NULL);
1348 gpio_request(GPIO_FN_KEYOUT4, NULL);
1349 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1350 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1351 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1352 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1353 gpio_request(GPIO_FN_KEYIN4, NULL);
1354
1355 /* enable TouchScreen */
1356 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1357
1358 tsc_device.irq = IRQ28;
1359 i2c_register_board_info(1, &tsc_device, 1);
1360
1361 /* LCDC0 */
1362 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1363 lcdc_info.ch[0].interface_type = RGB24;
1364 lcdc_info.ch[0].clock_divider = 1;
1365 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1366 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1367 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1368
1369 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1370
1371 #else
1372 /*
1373 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1374 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1375 */
1376
1377 gpio_request(GPIO_FN_LCDD17, NULL);
1378 gpio_request(GPIO_FN_LCDD16, NULL);
1379 gpio_request(GPIO_FN_LCDD15, NULL);
1380 gpio_request(GPIO_FN_LCDD14, NULL);
1381 gpio_request(GPIO_FN_LCDD13, NULL);
1382 gpio_request(GPIO_FN_LCDD12, NULL);
1383 gpio_request(GPIO_FN_LCDD11, NULL);
1384 gpio_request(GPIO_FN_LCDD10, NULL);
1385 gpio_request(GPIO_FN_LCDD9, NULL);
1386 gpio_request(GPIO_FN_LCDD8, NULL);
1387 gpio_request(GPIO_FN_LCDD7, NULL);
1388 gpio_request(GPIO_FN_LCDD6, NULL);
1389 gpio_request(GPIO_FN_LCDD5, NULL);
1390 gpio_request(GPIO_FN_LCDD4, NULL);
1391 gpio_request(GPIO_FN_LCDD3, NULL);
1392 gpio_request(GPIO_FN_LCDD2, NULL);
1393 gpio_request(GPIO_FN_LCDD1, NULL);
1394 gpio_request(GPIO_FN_LCDD0, NULL);
1395 gpio_request(GPIO_FN_LCDDISP, NULL);
1396 gpio_request(GPIO_FN_LCDDCK, NULL);
1397
1398 gpio_request(GPIO_PORT189, NULL); /* backlight */
1399 gpio_direction_output(GPIO_PORT189, 1);
1400
1401 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1402 gpio_direction_output(GPIO_PORT151, 1);
1403
1404 lcdc_info.clock_source = LCDC_CLK_BUS;
1405 lcdc_info.ch[0].interface_type = RGB18;
1406 lcdc_info.ch[0].clock_divider = 3;
1407 lcdc_info.ch[0].flags = 0;
1408 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1409 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1410
1411 /* enable TouchScreen */
1412 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1413
1414 tsc_device.irq = IRQ7;
1415 i2c_register_board_info(0, &tsc_device, 1);
1416 #endif /* CONFIG_AP4EVB_QHD */
1417
1418 /* CEU */
1419
1420 /*
1421 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1422 * becomes available
1423 */
1424
1425 /* MIPI-CSI stuff */
1426 gpio_request(GPIO_FN_VIO_CKO, NULL);
1427
1428 clk = clk_get(NULL, "vck1_clk");
1429 if (!IS_ERR(clk)) {
1430 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1431 clk_enable(clk);
1432 clk_put(clk);
1433 }
1434
1435 sh7372_add_standard_devices();
1436
1437 /* HDMI */
1438 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1439 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1440
1441 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1442 #define SRCR4 0xe61580bc
1443 srcr4 = __raw_readl(SRCR4);
1444 __raw_writel(srcr4 | (1 << 13), SRCR4);
1445 udelay(50);
1446 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1447
1448 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1449
1450 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
1451 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1452 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
1453
1454 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1455 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1456 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1457 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
1458
1459 hdmi_init_pm_clock();
1460 fsi_init_pm_clock();
1461 sh7372_pm_init();
1462 pm_clk_add(&fsi_device.dev, "spu2");
1463 pm_clk_add(&lcdc1_device.dev, "hdmi");
1464 }
1465
1466 static void __init ap4evb_timer_init(void)
1467 {
1468 sh7372_clock_init();
1469 shmobile_timer.init();
1470
1471 /* External clock source */
1472 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1473 }
1474
1475 static struct sys_timer ap4evb_timer = {
1476 .init = ap4evb_timer_init,
1477 };
1478
1479 MACHINE_START(AP4EVB, "ap4evb")
1480 .map_io = ap4evb_map_io,
1481 .init_irq = sh7372_init_irq,
1482 .handle_irq = shmobile_handle_irq_intc,
1483 .init_machine = ap4evb_init,
1484 .timer = &ap4evb_timer,
1485 MACHINE_END
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