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git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/arm/mach-shmobile/setup-r8a7779.c
2 * r8a7779 processor support
4 * Copyright (C) 2011, 2013 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 * Copyright (C) 2013 Cogent Embedded, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #include <linux/clk/renesas.h>
18 #include <linux/clocksource.h>
19 #include <linux/init.h>
20 #include <linux/irq.h>
21 #include <linux/irqchip.h>
22 #include <linux/irqchip/arm-gic.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
30 static struct map_desc r8a7779_io_desc
[] __initdata
= {
31 /* 2M identity mapping for 0xf0000000 (MPCORE) */
33 .virtual = 0xf0000000,
34 .pfn
= __phys_to_pfn(0xf0000000),
36 .type
= MT_DEVICE_NONSHARED
38 /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
40 .virtual = 0xfe000000,
41 .pfn
= __phys_to_pfn(0xfe000000),
43 .type
= MT_DEVICE_NONSHARED
47 static void __init
r8a7779_map_io(void)
50 iotable_init(r8a7779_io_desc
, ARRAY_SIZE(r8a7779_io_desc
));
54 #define INT2SMSKCR0 IOMEM(0xfe7822a0)
55 #define INT2SMSKCR1 IOMEM(0xfe7822a4)
56 #define INT2SMSKCR2 IOMEM(0xfe7822a8)
57 #define INT2SMSKCR3 IOMEM(0xfe7822ac)
58 #define INT2SMSKCR4 IOMEM(0xfe7822b0)
60 #define INT2NTSR0 IOMEM(0xfe700060)
61 #define INT2NTSR1 IOMEM(0xfe700064)
63 static void __init
r8a7779_init_irq_dt(void)
67 /* route all interrupts to ARM */
68 __raw_writel(0xffffffff, INT2NTSR0
);
69 __raw_writel(0x3fffffff, INT2NTSR1
);
71 /* unmask all known interrupts in INTCS2 */
72 __raw_writel(0xfffffff0, INT2SMSKCR0
);
73 __raw_writel(0xfff7ffff, INT2SMSKCR1
);
74 __raw_writel(0xfffbffdf, INT2SMSKCR2
);
75 __raw_writel(0xbffffffc, INT2SMSKCR3
);
76 __raw_writel(0x003fee3f, INT2SMSKCR4
);
79 #define MODEMR 0xffcc0020
81 static u32 __init
r8a7779_read_mode_pins(void)
84 static bool mode_valid
;
87 void __iomem
*modemr
= ioremap_nocache(MODEMR
, PAGE_SIZE
);
89 mode
= ioread32(modemr
);
97 static void __init
r8a7779_init_time(void)
99 r8a7779_clocks_init(r8a7779_read_mode_pins());
103 static const char *const r8a7779_compat_dt
[] __initconst
= {
108 DT_MACHINE_START(R8A7779_DT
, "Generic R8A7779 (Flattened Device Tree)")
109 .smp
= smp_ops(r8a7779_smp_ops
),
110 .map_io
= r8a7779_map_io
,
111 .init_early
= shmobile_init_delay
,
112 .init_time
= r8a7779_init_time
,
113 .init_irq
= r8a7779_init_irq_dt
,
114 .init_late
= shmobile_init_late
,
115 .dt_compat
= r8a7779_compat_dt
,