arch/arm/mach-shmobile/setup-rcar-gen2.c

   1 /*
   2  * R-Car Generation 2 support
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Magnus Damm
   6  * Copyright (C) 2014  Ulrich Hecht
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/clk-provider.h>
  19 #include <linux/clocksource.h>
  20 #include <linux/device.h>
  21 #include <linux/dma-contiguous.h>
  22 #include <linux/io.h>
  23 #include <linux/kernel.h>
  24 #include <linux/memblock.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/of_platform.h>
  28 #include <asm/mach/arch.h>
  29 #include "common.h"
  30 #include "rcar-gen2.h"
  31
  32 static const struct of_device_id cpg_matches[] __initconst = {
  33         { .compatible = "renesas,rcar-gen2-cpg-clocks", },
  34         { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
  35         { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
  36         { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
  37         { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
  38         { /* sentinel */ }
  39 };
  40
  41 static unsigned int __init get_extal_freq(void)
  42 {
  43         const struct of_device_id *match;
  44         struct device_node *cpg, *extal;
  45         u32 freq = 20000000;
  46         int idx = 0;
  47
  48         cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
  49         if (!cpg)
  50                 return freq;
  51
  52         if (match->data)
  53                 idx = of_property_match_string(cpg, "clock-names", match->data);
  54         extal = of_parse_phandle(cpg, "clocks", idx);
  55         of_node_put(cpg);
  56         if (!extal)
  57                 return freq;
  58
  59         of_property_read_u32(extal, "clock-frequency", &freq);
  60         of_node_put(extal);
  61         return freq;
  62 }
  63
  64 #define CNTCR 0
  65 #define CNTFID0 0x20
  66
  67 void __init rcar_gen2_timer_init(void)
  68 {
  69 #ifdef CONFIG_ARM_ARCH_TIMER
  70         void __iomem *base;
  71         u32 freq;
  72
  73         shmobile_init_cntvoff();
  74
  75         if (of_machine_is_compatible("renesas,r8a7745") ||
  76             of_machine_is_compatible("renesas,r8a7792") ||
  77             of_machine_is_compatible("renesas,r8a7794")) {
  78                 freq = 260000000 / 8;   /* ZS / 8 */
  79         } else {
  80                 /* At Linux boot time the r8a7790 arch timer comes up
  81                  * with the counter disabled. Moreover, it may also report
  82                  * a potentially incorrect fixed 13 MHz frequency. To be
  83                  * correct these registers need to be updated to use the
  84                  * frequency EXTAL / 2.
  85                  */
  86                 freq = get_extal_freq() / 2;
  87         }
  88
  89         /* Remap "armgcnt address map" space */
  90         base = ioremap(0xe6080000, PAGE_SIZE);
  91
  92         /*
  93          * Update the timer if it is either not running, or is not at the
  94          * right frequency. The timer is only configurable in secure mode
  95          * so this avoids an abort if the loader started the timer and
  96          * entered the kernel in non-secure mode.
  97          */
  98
  99         if ((ioread32(base + CNTCR) & 1) == 0 ||
 100             ioread32(base + CNTFID0) != freq) {
 101                 /* Update registers with correct frequency */
 102                 iowrite32(freq, base + CNTFID0);
 103                 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
 104
 105                 /* make sure arch timer is started by setting bit 0 of CNTCR */
 106                 iowrite32(1, base + CNTCR);
 107         }
 108
 109         iounmap(base);
 110 #endif /* CONFIG_ARM_ARCH_TIMER */
 111
 112         of_clk_init(NULL);
 113         timer_probe();
 114 }
 115
 116 struct memory_reserve_config {
 117         u64 reserved;
 118         u64 base, size;
 119 };
 120
 121 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname,
 122                                      int depth, void *data)
 123 {
 124         const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
 125         const __be32 *reg, *endp;
 126         int l;
 127         struct memory_reserve_config *mrc = data;
 128         u64 lpae_start = 1ULL << 32;
 129
 130         /* We are scanning "memory" nodes only */
 131         if (type == NULL || strcmp(type, "memory"))
 132                 return 0;
 133
 134         reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
 135         if (reg == NULL)
 136                 reg = of_get_flat_dt_prop(node, "reg", &l);
 137         if (reg == NULL)
 138                 return 0;
 139
 140         endp = reg + (l / sizeof(__be32));
 141         while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
 142                 u64 base, size;
 143
 144                 base = dt_mem_next_cell(dt_root_addr_cells, &reg);
 145                 size = dt_mem_next_cell(dt_root_size_cells, &reg);
 146
 147                 if (base >= lpae_start)
 148                         continue;
 149
 150                 if ((base + size) >= lpae_start)
 151                         size = lpae_start - base;
 152
 153                 if (size < mrc->reserved)
 154                         continue;
 155
 156                 if (base < mrc->base)
 157                         continue;
 158
 159                 /* keep the area at top near the 32-bit legacy limit */
 160                 mrc->base = base + size - mrc->reserved;
 161                 mrc->size = mrc->reserved;
 162         }
 163
 164         return 0;
 165 }
 166
 167 void __init rcar_gen2_reserve(void)
 168 {
 169         struct memory_reserve_config mrc;
 170
 171         /* reserve 256 MiB at the top of the physical legacy 32-bit space */
 172         memset(&mrc, 0, sizeof(mrc));
 173         mrc.reserved = SZ_256M;
 174
 175         of_scan_flat_dt(rcar_gen2_scan_mem, &mrc);
 176 #ifdef CONFIG_DMA_CMA
 177         if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) {
 178                 static struct cma *rcar_gen2_dma_contiguous;
 179
 180                 dma_contiguous_reserve_area(mrc.size, mrc.base, 0,
 181                                             &rcar_gen2_dma_contiguous, true);
 182         }
 183 #endif
 184 }
 185
 186 static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
 187         /*
 188          * R8A7790 and R8A7791 can't be handled here as long as they need SMP
 189          * initialization fallback.
 190          */
 191         "renesas,r8a7792",
 192         "renesas,r8a7793",
 193         "renesas,r8a7794",
 194         NULL,
 195 };
 196
 197 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
 198         .init_early     = shmobile_init_delay,
 199         .init_late      = shmobile_init_late,
 200         .init_time      = rcar_gen2_timer_init,
 201         .reserve        = rcar_gen2_reserve,
 202         .dt_compat      = rcar_gen2_boards_compat_dt,
 203 MACHINE_END
 204
 205 static const char * const rz_g1_boards_compat_dt[] __initconst = {
 206         "renesas,r8a7743",
 207         "renesas,r8a7745",
 208         NULL,
 209 };
 210
 211 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
 212         .init_early     = shmobile_init_delay,
 213         .init_late      = shmobile_init_late,
 214         .init_time      = rcar_gen2_timer_init,
 215         .reserve        = rcar_gen2_reserve,
 216         .dt_compat      = rz_g1_boards_compat_dt,
 217 MACHINE_END