arch/arm/mach-shmobile/smp-sh73a0.c

   1 /*
   2  * SMP support for R-Mobile / SH-Mobile - sh73a0 portion
   3  *
   4  * Copyright (C) 2010  Magnus Damm
   5  * Copyright (C) 2010  Takashi Yoshii
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/smp.h>
  23 #include <linux/spinlock.h>
  24 #include <linux/io.h>
  25 #include <mach/common.h>
  26 #include <asm/smp_plat.h>
  27 #include <asm/smp_scu.h>
  28 #include <asm/smp_twd.h>
  29 #include <asm/hardware/gic.h>
  30
  31 #define WUPCR           IOMEM(0xe6151010)
  32 #define SRESCR          IOMEM(0xe6151018)
  33 #define PSTR            IOMEM(0xe6151040)
  34 #define SBAR            IOMEM(0xe6180020)
  35 #define APARMBAREA      IOMEM(0xe6f10020)
  36
  37 static void __iomem *scu_base_addr(void)
  38 {
  39         return (void __iomem *)0xf0000000;
  40 }
  41
  42 static DEFINE_SPINLOCK(scu_lock);
  43 static unsigned long tmp;
  44
  45 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
  46
  47 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
  48 {
  49         void __iomem *scu_base = scu_base_addr();
  50
  51         spin_lock(&scu_lock);
  52         tmp = __raw_readl(scu_base + 8);
  53         tmp &= ~clr;
  54         tmp |= set;
  55         spin_unlock(&scu_lock);
  56
  57         /* disable cache coherency after releasing the lock */
  58         __raw_writel(tmp, scu_base + 8);
  59 }
  60
  61 unsigned int __init sh73a0_get_core_count(void)
  62 {
  63         void __iomem *scu_base = scu_base_addr();
  64
  65         shmobile_twd_init(&twd_local_timer);
  66         return scu_get_core_count(scu_base);
  67 }
  68
  69 void __cpuinit sh73a0_secondary_init(unsigned int cpu)
  70 {
  71         gic_secondary_init(0);
  72 }
  73
  74 int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
  75 {
  76         cpu = cpu_logical_map(cpu);
  77
  78         /* enable cache coherency */
  79         modify_scu_cpu_psr(0, 3 << (cpu * 8));
  80
  81         if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
  82                 __raw_writel(1 << cpu, WUPCR);  /* wake up */
  83         else
  84                 __raw_writel(1 << cpu, SRESCR); /* reset */
  85
  86         return 0;
  87 }
  88
  89 void __init sh73a0_smp_prepare_cpus(void)
  90 {
  91         int cpu = cpu_logical_map(0);
  92
  93         scu_enable(scu_base_addr());
  94
  95         /* Map the reset vector (in headsmp.S) */
  96         __raw_writel(0, APARMBAREA);      /* 4k */
  97         __raw_writel(__pa(shmobile_secondary_vector), SBAR);
  98
  99         /* enable cache coherency on CPU0 */
 100         modify_scu_cpu_psr(0, 3 << (cpu * 8));
 101 }