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1 /*
2 * arch/arm/mach-spear6xx/spear6xx.c
3 *
4 * SPEAr6XX machines common source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 #include <linux/types.h>
15 #include <linux/amba/pl061.h>
16 #include <linux/ptrace.h>
17 #include <linux/io.h>
18 #include <asm/hardware/vic.h>
19 #include <asm/irq.h>
20 #include <asm/mach/arch.h>
21 #include <mach/irqs.h>
22 #include <mach/generic.h>
23 #include <mach/spear.h>
24
25 /* Add spear6xx machines common devices here */
26 /* uart device registration */
27 struct amba_device uart_device[] = {
28 {
29 .dev = {
30 .init_name = "uart0",
31 },
32 .res = {
33 .start = SPEAR6XX_ICM1_UART0_BASE,
34 .end = SPEAR6XX_ICM1_UART0_BASE +
35 SPEAR6XX_ICM1_UART0_SIZE - 1,
36 .flags = IORESOURCE_MEM,
37 },
38 .irq = {IRQ_UART_0, NO_IRQ},
39 }, {
40 .dev = {
41 .init_name = "uart1",
42 },
43 .res = {
44 .start = SPEAR6XX_ICM1_UART1_BASE,
45 .end = SPEAR6XX_ICM1_UART1_BASE +
46 SPEAR6XX_ICM1_UART1_SIZE - 1,
47 .flags = IORESOURCE_MEM,
48 },
49 .irq = {IRQ_UART_1, NO_IRQ},
50 }
51 };
52
53 /* gpio device registration */
54 static struct pl061_platform_data gpio_plat_data[] = {
55 {
56 .gpio_base = 0,
57 .irq_base = SPEAR_GPIO0_INT_BASE,
58 }, {
59 .gpio_base = 8,
60 .irq_base = SPEAR_GPIO1_INT_BASE,
61 }, {
62 .gpio_base = 16,
63 .irq_base = SPEAR_GPIO2_INT_BASE,
64 },
65 };
66
67 struct amba_device gpio_device[] = {
68 {
69 .dev = {
70 .init_name = "gpio0",
71 .platform_data = &gpio_plat_data[0],
72 },
73 .res = {
74 .start = SPEAR6XX_CPU_GPIO_BASE,
75 .end = SPEAR6XX_CPU_GPIO_BASE +
76 SPEAR6XX_CPU_GPIO_SIZE - 1,
77 .flags = IORESOURCE_MEM,
78 },
79 .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
80 }, {
81 .dev = {
82 .init_name = "gpio1",
83 .platform_data = &gpio_plat_data[1],
84 },
85 .res = {
86 .start = SPEAR6XX_ICM3_GPIO_BASE,
87 .end = SPEAR6XX_ICM3_GPIO_BASE +
88 SPEAR6XX_ICM3_GPIO_SIZE - 1,
89 .flags = IORESOURCE_MEM,
90 },
91 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
92 }, {
93 .dev = {
94 .init_name = "gpio2",
95 .platform_data = &gpio_plat_data[2],
96 },
97 .res = {
98 .start = SPEAR6XX_ICM2_GPIO_BASE,
99 .end = SPEAR6XX_ICM2_GPIO_BASE +
100 SPEAR6XX_ICM2_GPIO_SIZE - 1,
101 .flags = IORESOURCE_MEM,
102 },
103 .irq = {IRQ_APPL_GPIO, NO_IRQ},
104 }
105 };
106
107 /* This will add devices, and do machine specific tasks */
108 void __init spear6xx_init(void)
109 {
110 /* nothing to do for now */
111 }
112
113 /* This will initialize vic */
114 void __init spear6xx_init_irq(void)
115 {
116 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
117 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
118 }
119
120 /* Following will create static virtual/physical mappings */
121 static struct map_desc spear6xx_io_desc[] __initdata = {
122 {
123 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
124 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
125 .length = SPEAR6XX_ICM1_UART0_SIZE,
126 .type = MT_DEVICE
127 }, {
128 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
129 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
130 .length = SPEAR6XX_CPU_VIC_PRI_SIZE,
131 .type = MT_DEVICE
132 }, {
133 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
134 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
135 .length = SPEAR6XX_CPU_VIC_SEC_SIZE,
136 .type = MT_DEVICE
137 }, {
138 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
139 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
140 .length = SPEAR6XX_ICM3_MISC_REG_BASE,
141 .type = MT_DEVICE
142 }, {
143 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
144 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
145 .length = SPEAR6XX_ICM3_MISC_REG_SIZE,
146 .type = MT_DEVICE
147 },
148 };
149
150 /* This will create static memory mapping for selected devices */
151 void __init spear6xx_map_io(void)
152 {
153 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
154
155 /* This will initialize clock framework */
156 clk_init();
157 }