arch/arm/mach-tegra/cpu-tegra.c

   1 /*
   2  * arch/arm/mach-tegra/cpu-tegra.c
   3  *
   4  * Copyright (C) 2010 Google, Inc.
   5  *
   6  * Author:
   7  *      Colin Cross <ccross@google.com>
   8  *      Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/sched.h>
  25 #include <linux/cpufreq.h>
  26 #include <linux/delay.h>
  27 #include <linux/init.h>
  28 #include <linux/err.h>
  29 #include <linux/clk.h>
  30 #include <linux/io.h>
  31 #include <linux/suspend.h>
  32
  33 /* Frequency table index must be sequential starting at 0 */
  34 static struct cpufreq_frequency_table freq_table[] = {
  35         { 0, 216000 },
  36         { 1, 312000 },
  37         { 2, 456000 },
  38         { 3, 608000 },
  39         { 4, 760000 },
  40         { 5, 816000 },
  41         { 6, 912000 },
  42         { 7, 1000000 },
  43         { 8, CPUFREQ_TABLE_END },
  44 };
  45
  46 #define NUM_CPUS        2
  47
  48 static struct clk *cpu_clk;
  49 static struct clk *pll_x_clk;
  50 static struct clk *pll_p_clk;
  51 static struct clk *emc_clk;
  52
  53 static unsigned long target_cpu_speed[NUM_CPUS];
  54 static DEFINE_MUTEX(tegra_cpu_lock);
  55 static bool is_suspended;
  56
  57 static int tegra_verify_speed(struct cpufreq_policy *policy)
  58 {
  59         return cpufreq_frequency_table_verify(policy, freq_table);
  60 }
  61
  62 static unsigned int tegra_getspeed(unsigned int cpu)
  63 {
  64         unsigned long rate;
  65
  66         if (cpu >= NUM_CPUS)
  67                 return 0;
  68
  69         rate = clk_get_rate(cpu_clk) / 1000;
  70         return rate;
  71 }
  72
  73 static int tegra_cpu_clk_set_rate(unsigned long rate)
  74 {
  75         int ret;
  76
  77         /*
  78          * Take an extra reference to the main pll so it doesn't turn
  79          * off when we move the cpu off of it
  80          */
  81         clk_prepare_enable(pll_x_clk);
  82
  83         ret = clk_set_parent(cpu_clk, pll_p_clk);
  84         if (ret) {
  85                 pr_err("Failed to switch cpu to clock pll_p\n");
  86                 goto out;
  87         }
  88
  89         if (rate == clk_get_rate(pll_p_clk))
  90                 goto out;
  91
  92         ret = clk_set_rate(pll_x_clk, rate);
  93         if (ret) {
  94                 pr_err("Failed to change pll_x to %lu\n", rate);
  95                 goto out;
  96         }
  97
  98         ret = clk_set_parent(cpu_clk, pll_x_clk);
  99         if (ret) {
 100                 pr_err("Failed to switch cpu to clock pll_x\n");
 101                 goto out;
 102         }
 103
 104 out:
 105         clk_disable_unprepare(pll_x_clk);
 106         return ret;
 107 }
 108
 109 static int tegra_update_cpu_speed(unsigned long rate)
 110 {
 111         int ret = 0;
 112         struct cpufreq_freqs freqs;
 113
 114         freqs.old = tegra_getspeed(0);
 115         freqs.new = rate;
 116
 117         if (freqs.old == freqs.new)
 118                 return ret;
 119
 120         /*
 121          * Vote on memory bus frequency based on cpu frequency
 122          * This sets the minimum frequency, display or avp may request higher
 123          */
 124         if (rate >= 816000)
 125                 clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
 126         else if (rate >= 456000)
 127                 clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
 128         else
 129                 clk_set_rate(emc_clk, 100000000);  /* emc 50Mhz */
 130
 131         for_each_online_cpu(freqs.cpu)
 132                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 133
 134 #ifdef CONFIG_CPU_FREQ_DEBUG
 135         printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n",
 136                freqs.old, freqs.new);
 137 #endif
 138
 139         ret = tegra_cpu_clk_set_rate(freqs.new * 1000);
 140         if (ret) {
 141                 pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
 142                         freqs.new);
 143                 return ret;
 144         }
 145
 146         for_each_online_cpu(freqs.cpu)
 147                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 148
 149         return 0;
 150 }
 151
 152 static unsigned long tegra_cpu_highest_speed(void)
 153 {
 154         unsigned long rate = 0;
 155         int i;
 156
 157         for_each_online_cpu(i)
 158                 rate = max(rate, target_cpu_speed[i]);
 159         return rate;
 160 }
 161
 162 static int tegra_target(struct cpufreq_policy *policy,
 163                        unsigned int target_freq,
 164                        unsigned int relation)
 165 {
 166         unsigned int idx;
 167         unsigned int freq;
 168         int ret = 0;
 169
 170         mutex_lock(&tegra_cpu_lock);
 171
 172         if (is_suspended) {
 173                 ret = -EBUSY;
 174                 goto out;
 175         }
 176
 177         cpufreq_frequency_table_target(policy, freq_table, target_freq,
 178                 relation, &idx);
 179
 180         freq = freq_table[idx].frequency;
 181
 182         target_cpu_speed[policy->cpu] = freq;
 183
 184         ret = tegra_update_cpu_speed(tegra_cpu_highest_speed());
 185
 186 out:
 187         mutex_unlock(&tegra_cpu_lock);
 188         return ret;
 189 }
 190
 191 static int tegra_pm_notify(struct notifier_block *nb, unsigned long event,
 192         void *dummy)
 193 {
 194         mutex_lock(&tegra_cpu_lock);
 195         if (event == PM_SUSPEND_PREPARE) {
 196                 is_suspended = true;
 197                 pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n",
 198                         freq_table[0].frequency);
 199                 tegra_update_cpu_speed(freq_table[0].frequency);
 200         } else if (event == PM_POST_SUSPEND) {
 201                 is_suspended = false;
 202         }
 203         mutex_unlock(&tegra_cpu_lock);
 204
 205         return NOTIFY_OK;
 206 }
 207
 208 static struct notifier_block tegra_cpu_pm_notifier = {
 209         .notifier_call = tegra_pm_notify,
 210 };
 211
 212 static int tegra_cpu_init(struct cpufreq_policy *policy)
 213 {
 214         if (policy->cpu >= NUM_CPUS)
 215                 return -EINVAL;
 216
 217         cpu_clk = clk_get_sys(NULL, "cpu");
 218         if (IS_ERR(cpu_clk))
 219                 return PTR_ERR(cpu_clk);
 220
 221         pll_x_clk = clk_get_sys(NULL, "pll_x");
 222         if (IS_ERR(pll_x_clk))
 223                 return PTR_ERR(pll_x_clk);
 224
 225         pll_p_clk = clk_get_sys(NULL, "pll_p");
 226         if (IS_ERR(pll_p_clk))
 227                 return PTR_ERR(pll_p_clk);
 228
 229         emc_clk = clk_get_sys("cpu", "emc");
 230         if (IS_ERR(emc_clk)) {
 231                 clk_put(cpu_clk);
 232                 return PTR_ERR(emc_clk);
 233         }
 234
 235         clk_prepare_enable(emc_clk);
 236         clk_prepare_enable(cpu_clk);
 237
 238         cpufreq_frequency_table_cpuinfo(policy, freq_table);
 239         cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
 240         policy->cur = tegra_getspeed(policy->cpu);
 241         target_cpu_speed[policy->cpu] = policy->cur;
 242
 243         /* FIXME: what's the actual transition time? */
 244         policy->cpuinfo.transition_latency = 300 * 1000;
 245
 246         policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
 247         cpumask_copy(policy->related_cpus, cpu_possible_mask);
 248
 249         if (policy->cpu == 0)
 250                 register_pm_notifier(&tegra_cpu_pm_notifier);
 251
 252         return 0;
 253 }
 254
 255 static int tegra_cpu_exit(struct cpufreq_policy *policy)
 256 {
 257         cpufreq_frequency_table_cpuinfo(policy, freq_table);
 258         clk_disable_unprepare(emc_clk);
 259         clk_put(emc_clk);
 260         clk_put(cpu_clk);
 261         return 0;
 262 }
 263
 264 static struct freq_attr *tegra_cpufreq_attr[] = {
 265         &cpufreq_freq_attr_scaling_available_freqs,
 266         NULL,
 267 };
 268
 269 static struct cpufreq_driver tegra_cpufreq_driver = {
 270         .verify         = tegra_verify_speed,
 271         .target         = tegra_target,
 272         .get            = tegra_getspeed,
 273         .init           = tegra_cpu_init,
 274         .exit           = tegra_cpu_exit,
 275         .name           = "tegra",
 276         .attr           = tegra_cpufreq_attr,
 277 };
 278
 279 static int __init tegra_cpufreq_init(void)
 280 {
 281         return cpufreq_register_driver(&tegra_cpufreq_driver);
 282 }
 283
 284 static void __exit tegra_cpufreq_exit(void)
 285 {
 286         cpufreq_unregister_driver(&tegra_cpufreq_driver);
 287 }
 288
 289
 290 MODULE_AUTHOR("Colin Cross <ccross@android.com>");
 291 MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
 292 MODULE_LICENSE("GPL");
 293 module_init(tegra_cpufreq_init);
 294 module_exit(tegra_cpufreq_exit);