arch/arm/mach-ux500/board-mop500-sdi.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
   5  * License terms: GNU General Public License (GPL) version 2
   6  */
   7
   8 #include <linux/kernel.h>
   9 #include <linux/gpio.h>
  10 #include <linux/amba/bus.h>
  11 #include <linux/amba/mmci.h>
  12 #include <linux/mmc/host.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/platform_data/dma-ste-dma40.h>
  15
  16 #include <asm/mach-types.h>
  17 #include "devices.h"
  18
  19 #include "db8500-regs.h"
  20 #include "devices-db8500.h"
  21 #include "board-mop500.h"
  22 #include "ste-dma40-db8500.h"
  23
  24 /*
  25  * v2 has a new version of this block that need to be forced, the number found
  26  * in hardware is incorrect
  27  */
  28 #define U8500_SDI_V2_PERIPHID 0x10480180
  29
  30 /*
  31  * SDI 0 (MicroSD slot)
  32  */
  33
  34 #ifdef CONFIG_STE_DMA40
  35 struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
  36         .mode = STEDMA40_MODE_LOGICAL,
  37         .dir = STEDMA40_PERIPH_TO_MEM,
  38         .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,
  39         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  40         .src_info.data_width = STEDMA40_WORD_WIDTH,
  41         .dst_info.data_width = STEDMA40_WORD_WIDTH,
  42 };
  43
  44 static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
  45         .mode = STEDMA40_MODE_LOGICAL,
  46         .dir = STEDMA40_MEM_TO_PERIPH,
  47         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  48         .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,
  49         .src_info.data_width = STEDMA40_WORD_WIDTH,
  50         .dst_info.data_width = STEDMA40_WORD_WIDTH,
  51 };
  52 #endif
  53
  54 struct mmci_platform_data mop500_sdi0_data = {
  55         .ocr_mask       = MMC_VDD_29_30,
  56         .f_max          = 50000000,
  57         .capabilities   = MMC_CAP_4_BIT_DATA |
  58                                 MMC_CAP_SD_HIGHSPEED |
  59                                 MMC_CAP_MMC_HIGHSPEED,
  60         .gpio_wp        = -1,
  61         .sigdir         = MCI_ST_FBCLKEN |
  62                                 MCI_ST_CMDDIREN |
  63                                 MCI_ST_DATA0DIREN |
  64                                 MCI_ST_DATA2DIREN,
  65 #ifdef CONFIG_STE_DMA40
  66         .dma_filter     = stedma40_filter,
  67         .dma_rx_param   = &mop500_sdi0_dma_cfg_rx,
  68         .dma_tx_param   = &mop500_sdi0_dma_cfg_tx,
  69 #endif
  70 };
  71
  72 static void sdi0_configure(struct device *parent)
  73 {
  74         /* Add the device, force v2 to subrevision 1 */
  75         db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
  76 }
  77
  78 void mop500_sdi_tc35892_init(struct device *parent)
  79 {
  80         mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
  81         sdi0_configure(parent);
  82 }
  83
  84 /*
  85  * SDI1 (SDIO WLAN)
  86  */
  87 #ifdef CONFIG_STE_DMA40
  88 static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
  89         .mode = STEDMA40_MODE_LOGICAL,
  90         .dir = STEDMA40_PERIPH_TO_MEM,
  91         .src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
  92         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  93         .src_info.data_width = STEDMA40_WORD_WIDTH,
  94         .dst_info.data_width = STEDMA40_WORD_WIDTH,
  95 };
  96
  97 static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
  98         .mode = STEDMA40_MODE_LOGICAL,
  99         .dir = STEDMA40_MEM_TO_PERIPH,
 100         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 101         .dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
 102         .src_info.data_width = STEDMA40_WORD_WIDTH,
 103         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 104 };
 105 #endif
 106
 107 struct mmci_platform_data mop500_sdi1_data = {
 108         .ocr_mask       = MMC_VDD_29_30,
 109         .f_max          = 50000000,
 110         .capabilities   = MMC_CAP_4_BIT_DATA,
 111         .gpio_cd        = -1,
 112         .gpio_wp        = -1,
 113 #ifdef CONFIG_STE_DMA40
 114         .dma_filter     = stedma40_filter,
 115         .dma_rx_param   = &sdi1_dma_cfg_rx,
 116         .dma_tx_param   = &sdi1_dma_cfg_tx,
 117 #endif
 118 };
 119
 120 /*
 121  * SDI 2 (POP eMMC, not on DB8500ed)
 122  */
 123
 124 #ifdef CONFIG_STE_DMA40
 125 struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
 126         .mode = STEDMA40_MODE_LOGICAL,
 127         .dir = STEDMA40_PERIPH_TO_MEM,
 128         .src_dev_type =  DB8500_DMA_DEV28_SD_MM2_RX,
 129         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
 130         .src_info.data_width = STEDMA40_WORD_WIDTH,
 131         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 132 };
 133
 134 static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
 135         .mode = STEDMA40_MODE_LOGICAL,
 136         .dir = STEDMA40_MEM_TO_PERIPH,
 137         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 138         .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,
 139         .src_info.data_width = STEDMA40_WORD_WIDTH,
 140         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 141 };
 142 #endif
 143
 144 struct mmci_platform_data mop500_sdi2_data = {
 145         .ocr_mask       = MMC_VDD_165_195,
 146         .f_max          = 50000000,
 147         .capabilities   = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
 148                           MMC_CAP_MMC_HIGHSPEED,
 149         .gpio_cd        = -1,
 150         .gpio_wp        = -1,
 151 #ifdef CONFIG_STE_DMA40
 152         .dma_filter     = stedma40_filter,
 153         .dma_rx_param   = &mop500_sdi2_dma_cfg_rx,
 154         .dma_tx_param   = &mop500_sdi2_dma_cfg_tx,
 155 #endif
 156 };
 157
 158 /*
 159  * SDI 4 (on-board eMMC)
 160  */
 161
 162 #ifdef CONFIG_STE_DMA40
 163 struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
 164         .mode = STEDMA40_MODE_LOGICAL,
 165         .dir = STEDMA40_PERIPH_TO_MEM,
 166         .src_dev_type =  DB8500_DMA_DEV42_SD_MM4_RX,
 167         .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
 168         .src_info.data_width = STEDMA40_WORD_WIDTH,
 169         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 170 };
 171
 172 static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
 173         .mode = STEDMA40_MODE_LOGICAL,
 174         .dir = STEDMA40_MEM_TO_PERIPH,
 175         .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
 176         .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,
 177         .src_info.data_width = STEDMA40_WORD_WIDTH,
 178         .dst_info.data_width = STEDMA40_WORD_WIDTH,
 179 };
 180 #endif
 181
 182 struct mmci_platform_data mop500_sdi4_data = {
 183         .ocr_mask       = MMC_VDD_29_30,
 184         .f_max          = 50000000,
 185         .capabilities   = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
 186                           MMC_CAP_MMC_HIGHSPEED,
 187         .gpio_cd        = -1,
 188         .gpio_wp        = -1,
 189 #ifdef CONFIG_STE_DMA40
 190         .dma_filter     = stedma40_filter,
 191         .dma_rx_param   = &mop500_sdi4_dma_cfg_rx,
 192         .dma_tx_param   = &mop500_sdi4_dma_cfg_tx,
 193 #endif
 194 };
 195
 196 void __init mop500_sdi_init(struct device *parent)
 197 {
 198         /* PoP:ed eMMC */
 199         db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
 200         /* On-board eMMC */
 201         db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 202
 203         /*
 204          * On boards with the TC35892 GPIO expander, sdi0 will finally
 205          * be added when the TC35892 initializes and calls
 206          * mop500_sdi_tc35892_init() above.
 207          */
 208 }
 209
 210 void __init snowball_sdi_init(struct device *parent)
 211 {
 212         /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
 213         mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
 214         /* On-board eMMC */
 215         db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 216         /* External Micro SD slot */
 217         mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
 218         mop500_sdi0_data.cd_invert = true;
 219         sdi0_configure(parent);
 220 }
 221
 222 void __init hrefv60_sdi_init(struct device *parent)
 223 {
 224         /* PoP:ed eMMC */
 225         db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
 226         /* On-board eMMC */
 227         db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
 228         /* External Micro SD slot */
 229         mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
 230         sdi0_configure(parent);
 231         /* WLAN SDIO channel */
 232         db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
 233 }