1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-w90x900/time.c
5 * Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
7 * Copyright (c) 2009 Nuvoton technology corporation
10 * Wan ZongShun <mcuos.com@gmail.com>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/err.h>
18 #include <linux/clk.h>
20 #include <linux/leds.h>
21 #include <linux/clocksource.h>
22 #include <linux/clockchips.h>
24 #include <asm/mach-types.h>
25 #include <asm/mach/irq.h>
26 #include <asm/mach/time.h>
29 #include "regs-timer.h"
34 #define PERIOD (0x01 << 27)
35 #define ONESHOT (0x00 << 27)
36 #define COUNTEN (0x01 << 30)
37 #define INTEN (0x01 << 29)
39 #define TICKS_PER_SEC 100
40 #define PRESCALE 0x63 /* Divider = prescale + 1 */
44 static unsigned int timer0_load
;
46 static int nuc900_clockevent_shutdown(struct clock_event_device
*evt
)
48 unsigned int val
= __raw_readl(REG_TCSR0
) & ~(0x03 << 27);
50 __raw_writel(val
, REG_TCSR0
);
54 static int nuc900_clockevent_set_oneshot(struct clock_event_device
*evt
)
56 unsigned int val
= __raw_readl(REG_TCSR0
) & ~(0x03 << 27);
58 val
|= (ONESHOT
| COUNTEN
| INTEN
| PRESCALE
);
60 __raw_writel(val
, REG_TCSR0
);
64 static int nuc900_clockevent_set_periodic(struct clock_event_device
*evt
)
66 unsigned int val
= __raw_readl(REG_TCSR0
) & ~(0x03 << 27);
68 __raw_writel(timer0_load
, REG_TICR0
);
69 val
|= (PERIOD
| COUNTEN
| INTEN
| PRESCALE
);
70 __raw_writel(val
, REG_TCSR0
);
74 static int nuc900_clockevent_setnextevent(unsigned long evt
,
75 struct clock_event_device
*clk
)
79 __raw_writel(evt
, REG_TICR0
);
81 val
= __raw_readl(REG_TCSR0
);
82 val
|= (COUNTEN
| INTEN
| PRESCALE
);
83 __raw_writel(val
, REG_TCSR0
);
88 static struct clock_event_device nuc900_clockevent_device
= {
89 .name
= "nuc900-timer0",
90 .features
= CLOCK_EVT_FEAT_PERIODIC
|
91 CLOCK_EVT_FEAT_ONESHOT
,
92 .set_state_shutdown
= nuc900_clockevent_shutdown
,
93 .set_state_periodic
= nuc900_clockevent_set_periodic
,
94 .set_state_oneshot
= nuc900_clockevent_set_oneshot
,
95 .tick_resume
= nuc900_clockevent_shutdown
,
96 .set_next_event
= nuc900_clockevent_setnextevent
,
100 /*IRQ handler for the timer*/
102 static irqreturn_t
nuc900_timer0_interrupt(int irq
, void *dev_id
)
104 struct clock_event_device
*evt
= &nuc900_clockevent_device
;
106 __raw_writel(0x01, REG_TISR
); /* clear TIF0 */
108 evt
->event_handler(evt
);
112 static struct irqaction nuc900_timer0_irq
= {
113 .name
= "nuc900-timer0",
114 .flags
= IRQF_TIMER
| IRQF_IRQPOLL
,
115 .handler
= nuc900_timer0_interrupt
,
118 static void __init
nuc900_clockevents_init(void)
121 struct clk
*clk
= clk_get(NULL
, "timer0");
125 __raw_writel(0x00, REG_TCSR0
);
128 rate
= clk_get_rate(clk
) / (PRESCALE
+ 1);
130 timer0_load
= (rate
/ TICKS_PER_SEC
);
132 __raw_writel(RESETINT
, REG_TISR
);
133 setup_irq(IRQ_TIMER0
, &nuc900_timer0_irq
);
135 nuc900_clockevent_device
.cpumask
= cpumask_of(0);
137 clockevents_config_and_register(&nuc900_clockevent_device
, rate
,
141 static void __init
nuc900_clocksource_init(void)
145 struct clk
*clk
= clk_get(NULL
, "timer1");
149 __raw_writel(0x00, REG_TCSR1
);
152 rate
= clk_get_rate(clk
) / (PRESCALE
+ 1);
154 __raw_writel(0xffffffff, REG_TICR1
);
156 val
= __raw_readl(REG_TCSR1
);
157 val
|= (COUNTEN
| PERIOD
| PRESCALE
);
158 __raw_writel(val
, REG_TCSR1
);
160 clocksource_mmio_init(REG_TDR1
, "nuc900-timer1", rate
, 200,
161 TDR_SHIFT
, clocksource_mmio_readl_down
);
164 void __init
nuc900_timer_init(void)
166 nuc900_clocksource_init();
167 nuc900_clockevents_init();