arch/arm/mm/copypage-v4wt.c

   1 /*
   2  *  linux/arch/arm/mm/copypage-v4wt.S
   3  *
   4  *  Copyright (C) 1995-1999 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  This is for CPUs with a writethrough cache and 'flush ID cache' is
  11  *  the only supported cache operation.
  12  */
  13 #include <linux/init.h>
  14 #include <linux/highmem.h>
  15
  16 /*
  17  * ARMv4 optimised copy_user_highpage
  18  *
  19  * Since we have writethrough caches, we don't have to worry about
  20  * dirty data in the cache.  However, we do have to ensure that
  21  * subsequent reads are up to date.
  22  */
  23 static void v4wt_copy_user_page(void *kto, const void *kfrom)
  24 {
  25         int tmp;
  26
  27         asm volatile ("\
  28         ldmia   %1!, {r3, r4, ip, lr}           @ 4\n\
  29 1:      stmia   %0!, {r3, r4, ip, lr}           @ 4\n\
  30         ldmia   %1!, {r3, r4, ip, lr}           @ 4+1\n\
  31         stmia   %0!, {r3, r4, ip, lr}           @ 4\n\
  32         ldmia   %1!, {r3, r4, ip, lr}           @ 4\n\
  33         stmia   %0!, {r3, r4, ip, lr}           @ 4\n\
  34         ldmia   %1!, {r3, r4, ip, lr}           @ 4\n\
  35         subs    %2, %2, #1                      @ 1\n\
  36         stmia   %0!, {r3, r4, ip, lr}           @ 4\n\
  37         ldmneia %1!, {r3, r4, ip, lr}           @ 4\n\
  38         bne     1b                              @ 1\n\
  39         mcr     p15, 0, %2, c7, c7, 0           @ flush ID cache"
  40         : "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
  41         : "2" (PAGE_SIZE / 64)
  42         : "r3", "r4", "ip", "lr");
  43 }
  44
  45 void v4wt_copy_user_highpage(struct page *to, struct page *from,
  46         unsigned long vaddr, struct vm_area_struct *vma)
  47 {
  48         void *kto, *kfrom;
  49
  50         kto = kmap_atomic(to);
  51         kfrom = kmap_atomic(from);
  52         v4wt_copy_user_page(kto, kfrom);
  53         kunmap_atomic(kfrom);
  54         kunmap_atomic(kto);
  55 }
  56
  57 /*
  58  * ARMv4 optimised clear_user_page
  59  *
  60  * Same story as above.
  61  */
  62 void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
  63 {
  64         void *ptr, *kaddr = kmap_atomic(page);
  65         asm volatile("\
  66         mov     r1, %2                          @ 1\n\
  67         mov     r2, #0                          @ 1\n\
  68         mov     r3, #0                          @ 1\n\
  69         mov     ip, #0                          @ 1\n\
  70         mov     lr, #0                          @ 1\n\
  71 1:      stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
  72         stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
  73         stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
  74         stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
  75         subs    r1, r1, #1                      @ 1\n\
  76         bne     1b                              @ 1\n\
  77         mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache"
  78         : "=r" (ptr)
  79         : "0" (kaddr), "I" (PAGE_SIZE / 64)
  80         : "r1", "r2", "r3", "ip", "lr");
  81         kunmap_atomic(kaddr);
  82 }
  83
  84 struct cpu_user_fns v4wt_user_fns __initdata = {
  85         .cpu_clear_user_highpage = v4wt_clear_user_highpage,
  86         .cpu_copy_user_highpage = v4wt_copy_user_highpage,
  87 };