2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/bootmem.h>
13 #include <linux/module.h>
15 #include <linux/gfp.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/init.h>
19 #include <linux/device.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/dma-contiguous.h>
22 #include <linux/highmem.h>
23 #include <linux/memblock.h>
24 #include <linux/slab.h>
25 #include <linux/iommu.h>
27 #include <linux/vmalloc.h>
28 #include <linux/sizes.h>
30 #include <asm/memory.h>
31 #include <asm/highmem.h>
32 #include <asm/cacheflush.h>
33 #include <asm/tlbflush.h>
34 #include <asm/mach/arch.h>
35 #include <asm/dma-iommu.h>
36 #include <asm/mach/map.h>
37 #include <asm/system_info.h>
38 #include <asm/dma-contiguous.h>
43 * The DMA API is built upon the notion of "buffer ownership". A buffer
44 * is either exclusively owned by the CPU (and therefore may be accessed
45 * by it) or exclusively owned by the DMA device. These helper functions
46 * represent the transitions between these two ownership states.
48 * Note, however, that on later ARMs, this notion does not work due to
49 * speculative prefetches. We model our approach on the assumption that
50 * the CPU does do speculative prefetches, which means we clean caches
51 * before transfers and delay cache invalidation until transfer completion.
54 static void __dma_page_cpu_to_dev(struct page
*, unsigned long,
55 size_t, enum dma_data_direction
);
56 static void __dma_page_dev_to_cpu(struct page
*, unsigned long,
57 size_t, enum dma_data_direction
);
60 * arm_dma_map_page - map a portion of a page for streaming DMA
61 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
62 * @page: page that buffer resides in
63 * @offset: offset into page for start of buffer
64 * @size: size of buffer to map
65 * @dir: DMA transfer direction
67 * Ensure that any data held in the cache is appropriately discarded
70 * The device owns this memory once this call has completed. The CPU
71 * can regain ownership by calling dma_unmap_page().
73 static dma_addr_t
arm_dma_map_page(struct device
*dev
, struct page
*page
,
74 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
75 struct dma_attrs
*attrs
)
77 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
78 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
79 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
82 static dma_addr_t
arm_coherent_dma_map_page(struct device
*dev
, struct page
*page
,
83 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
84 struct dma_attrs
*attrs
)
86 return pfn_to_dma(dev
, page_to_pfn(page
)) + offset
;
90 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
91 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
92 * @handle: DMA address of buffer
93 * @size: size of buffer (same as passed to dma_map_page)
94 * @dir: DMA transfer direction (same as passed to dma_map_page)
96 * Unmap a page streaming mode DMA translation. The handle and size
97 * must match what was provided in the previous dma_map_page() call.
98 * All other usages are undefined.
100 * After this call, reads by the CPU to the buffer are guaranteed to see
101 * whatever the device wrote there.
103 static void arm_dma_unmap_page(struct device
*dev
, dma_addr_t handle
,
104 size_t size
, enum dma_data_direction dir
,
105 struct dma_attrs
*attrs
)
107 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
108 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev
, handle
)),
109 handle
& ~PAGE_MASK
, size
, dir
);
112 static void arm_dma_sync_single_for_cpu(struct device
*dev
,
113 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
115 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
116 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
117 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
120 static void arm_dma_sync_single_for_device(struct device
*dev
,
121 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
123 unsigned int offset
= handle
& (PAGE_SIZE
- 1);
124 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
-offset
));
125 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
128 struct dma_map_ops arm_dma_ops
= {
129 .alloc
= arm_dma_alloc
,
130 .free
= arm_dma_free
,
131 .mmap
= arm_dma_mmap
,
132 .get_sgtable
= arm_dma_get_sgtable
,
133 .map_page
= arm_dma_map_page
,
134 .unmap_page
= arm_dma_unmap_page
,
135 .map_sg
= arm_dma_map_sg
,
136 .unmap_sg
= arm_dma_unmap_sg
,
137 .sync_single_for_cpu
= arm_dma_sync_single_for_cpu
,
138 .sync_single_for_device
= arm_dma_sync_single_for_device
,
139 .sync_sg_for_cpu
= arm_dma_sync_sg_for_cpu
,
140 .sync_sg_for_device
= arm_dma_sync_sg_for_device
,
141 .set_dma_mask
= arm_dma_set_mask
,
143 EXPORT_SYMBOL(arm_dma_ops
);
145 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
146 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
);
147 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
148 dma_addr_t handle
, struct dma_attrs
*attrs
);
150 struct dma_map_ops arm_coherent_dma_ops
= {
151 .alloc
= arm_coherent_dma_alloc
,
152 .free
= arm_coherent_dma_free
,
153 .mmap
= arm_dma_mmap
,
154 .get_sgtable
= arm_dma_get_sgtable
,
155 .map_page
= arm_coherent_dma_map_page
,
156 .map_sg
= arm_dma_map_sg
,
157 .set_dma_mask
= arm_dma_set_mask
,
159 EXPORT_SYMBOL(arm_coherent_dma_ops
);
161 static int __dma_supported(struct device
*dev
, u64 mask
, bool warn
)
163 unsigned long max_dma_pfn
;
166 * If the mask allows for more memory than we can address,
167 * and we actually have that much memory, then we must
168 * indicate that DMA to this device is not supported.
170 if (sizeof(mask
) != sizeof(dma_addr_t
) &&
171 mask
> (dma_addr_t
)~0 &&
172 dma_to_pfn(dev
, ~0) < max_pfn
) {
174 dev_warn(dev
, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
176 dev_warn(dev
, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
181 max_dma_pfn
= min(max_pfn
, arm_dma_pfn_limit
);
184 * Translate the device's DMA mask to a PFN limit. This
185 * PFN number includes the page which we can DMA to.
187 if (dma_to_pfn(dev
, mask
) < max_dma_pfn
) {
189 dev_warn(dev
, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
191 dma_to_pfn(dev
, 0), dma_to_pfn(dev
, mask
) + 1,
199 static u64
get_coherent_dma_mask(struct device
*dev
)
201 u64 mask
= (u64
)DMA_BIT_MASK(32);
204 mask
= dev
->coherent_dma_mask
;
207 * Sanity check the DMA mask - it must be non-zero, and
208 * must be able to be satisfied by a DMA allocation.
211 dev_warn(dev
, "coherent DMA mask is unset\n");
215 if (!__dma_supported(dev
, mask
, true))
222 static void __dma_clear_buffer(struct page
*page
, size_t size
)
225 * Ensure that the allocated pages are zeroed, and that any data
226 * lurking in the kernel direct-mapped region is invalidated.
228 if (PageHighMem(page
)) {
229 phys_addr_t base
= __pfn_to_phys(page_to_pfn(page
));
230 phys_addr_t end
= base
+ size
;
232 void *ptr
= kmap_atomic(page
);
233 memset(ptr
, 0, PAGE_SIZE
);
234 dmac_flush_range(ptr
, ptr
+ PAGE_SIZE
);
239 outer_flush_range(base
, end
);
241 void *ptr
= page_address(page
);
242 memset(ptr
, 0, size
);
243 dmac_flush_range(ptr
, ptr
+ size
);
244 outer_flush_range(__pa(ptr
), __pa(ptr
) + size
);
249 * Allocate a DMA buffer for 'dev' of size 'size' using the
250 * specified gfp mask. Note that 'size' must be page aligned.
252 static struct page
*__dma_alloc_buffer(struct device
*dev
, size_t size
, gfp_t gfp
)
254 unsigned long order
= get_order(size
);
255 struct page
*page
, *p
, *e
;
257 page
= alloc_pages(gfp
, order
);
262 * Now split the huge page and free the excess pages
264 split_page(page
, order
);
265 for (p
= page
+ (size
>> PAGE_SHIFT
), e
= page
+ (1 << order
); p
< e
; p
++)
268 __dma_clear_buffer(page
, size
);
274 * Free a DMA buffer. 'size' must be page aligned.
276 static void __dma_free_buffer(struct page
*page
, size_t size
)
278 struct page
*e
= page
+ (size
>> PAGE_SHIFT
);
288 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
289 pgprot_t prot
, struct page
**ret_page
,
292 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
293 pgprot_t prot
, struct page
**ret_page
,
297 __dma_alloc_remap(struct page
*page
, size_t size
, gfp_t gfp
, pgprot_t prot
,
300 struct vm_struct
*area
;
304 * DMA allocation can be mapped to user space, so lets
305 * set VM_USERMAP flags too.
307 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
311 addr
= (unsigned long)area
->addr
;
312 area
->phys_addr
= __pfn_to_phys(page_to_pfn(page
));
314 if (ioremap_page_range(addr
, addr
+ size
, area
->phys_addr
, prot
)) {
315 vunmap((void *)addr
);
321 static void __dma_free_remap(void *cpu_addr
, size_t size
)
323 unsigned int flags
= VM_ARM_DMA_CONSISTENT
| VM_USERMAP
;
324 struct vm_struct
*area
= find_vm_area(cpu_addr
);
325 if (!area
|| (area
->flags
& flags
) != flags
) {
326 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
329 unmap_kernel_range((unsigned long)cpu_addr
, size
);
333 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
338 unsigned long *bitmap
;
339 unsigned long nr_pages
;
344 static struct dma_pool atomic_pool
= {
345 .size
= DEFAULT_DMA_COHERENT_POOL_SIZE
,
348 static int __init
early_coherent_pool(char *p
)
350 atomic_pool
.size
= memparse(p
, &p
);
353 early_param("coherent_pool", early_coherent_pool
);
355 void __init
init_dma_coherent_pool_size(unsigned long size
)
358 * Catch any attempt to set the pool size too late.
360 BUG_ON(atomic_pool
.vaddr
);
363 * Set architecture specific coherent pool size only if
364 * it has not been changed by kernel command line parameter.
366 if (atomic_pool
.size
== DEFAULT_DMA_COHERENT_POOL_SIZE
)
367 atomic_pool
.size
= size
;
371 * Initialise the coherent pool for atomic allocations.
373 static int __init
atomic_pool_init(void)
375 struct dma_pool
*pool
= &atomic_pool
;
376 pgprot_t prot
= pgprot_dmacoherent(PAGE_KERNEL
);
377 gfp_t gfp
= GFP_KERNEL
| GFP_DMA
;
378 unsigned long nr_pages
= pool
->size
>> PAGE_SHIFT
;
379 unsigned long *bitmap
;
383 int bitmap_size
= BITS_TO_LONGS(nr_pages
) * sizeof(long);
385 bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
389 pages
= kzalloc(nr_pages
* sizeof(struct page
*), GFP_KERNEL
);
393 if (IS_ENABLED(CONFIG_DMA_CMA
))
394 ptr
= __alloc_from_contiguous(NULL
, pool
->size
, prot
, &page
,
397 ptr
= __alloc_remap_buffer(NULL
, pool
->size
, gfp
, prot
, &page
,
402 for (i
= 0; i
< nr_pages
; i
++)
405 spin_lock_init(&pool
->lock
);
408 pool
->bitmap
= bitmap
;
409 pool
->nr_pages
= nr_pages
;
410 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
411 (unsigned)pool
->size
/ 1024);
419 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
420 (unsigned)pool
->size
/ 1024);
424 * CMA is activated by core_initcall, so we must be called after it.
426 postcore_initcall(atomic_pool_init
);
428 struct dma_contig_early_reserve
{
433 static struct dma_contig_early_reserve dma_mmu_remap
[MAX_CMA_AREAS
] __initdata
;
435 static int dma_mmu_remap_num __initdata
;
437 void __init
dma_contiguous_early_fixup(phys_addr_t base
, unsigned long size
)
439 dma_mmu_remap
[dma_mmu_remap_num
].base
= base
;
440 dma_mmu_remap
[dma_mmu_remap_num
].size
= size
;
444 void __init
dma_contiguous_remap(void)
447 for (i
= 0; i
< dma_mmu_remap_num
; i
++) {
448 phys_addr_t start
= dma_mmu_remap
[i
].base
;
449 phys_addr_t end
= start
+ dma_mmu_remap
[i
].size
;
453 if (end
> arm_lowmem_limit
)
454 end
= arm_lowmem_limit
;
458 map
.pfn
= __phys_to_pfn(start
);
459 map
.virtual = __phys_to_virt(start
);
460 map
.length
= end
- start
;
461 map
.type
= MT_MEMORY_DMA_READY
;
464 * Clear previous low-memory mapping
466 for (addr
= __phys_to_virt(start
); addr
< __phys_to_virt(end
);
468 pmd_clear(pmd_off_k(addr
));
470 iotable_init(&map
, 1);
474 static int __dma_update_pte(pte_t
*pte
, pgtable_t token
, unsigned long addr
,
477 struct page
*page
= virt_to_page(addr
);
478 pgprot_t prot
= *(pgprot_t
*)data
;
480 set_pte_ext(pte
, mk_pte(page
, prot
), 0);
484 static void __dma_remap(struct page
*page
, size_t size
, pgprot_t prot
)
486 unsigned long start
= (unsigned long) page_address(page
);
487 unsigned end
= start
+ size
;
489 apply_to_page_range(&init_mm
, start
, size
, __dma_update_pte
, &prot
);
490 flush_tlb_kernel_range(start
, end
);
493 static void *__alloc_remap_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
494 pgprot_t prot
, struct page
**ret_page
,
499 page
= __dma_alloc_buffer(dev
, size
, gfp
);
503 ptr
= __dma_alloc_remap(page
, size
, gfp
, prot
, caller
);
505 __dma_free_buffer(page
, size
);
513 static void *__alloc_from_pool(size_t size
, struct page
**ret_page
)
515 struct dma_pool
*pool
= &atomic_pool
;
516 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
520 unsigned long align_mask
;
523 WARN(1, "coherent pool not initialised!\n");
528 * Align the region allocation - allocations from pool are rather
529 * small, so align them to their order in pages, minimum is a page
530 * size. This helps reduce fragmentation of the DMA space.
532 align_mask
= (1 << get_order(size
)) - 1;
534 spin_lock_irqsave(&pool
->lock
, flags
);
535 pageno
= bitmap_find_next_zero_area(pool
->bitmap
, pool
->nr_pages
,
536 0, count
, align_mask
);
537 if (pageno
< pool
->nr_pages
) {
538 bitmap_set(pool
->bitmap
, pageno
, count
);
539 ptr
= pool
->vaddr
+ PAGE_SIZE
* pageno
;
540 *ret_page
= pool
->pages
[pageno
];
542 pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
543 "Please increase it with coherent_pool= kernel parameter!\n",
544 (unsigned)pool
->size
/ 1024);
546 spin_unlock_irqrestore(&pool
->lock
, flags
);
551 static bool __in_atomic_pool(void *start
, size_t size
)
553 struct dma_pool
*pool
= &atomic_pool
;
554 void *end
= start
+ size
;
555 void *pool_start
= pool
->vaddr
;
556 void *pool_end
= pool
->vaddr
+ pool
->size
;
558 if (start
< pool_start
|| start
>= pool_end
)
564 WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
565 start
, end
- 1, pool_start
, pool_end
- 1);
570 static int __free_from_pool(void *start
, size_t size
)
572 struct dma_pool
*pool
= &atomic_pool
;
573 unsigned long pageno
, count
;
576 if (!__in_atomic_pool(start
, size
))
579 pageno
= (start
- pool
->vaddr
) >> PAGE_SHIFT
;
580 count
= size
>> PAGE_SHIFT
;
582 spin_lock_irqsave(&pool
->lock
, flags
);
583 bitmap_clear(pool
->bitmap
, pageno
, count
);
584 spin_unlock_irqrestore(&pool
->lock
, flags
);
589 static void *__alloc_from_contiguous(struct device
*dev
, size_t size
,
590 pgprot_t prot
, struct page
**ret_page
,
593 unsigned long order
= get_order(size
);
594 size_t count
= size
>> PAGE_SHIFT
;
598 page
= dma_alloc_from_contiguous(dev
, count
, order
);
602 __dma_clear_buffer(page
, size
);
604 if (PageHighMem(page
)) {
605 ptr
= __dma_alloc_remap(page
, size
, GFP_KERNEL
, prot
, caller
);
607 dma_release_from_contiguous(dev
, page
, count
);
611 __dma_remap(page
, size
, prot
);
612 ptr
= page_address(page
);
618 static void __free_from_contiguous(struct device
*dev
, struct page
*page
,
619 void *cpu_addr
, size_t size
)
621 if (PageHighMem(page
))
622 __dma_free_remap(cpu_addr
, size
);
624 __dma_remap(page
, size
, PAGE_KERNEL
);
625 dma_release_from_contiguous(dev
, page
, size
>> PAGE_SHIFT
);
628 static inline pgprot_t
__get_dma_pgprot(struct dma_attrs
*attrs
, pgprot_t prot
)
630 prot
= dma_get_attr(DMA_ATTR_WRITE_COMBINE
, attrs
) ?
631 pgprot_writecombine(prot
) :
632 pgprot_dmacoherent(prot
);
638 #else /* !CONFIG_MMU */
642 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
643 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
644 #define __alloc_from_pool(size, ret_page) NULL
645 #define __alloc_from_contiguous(dev, size, prot, ret, c) NULL
646 #define __free_from_pool(cpu_addr, size) 0
647 #define __free_from_contiguous(dev, page, cpu_addr, size) do { } while (0)
648 #define __dma_free_remap(cpu_addr, size) do { } while (0)
650 #endif /* CONFIG_MMU */
652 static void *__alloc_simple_buffer(struct device
*dev
, size_t size
, gfp_t gfp
,
653 struct page
**ret_page
)
656 page
= __dma_alloc_buffer(dev
, size
, gfp
);
661 return page_address(page
);
666 static void *__dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
667 gfp_t gfp
, pgprot_t prot
, bool is_coherent
, const void *caller
)
669 u64 mask
= get_coherent_dma_mask(dev
);
670 struct page
*page
= NULL
;
673 #ifdef CONFIG_DMA_API_DEBUG
674 u64 limit
= (mask
+ 1) & ~mask
;
675 if (limit
&& size
>= limit
) {
676 dev_warn(dev
, "coherent allocation too big (requested %#x mask %#llx)\n",
685 if (mask
< 0xffffffffULL
)
689 * Following is a work-around (a.k.a. hack) to prevent pages
690 * with __GFP_COMP being passed to split_page() which cannot
691 * handle them. The real problem is that this flag probably
692 * should be 0 on ARM as it is not supported on this
693 * platform; see CONFIG_HUGETLBFS.
695 gfp
&= ~(__GFP_COMP
);
697 *handle
= DMA_ERROR_CODE
;
698 size
= PAGE_ALIGN(size
);
700 if (is_coherent
|| nommu())
701 addr
= __alloc_simple_buffer(dev
, size
, gfp
, &page
);
702 else if (!(gfp
& __GFP_WAIT
))
703 addr
= __alloc_from_pool(size
, &page
);
704 else if (!IS_ENABLED(CONFIG_DMA_CMA
))
705 addr
= __alloc_remap_buffer(dev
, size
, gfp
, prot
, &page
, caller
);
707 addr
= __alloc_from_contiguous(dev
, size
, prot
, &page
, caller
);
710 *handle
= pfn_to_dma(dev
, page_to_pfn(page
));
716 * Allocate DMA-coherent memory space and return both the kernel remapped
717 * virtual and bus address for that space.
719 void *arm_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*handle
,
720 gfp_t gfp
, struct dma_attrs
*attrs
)
722 pgprot_t prot
= __get_dma_pgprot(attrs
, PAGE_KERNEL
);
725 if (dma_alloc_from_coherent(dev
, size
, handle
, &memory
))
728 return __dma_alloc(dev
, size
, handle
, gfp
, prot
, false,
729 __builtin_return_address(0));
732 static void *arm_coherent_dma_alloc(struct device
*dev
, size_t size
,
733 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
735 pgprot_t prot
= __get_dma_pgprot(attrs
, PAGE_KERNEL
);
738 if (dma_alloc_from_coherent(dev
, size
, handle
, &memory
))
741 return __dma_alloc(dev
, size
, handle
, gfp
, prot
, true,
742 __builtin_return_address(0));
746 * Create userspace mapping for the DMA-coherent memory.
748 int arm_dma_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
749 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
750 struct dma_attrs
*attrs
)
754 unsigned long nr_vma_pages
= (vma
->vm_end
- vma
->vm_start
) >> PAGE_SHIFT
;
755 unsigned long nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
756 unsigned long pfn
= dma_to_pfn(dev
, dma_addr
);
757 unsigned long off
= vma
->vm_pgoff
;
759 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
761 if (dma_mmap_from_coherent(dev
, vma
, cpu_addr
, size
, &ret
))
764 if (off
< nr_pages
&& nr_vma_pages
<= (nr_pages
- off
)) {
765 ret
= remap_pfn_range(vma
, vma
->vm_start
,
767 vma
->vm_end
- vma
->vm_start
,
770 #endif /* CONFIG_MMU */
776 * Free a buffer as defined by the above mapping.
778 static void __arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
779 dma_addr_t handle
, struct dma_attrs
*attrs
,
782 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
784 if (dma_release_from_coherent(dev
, get_order(size
), cpu_addr
))
787 size
= PAGE_ALIGN(size
);
789 if (is_coherent
|| nommu()) {
790 __dma_free_buffer(page
, size
);
791 } else if (__free_from_pool(cpu_addr
, size
)) {
793 } else if (!IS_ENABLED(CONFIG_DMA_CMA
)) {
794 __dma_free_remap(cpu_addr
, size
);
795 __dma_free_buffer(page
, size
);
798 * Non-atomic allocations cannot be freed with IRQs disabled
800 WARN_ON(irqs_disabled());
801 __free_from_contiguous(dev
, page
, cpu_addr
, size
);
805 void arm_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
806 dma_addr_t handle
, struct dma_attrs
*attrs
)
808 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, false);
811 static void arm_coherent_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
812 dma_addr_t handle
, struct dma_attrs
*attrs
)
814 __arm_dma_free(dev
, size
, cpu_addr
, handle
, attrs
, true);
817 int arm_dma_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
818 void *cpu_addr
, dma_addr_t handle
, size_t size
,
819 struct dma_attrs
*attrs
)
821 struct page
*page
= pfn_to_page(dma_to_pfn(dev
, handle
));
824 ret
= sg_alloc_table(sgt
, 1, GFP_KERNEL
);
828 sg_set_page(sgt
->sgl
, page
, PAGE_ALIGN(size
), 0);
832 static void dma_cache_maint_page(struct page
*page
, unsigned long offset
,
833 size_t size
, enum dma_data_direction dir
,
834 void (*op
)(const void *, size_t, int))
839 pfn
= page_to_pfn(page
) + offset
/ PAGE_SIZE
;
843 * A single sg entry may refer to multiple physically contiguous
844 * pages. But we still need to process highmem pages individually.
845 * If highmem is not configured then the bulk of this loop gets
852 page
= pfn_to_page(pfn
);
854 if (PageHighMem(page
)) {
855 if (len
+ offset
> PAGE_SIZE
)
856 len
= PAGE_SIZE
- offset
;
858 if (cache_is_vipt_nonaliasing()) {
859 vaddr
= kmap_atomic(page
);
860 op(vaddr
+ offset
, len
, dir
);
861 kunmap_atomic(vaddr
);
863 vaddr
= kmap_high_get(page
);
865 op(vaddr
+ offset
, len
, dir
);
870 vaddr
= page_address(page
) + offset
;
880 * Make an area consistent for devices.
881 * Note: Drivers should NOT use this function directly, as it will break
882 * platforms with CONFIG_DMABOUNCE.
883 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
885 static void __dma_page_cpu_to_dev(struct page
*page
, unsigned long off
,
886 size_t size
, enum dma_data_direction dir
)
890 dma_cache_maint_page(page
, off
, size
, dir
, dmac_map_area
);
892 paddr
= page_to_phys(page
) + off
;
893 if (dir
== DMA_FROM_DEVICE
) {
894 outer_inv_range(paddr
, paddr
+ size
);
896 outer_clean_range(paddr
, paddr
+ size
);
898 /* FIXME: non-speculating: flush on bidirectional mappings? */
901 static void __dma_page_dev_to_cpu(struct page
*page
, unsigned long off
,
902 size_t size
, enum dma_data_direction dir
)
904 unsigned long paddr
= page_to_phys(page
) + off
;
906 /* FIXME: non-speculating: not required */
907 /* don't bother invalidating if DMA to device */
908 if (dir
!= DMA_TO_DEVICE
)
909 outer_inv_range(paddr
, paddr
+ size
);
911 dma_cache_maint_page(page
, off
, size
, dir
, dmac_unmap_area
);
914 * Mark the D-cache clean for these pages to avoid extra flushing.
916 if (dir
!= DMA_TO_DEVICE
&& size
>= PAGE_SIZE
) {
920 pfn
= page_to_pfn(page
) + off
/ PAGE_SIZE
;
924 left
-= PAGE_SIZE
- off
;
926 while (left
>= PAGE_SIZE
) {
927 page
= pfn_to_page(pfn
++);
928 set_bit(PG_dcache_clean
, &page
->flags
);
935 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
936 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
937 * @sg: list of buffers
938 * @nents: number of buffers to map
939 * @dir: DMA transfer direction
941 * Map a set of buffers described by scatterlist in streaming mode for DMA.
942 * This is the scatter-gather version of the dma_map_single interface.
943 * Here the scatter gather list elements are each tagged with the
944 * appropriate dma address and length. They are obtained via
945 * sg_dma_{address,length}.
947 * Device ownership issues as mentioned for dma_map_single are the same
950 int arm_dma_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
951 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
953 struct dma_map_ops
*ops
= get_dma_ops(dev
);
954 struct scatterlist
*s
;
957 for_each_sg(sg
, s
, nents
, i
) {
958 #ifdef CONFIG_NEED_SG_DMA_LENGTH
959 s
->dma_length
= s
->length
;
961 s
->dma_address
= ops
->map_page(dev
, sg_page(s
), s
->offset
,
962 s
->length
, dir
, attrs
);
963 if (dma_mapping_error(dev
, s
->dma_address
))
969 for_each_sg(sg
, s
, i
, j
)
970 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
975 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
976 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
977 * @sg: list of buffers
978 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
979 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
981 * Unmap a set of streaming mode DMA translations. Again, CPU access
982 * rules concerning calls here are the same as for dma_unmap_single().
984 void arm_dma_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
985 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
987 struct dma_map_ops
*ops
= get_dma_ops(dev
);
988 struct scatterlist
*s
;
992 for_each_sg(sg
, s
, nents
, i
)
993 ops
->unmap_page(dev
, sg_dma_address(s
), sg_dma_len(s
), dir
, attrs
);
997 * arm_dma_sync_sg_for_cpu
998 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
999 * @sg: list of buffers
1000 * @nents: number of buffers to map (returned from dma_map_sg)
1001 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1003 void arm_dma_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1004 int nents
, enum dma_data_direction dir
)
1006 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1007 struct scatterlist
*s
;
1010 for_each_sg(sg
, s
, nents
, i
)
1011 ops
->sync_single_for_cpu(dev
, sg_dma_address(s
), s
->length
,
1016 * arm_dma_sync_sg_for_device
1017 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
1018 * @sg: list of buffers
1019 * @nents: number of buffers to map (returned from dma_map_sg)
1020 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1022 void arm_dma_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1023 int nents
, enum dma_data_direction dir
)
1025 struct dma_map_ops
*ops
= get_dma_ops(dev
);
1026 struct scatterlist
*s
;
1029 for_each_sg(sg
, s
, nents
, i
)
1030 ops
->sync_single_for_device(dev
, sg_dma_address(s
), s
->length
,
1035 * Return whether the given device DMA address mask can be supported
1036 * properly. For example, if your device can only drive the low 24-bits
1037 * during bus mastering, then you would pass 0x00ffffff as the mask
1040 int dma_supported(struct device
*dev
, u64 mask
)
1042 return __dma_supported(dev
, mask
, false);
1044 EXPORT_SYMBOL(dma_supported
);
1046 int arm_dma_set_mask(struct device
*dev
, u64 dma_mask
)
1048 if (!dev
->dma_mask
|| !dma_supported(dev
, dma_mask
))
1051 *dev
->dma_mask
= dma_mask
;
1056 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
1058 static int __init
dma_debug_do_init(void)
1060 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
1063 fs_initcall(dma_debug_do_init
);
1065 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1069 static inline dma_addr_t
__alloc_iova(struct dma_iommu_mapping
*mapping
,
1072 unsigned int order
= get_order(size
);
1073 unsigned int align
= 0;
1074 unsigned int count
, start
;
1075 unsigned long flags
;
1077 if (order
> CONFIG_ARM_DMA_IOMMU_ALIGNMENT
)
1078 order
= CONFIG_ARM_DMA_IOMMU_ALIGNMENT
;
1080 count
= ((PAGE_ALIGN(size
) >> PAGE_SHIFT
) +
1081 (1 << mapping
->order
) - 1) >> mapping
->order
;
1083 if (order
> mapping
->order
)
1084 align
= (1 << (order
- mapping
->order
)) - 1;
1086 spin_lock_irqsave(&mapping
->lock
, flags
);
1087 start
= bitmap_find_next_zero_area(mapping
->bitmap
, mapping
->bits
, 0,
1089 if (start
> mapping
->bits
) {
1090 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1091 return DMA_ERROR_CODE
;
1094 bitmap_set(mapping
->bitmap
, start
, count
);
1095 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1097 return mapping
->base
+ (start
<< (mapping
->order
+ PAGE_SHIFT
));
1100 static inline void __free_iova(struct dma_iommu_mapping
*mapping
,
1101 dma_addr_t addr
, size_t size
)
1103 unsigned int start
= (addr
- mapping
->base
) >>
1104 (mapping
->order
+ PAGE_SHIFT
);
1105 unsigned int count
= ((size
>> PAGE_SHIFT
) +
1106 (1 << mapping
->order
) - 1) >> mapping
->order
;
1107 unsigned long flags
;
1109 spin_lock_irqsave(&mapping
->lock
, flags
);
1110 bitmap_clear(mapping
->bitmap
, start
, count
);
1111 spin_unlock_irqrestore(&mapping
->lock
, flags
);
1114 static struct page
**__iommu_alloc_buffer(struct device
*dev
, size_t size
,
1115 gfp_t gfp
, struct dma_attrs
*attrs
)
1117 struct page
**pages
;
1118 int count
= size
>> PAGE_SHIFT
;
1119 int array_size
= count
* sizeof(struct page
*);
1122 if (array_size
<= PAGE_SIZE
)
1123 pages
= kzalloc(array_size
, gfp
);
1125 pages
= vzalloc(array_size
);
1129 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
))
1131 unsigned long order
= get_order(size
);
1134 page
= dma_alloc_from_contiguous(dev
, count
, order
);
1138 __dma_clear_buffer(page
, size
);
1140 for (i
= 0; i
< count
; i
++)
1141 pages
[i
] = page
+ i
;
1147 * IOMMU can map any pages, so himem can also be used here
1149 gfp
|= __GFP_NOWARN
| __GFP_HIGHMEM
;
1152 int j
, order
= __fls(count
);
1154 pages
[i
] = alloc_pages(gfp
, order
);
1155 while (!pages
[i
] && order
)
1156 pages
[i
] = alloc_pages(gfp
, --order
);
1161 split_page(pages
[i
], order
);
1164 pages
[i
+ j
] = pages
[i
] + j
;
1167 __dma_clear_buffer(pages
[i
], PAGE_SIZE
<< order
);
1169 count
-= 1 << order
;
1176 __free_pages(pages
[i
], 0);
1177 if (array_size
<= PAGE_SIZE
)
1184 static int __iommu_free_buffer(struct device
*dev
, struct page
**pages
,
1185 size_t size
, struct dma_attrs
*attrs
)
1187 int count
= size
>> PAGE_SHIFT
;
1188 int array_size
= count
* sizeof(struct page
*);
1191 if (dma_get_attr(DMA_ATTR_FORCE_CONTIGUOUS
, attrs
)) {
1192 dma_release_from_contiguous(dev
, pages
[0], count
);
1194 for (i
= 0; i
< count
; i
++)
1196 __free_pages(pages
[i
], 0);
1199 if (array_size
<= PAGE_SIZE
)
1207 * Create a CPU mapping for a specified pages
1210 __iommu_alloc_remap(struct page
**pages
, size_t size
, gfp_t gfp
, pgprot_t prot
,
1213 unsigned int i
, nr_pages
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1214 struct vm_struct
*area
;
1217 area
= get_vm_area_caller(size
, VM_ARM_DMA_CONSISTENT
| VM_USERMAP
,
1222 area
->pages
= pages
;
1223 area
->nr_pages
= nr_pages
;
1224 p
= (unsigned long)area
->addr
;
1226 for (i
= 0; i
< nr_pages
; i
++) {
1227 phys_addr_t phys
= __pfn_to_phys(page_to_pfn(pages
[i
]));
1228 if (ioremap_page_range(p
, p
+ PAGE_SIZE
, phys
, prot
))
1234 unmap_kernel_range((unsigned long)area
->addr
, size
);
1240 * Create a mapping in device IO address space for specified pages
1243 __iommu_create_mapping(struct device
*dev
, struct page
**pages
, size_t size
)
1245 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1246 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1247 dma_addr_t dma_addr
, iova
;
1248 int i
, ret
= DMA_ERROR_CODE
;
1250 dma_addr
= __alloc_iova(mapping
, size
);
1251 if (dma_addr
== DMA_ERROR_CODE
)
1255 for (i
= 0; i
< count
; ) {
1256 unsigned int next_pfn
= page_to_pfn(pages
[i
]) + 1;
1257 phys_addr_t phys
= page_to_phys(pages
[i
]);
1258 unsigned int len
, j
;
1260 for (j
= i
+ 1; j
< count
; j
++, next_pfn
++)
1261 if (page_to_pfn(pages
[j
]) != next_pfn
)
1264 len
= (j
- i
) << PAGE_SHIFT
;
1265 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
,
1266 IOMMU_READ
|IOMMU_WRITE
);
1274 iommu_unmap(mapping
->domain
, dma_addr
, iova
-dma_addr
);
1275 __free_iova(mapping
, dma_addr
, size
);
1276 return DMA_ERROR_CODE
;
1279 static int __iommu_remove_mapping(struct device
*dev
, dma_addr_t iova
, size_t size
)
1281 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1284 * add optional in-page offset from iova to size and align
1285 * result to page size
1287 size
= PAGE_ALIGN((iova
& ~PAGE_MASK
) + size
);
1290 iommu_unmap(mapping
->domain
, iova
, size
);
1291 __free_iova(mapping
, iova
, size
);
1295 static struct page
**__atomic_get_pages(void *addr
)
1297 struct dma_pool
*pool
= &atomic_pool
;
1298 struct page
**pages
= pool
->pages
;
1299 int offs
= (addr
- pool
->vaddr
) >> PAGE_SHIFT
;
1301 return pages
+ offs
;
1304 static struct page
**__iommu_get_pages(void *cpu_addr
, struct dma_attrs
*attrs
)
1306 struct vm_struct
*area
;
1308 if (__in_atomic_pool(cpu_addr
, PAGE_SIZE
))
1309 return __atomic_get_pages(cpu_addr
);
1311 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1314 area
= find_vm_area(cpu_addr
);
1315 if (area
&& (area
->flags
& VM_ARM_DMA_CONSISTENT
))
1320 static void *__iommu_alloc_atomic(struct device
*dev
, size_t size
,
1326 addr
= __alloc_from_pool(size
, &page
);
1330 *handle
= __iommu_create_mapping(dev
, &page
, size
);
1331 if (*handle
== DMA_ERROR_CODE
)
1337 __free_from_pool(addr
, size
);
1341 static void __iommu_free_atomic(struct device
*dev
, void *cpu_addr
,
1342 dma_addr_t handle
, size_t size
)
1344 __iommu_remove_mapping(dev
, handle
, size
);
1345 __free_from_pool(cpu_addr
, size
);
1348 static void *arm_iommu_alloc_attrs(struct device
*dev
, size_t size
,
1349 dma_addr_t
*handle
, gfp_t gfp
, struct dma_attrs
*attrs
)
1351 pgprot_t prot
= __get_dma_pgprot(attrs
, PAGE_KERNEL
);
1352 struct page
**pages
;
1355 *handle
= DMA_ERROR_CODE
;
1356 size
= PAGE_ALIGN(size
);
1358 if (!(gfp
& __GFP_WAIT
))
1359 return __iommu_alloc_atomic(dev
, size
, handle
);
1362 * Following is a work-around (a.k.a. hack) to prevent pages
1363 * with __GFP_COMP being passed to split_page() which cannot
1364 * handle them. The real problem is that this flag probably
1365 * should be 0 on ARM as it is not supported on this
1366 * platform; see CONFIG_HUGETLBFS.
1368 gfp
&= ~(__GFP_COMP
);
1370 pages
= __iommu_alloc_buffer(dev
, size
, gfp
, attrs
);
1374 *handle
= __iommu_create_mapping(dev
, pages
, size
);
1375 if (*handle
== DMA_ERROR_CODE
)
1378 if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
))
1381 addr
= __iommu_alloc_remap(pages
, size
, gfp
, prot
,
1382 __builtin_return_address(0));
1389 __iommu_remove_mapping(dev
, *handle
, size
);
1391 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1395 static int arm_iommu_mmap_attrs(struct device
*dev
, struct vm_area_struct
*vma
,
1396 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
1397 struct dma_attrs
*attrs
)
1399 unsigned long uaddr
= vma
->vm_start
;
1400 unsigned long usize
= vma
->vm_end
- vma
->vm_start
;
1401 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1403 vma
->vm_page_prot
= __get_dma_pgprot(attrs
, vma
->vm_page_prot
);
1409 int ret
= vm_insert_page(vma
, uaddr
, *pages
++);
1411 pr_err("Remapping memory failed: %d\n", ret
);
1416 } while (usize
> 0);
1422 * free a page as defined by the above mapping.
1423 * Must not be called with IRQs disabled.
1425 void arm_iommu_free_attrs(struct device
*dev
, size_t size
, void *cpu_addr
,
1426 dma_addr_t handle
, struct dma_attrs
*attrs
)
1428 struct page
**pages
;
1429 size
= PAGE_ALIGN(size
);
1431 if (__in_atomic_pool(cpu_addr
, size
)) {
1432 __iommu_free_atomic(dev
, cpu_addr
, handle
, size
);
1436 pages
= __iommu_get_pages(cpu_addr
, attrs
);
1438 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr
);
1442 if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING
, attrs
)) {
1443 unmap_kernel_range((unsigned long)cpu_addr
, size
);
1447 __iommu_remove_mapping(dev
, handle
, size
);
1448 __iommu_free_buffer(dev
, pages
, size
, attrs
);
1451 static int arm_iommu_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
1452 void *cpu_addr
, dma_addr_t dma_addr
,
1453 size_t size
, struct dma_attrs
*attrs
)
1455 unsigned int count
= PAGE_ALIGN(size
) >> PAGE_SHIFT
;
1456 struct page
**pages
= __iommu_get_pages(cpu_addr
, attrs
);
1461 return sg_alloc_table_from_pages(sgt
, pages
, count
, 0, size
,
1465 static int __dma_direction_to_prot(enum dma_data_direction dir
)
1470 case DMA_BIDIRECTIONAL
:
1471 prot
= IOMMU_READ
| IOMMU_WRITE
;
1476 case DMA_FROM_DEVICE
:
1487 * Map a part of the scatter-gather list into contiguous io address space
1489 static int __map_sg_chunk(struct device
*dev
, struct scatterlist
*sg
,
1490 size_t size
, dma_addr_t
*handle
,
1491 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1494 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1495 dma_addr_t iova
, iova_base
;
1498 struct scatterlist
*s
;
1501 size
= PAGE_ALIGN(size
);
1502 *handle
= DMA_ERROR_CODE
;
1504 iova_base
= iova
= __alloc_iova(mapping
, size
);
1505 if (iova
== DMA_ERROR_CODE
)
1508 for (count
= 0, s
= sg
; count
< (size
>> PAGE_SHIFT
); s
= sg_next(s
)) {
1509 phys_addr_t phys
= page_to_phys(sg_page(s
));
1510 unsigned int len
= PAGE_ALIGN(s
->offset
+ s
->length
);
1513 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1514 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1516 prot
= __dma_direction_to_prot(dir
);
1518 ret
= iommu_map(mapping
->domain
, iova
, phys
, len
, prot
);
1521 count
+= len
>> PAGE_SHIFT
;
1524 *handle
= iova_base
;
1528 iommu_unmap(mapping
->domain
, iova_base
, count
* PAGE_SIZE
);
1529 __free_iova(mapping
, iova_base
, size
);
1533 static int __iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1534 enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1537 struct scatterlist
*s
= sg
, *dma
= sg
, *start
= sg
;
1539 unsigned int offset
= s
->offset
;
1540 unsigned int size
= s
->offset
+ s
->length
;
1541 unsigned int max
= dma_get_max_seg_size(dev
);
1543 for (i
= 1; i
< nents
; i
++) {
1546 s
->dma_address
= DMA_ERROR_CODE
;
1549 if (s
->offset
|| (size
& ~PAGE_MASK
) || size
+ s
->length
> max
) {
1550 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
,
1551 dir
, attrs
, is_coherent
) < 0)
1554 dma
->dma_address
+= offset
;
1555 dma
->dma_length
= size
- offset
;
1557 size
= offset
= s
->offset
;
1564 if (__map_sg_chunk(dev
, start
, size
, &dma
->dma_address
, dir
, attrs
,
1568 dma
->dma_address
+= offset
;
1569 dma
->dma_length
= size
- offset
;
1574 for_each_sg(sg
, s
, count
, i
)
1575 __iommu_remove_mapping(dev
, sg_dma_address(s
), sg_dma_len(s
));
1580 * arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1581 * @dev: valid struct device pointer
1582 * @sg: list of buffers
1583 * @nents: number of buffers to map
1584 * @dir: DMA transfer direction
1586 * Map a set of i/o coherent buffers described by scatterlist in streaming
1587 * mode for DMA. The scatter gather list elements are merged together (if
1588 * possible) and tagged with the appropriate dma address and length. They are
1589 * obtained via sg_dma_{address,length}.
1591 int arm_coherent_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1592 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1594 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, true);
1598 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1599 * @dev: valid struct device pointer
1600 * @sg: list of buffers
1601 * @nents: number of buffers to map
1602 * @dir: DMA transfer direction
1604 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1605 * The scatter gather list elements are merged together (if possible) and
1606 * tagged with the appropriate dma address and length. They are obtained via
1607 * sg_dma_{address,length}.
1609 int arm_iommu_map_sg(struct device
*dev
, struct scatterlist
*sg
,
1610 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1612 return __iommu_map_sg(dev
, sg
, nents
, dir
, attrs
, false);
1615 static void __iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1616 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
,
1619 struct scatterlist
*s
;
1622 for_each_sg(sg
, s
, nents
, i
) {
1624 __iommu_remove_mapping(dev
, sg_dma_address(s
),
1627 !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1628 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
,
1634 * arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1635 * @dev: valid struct device pointer
1636 * @sg: list of buffers
1637 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1638 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1640 * Unmap a set of streaming mode DMA translations. Again, CPU access
1641 * rules concerning calls here are the same as for dma_unmap_single().
1643 void arm_coherent_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
,
1644 int nents
, enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1646 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, true);
1650 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1651 * @dev: valid struct device pointer
1652 * @sg: list of buffers
1653 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1654 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1656 * Unmap a set of streaming mode DMA translations. Again, CPU access
1657 * rules concerning calls here are the same as for dma_unmap_single().
1659 void arm_iommu_unmap_sg(struct device
*dev
, struct scatterlist
*sg
, int nents
,
1660 enum dma_data_direction dir
, struct dma_attrs
*attrs
)
1662 __iommu_unmap_sg(dev
, sg
, nents
, dir
, attrs
, false);
1666 * arm_iommu_sync_sg_for_cpu
1667 * @dev: valid struct device pointer
1668 * @sg: list of buffers
1669 * @nents: number of buffers to map (returned from dma_map_sg)
1670 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1672 void arm_iommu_sync_sg_for_cpu(struct device
*dev
, struct scatterlist
*sg
,
1673 int nents
, enum dma_data_direction dir
)
1675 struct scatterlist
*s
;
1678 for_each_sg(sg
, s
, nents
, i
)
1679 __dma_page_dev_to_cpu(sg_page(s
), s
->offset
, s
->length
, dir
);
1684 * arm_iommu_sync_sg_for_device
1685 * @dev: valid struct device pointer
1686 * @sg: list of buffers
1687 * @nents: number of buffers to map (returned from dma_map_sg)
1688 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1690 void arm_iommu_sync_sg_for_device(struct device
*dev
, struct scatterlist
*sg
,
1691 int nents
, enum dma_data_direction dir
)
1693 struct scatterlist
*s
;
1696 for_each_sg(sg
, s
, nents
, i
)
1697 __dma_page_cpu_to_dev(sg_page(s
), s
->offset
, s
->length
, dir
);
1702 * arm_coherent_iommu_map_page
1703 * @dev: valid struct device pointer
1704 * @page: page that buffer resides in
1705 * @offset: offset into page for start of buffer
1706 * @size: size of buffer to map
1707 * @dir: DMA transfer direction
1709 * Coherent IOMMU aware version of arm_dma_map_page()
1711 static dma_addr_t
arm_coherent_iommu_map_page(struct device
*dev
, struct page
*page
,
1712 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1713 struct dma_attrs
*attrs
)
1715 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1716 dma_addr_t dma_addr
;
1717 int ret
, prot
, len
= PAGE_ALIGN(size
+ offset
);
1719 dma_addr
= __alloc_iova(mapping
, len
);
1720 if (dma_addr
== DMA_ERROR_CODE
)
1723 prot
= __dma_direction_to_prot(dir
);
1725 ret
= iommu_map(mapping
->domain
, dma_addr
, page_to_phys(page
), len
, prot
);
1729 return dma_addr
+ offset
;
1731 __free_iova(mapping
, dma_addr
, len
);
1732 return DMA_ERROR_CODE
;
1736 * arm_iommu_map_page
1737 * @dev: valid struct device pointer
1738 * @page: page that buffer resides in
1739 * @offset: offset into page for start of buffer
1740 * @size: size of buffer to map
1741 * @dir: DMA transfer direction
1743 * IOMMU aware version of arm_dma_map_page()
1745 static dma_addr_t
arm_iommu_map_page(struct device
*dev
, struct page
*page
,
1746 unsigned long offset
, size_t size
, enum dma_data_direction dir
,
1747 struct dma_attrs
*attrs
)
1749 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1750 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1752 return arm_coherent_iommu_map_page(dev
, page
, offset
, size
, dir
, attrs
);
1756 * arm_coherent_iommu_unmap_page
1757 * @dev: valid struct device pointer
1758 * @handle: DMA address of buffer
1759 * @size: size of buffer (same as passed to dma_map_page)
1760 * @dir: DMA transfer direction (same as passed to dma_map_page)
1762 * Coherent IOMMU aware version of arm_dma_unmap_page()
1764 static void arm_coherent_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1765 size_t size
, enum dma_data_direction dir
,
1766 struct dma_attrs
*attrs
)
1768 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1769 dma_addr_t iova
= handle
& PAGE_MASK
;
1770 int offset
= handle
& ~PAGE_MASK
;
1771 int len
= PAGE_ALIGN(size
+ offset
);
1776 iommu_unmap(mapping
->domain
, iova
, len
);
1777 __free_iova(mapping
, iova
, len
);
1781 * arm_iommu_unmap_page
1782 * @dev: valid struct device pointer
1783 * @handle: DMA address of buffer
1784 * @size: size of buffer (same as passed to dma_map_page)
1785 * @dir: DMA transfer direction (same as passed to dma_map_page)
1787 * IOMMU aware version of arm_dma_unmap_page()
1789 static void arm_iommu_unmap_page(struct device
*dev
, dma_addr_t handle
,
1790 size_t size
, enum dma_data_direction dir
,
1791 struct dma_attrs
*attrs
)
1793 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1794 dma_addr_t iova
= handle
& PAGE_MASK
;
1795 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1796 int offset
= handle
& ~PAGE_MASK
;
1797 int len
= PAGE_ALIGN(size
+ offset
);
1802 if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC
, attrs
))
1803 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1805 iommu_unmap(mapping
->domain
, iova
, len
);
1806 __free_iova(mapping
, iova
, len
);
1809 static void arm_iommu_sync_single_for_cpu(struct device
*dev
,
1810 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1812 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1813 dma_addr_t iova
= handle
& PAGE_MASK
;
1814 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1815 unsigned int offset
= handle
& ~PAGE_MASK
;
1820 __dma_page_dev_to_cpu(page
, offset
, size
, dir
);
1823 static void arm_iommu_sync_single_for_device(struct device
*dev
,
1824 dma_addr_t handle
, size_t size
, enum dma_data_direction dir
)
1826 struct dma_iommu_mapping
*mapping
= dev
->archdata
.mapping
;
1827 dma_addr_t iova
= handle
& PAGE_MASK
;
1828 struct page
*page
= phys_to_page(iommu_iova_to_phys(mapping
->domain
, iova
));
1829 unsigned int offset
= handle
& ~PAGE_MASK
;
1834 __dma_page_cpu_to_dev(page
, offset
, size
, dir
);
1837 struct dma_map_ops iommu_ops
= {
1838 .alloc
= arm_iommu_alloc_attrs
,
1839 .free
= arm_iommu_free_attrs
,
1840 .mmap
= arm_iommu_mmap_attrs
,
1841 .get_sgtable
= arm_iommu_get_sgtable
,
1843 .map_page
= arm_iommu_map_page
,
1844 .unmap_page
= arm_iommu_unmap_page
,
1845 .sync_single_for_cpu
= arm_iommu_sync_single_for_cpu
,
1846 .sync_single_for_device
= arm_iommu_sync_single_for_device
,
1848 .map_sg
= arm_iommu_map_sg
,
1849 .unmap_sg
= arm_iommu_unmap_sg
,
1850 .sync_sg_for_cpu
= arm_iommu_sync_sg_for_cpu
,
1851 .sync_sg_for_device
= arm_iommu_sync_sg_for_device
,
1853 .set_dma_mask
= arm_dma_set_mask
,
1856 struct dma_map_ops iommu_coherent_ops
= {
1857 .alloc
= arm_iommu_alloc_attrs
,
1858 .free
= arm_iommu_free_attrs
,
1859 .mmap
= arm_iommu_mmap_attrs
,
1860 .get_sgtable
= arm_iommu_get_sgtable
,
1862 .map_page
= arm_coherent_iommu_map_page
,
1863 .unmap_page
= arm_coherent_iommu_unmap_page
,
1865 .map_sg
= arm_coherent_iommu_map_sg
,
1866 .unmap_sg
= arm_coherent_iommu_unmap_sg
,
1868 .set_dma_mask
= arm_dma_set_mask
,
1872 * arm_iommu_create_mapping
1873 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1874 * @base: start address of the valid IO address space
1875 * @size: size of the valid IO address space
1876 * @order: accuracy of the IO addresses allocations
1878 * Creates a mapping structure which holds information about used/unused
1879 * IO address ranges, which is required to perform memory allocation and
1880 * mapping with IOMMU aware functions.
1882 * The client device need to be attached to the mapping with
1883 * arm_iommu_attach_device function.
1885 struct dma_iommu_mapping
*
1886 arm_iommu_create_mapping(struct bus_type
*bus
, dma_addr_t base
, size_t size
,
1889 unsigned int count
= size
>> (PAGE_SHIFT
+ order
);
1890 unsigned int bitmap_size
= BITS_TO_LONGS(count
) * sizeof(long);
1891 struct dma_iommu_mapping
*mapping
;
1895 return ERR_PTR(-EINVAL
);
1897 mapping
= kzalloc(sizeof(struct dma_iommu_mapping
), GFP_KERNEL
);
1901 mapping
->bitmap
= kzalloc(bitmap_size
, GFP_KERNEL
);
1902 if (!mapping
->bitmap
)
1905 mapping
->base
= base
;
1906 mapping
->bits
= BITS_PER_BYTE
* bitmap_size
;
1907 mapping
->order
= order
;
1908 spin_lock_init(&mapping
->lock
);
1910 mapping
->domain
= iommu_domain_alloc(bus
);
1911 if (!mapping
->domain
)
1914 kref_init(&mapping
->kref
);
1917 kfree(mapping
->bitmap
);
1921 return ERR_PTR(err
);
1923 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping
);
1925 static void release_iommu_mapping(struct kref
*kref
)
1927 struct dma_iommu_mapping
*mapping
=
1928 container_of(kref
, struct dma_iommu_mapping
, kref
);
1930 iommu_domain_free(mapping
->domain
);
1931 kfree(mapping
->bitmap
);
1935 void arm_iommu_release_mapping(struct dma_iommu_mapping
*mapping
)
1938 kref_put(&mapping
->kref
, release_iommu_mapping
);
1940 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping
);
1943 * arm_iommu_attach_device
1944 * @dev: valid struct device pointer
1945 * @mapping: io address space mapping structure (returned from
1946 * arm_iommu_create_mapping)
1948 * Attaches specified io address space mapping to the provided device,
1949 * this replaces the dma operations (dma_map_ops pointer) with the
1950 * IOMMU aware version. More than one client might be attached to
1951 * the same io address space mapping.
1953 int arm_iommu_attach_device(struct device
*dev
,
1954 struct dma_iommu_mapping
*mapping
)
1958 err
= iommu_attach_device(mapping
->domain
, dev
);
1962 kref_get(&mapping
->kref
);
1963 dev
->archdata
.mapping
= mapping
;
1964 set_dma_ops(dev
, &iommu_ops
);
1966 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev
));
1969 EXPORT_SYMBOL_GPL(arm_iommu_attach_device
);
1972 * arm_iommu_detach_device
1973 * @dev: valid struct device pointer
1975 * Detaches the provided device from a previously attached map.
1976 * This voids the dma operations (dma_map_ops pointer)
1978 void arm_iommu_detach_device(struct device
*dev
)
1980 struct dma_iommu_mapping
*mapping
;
1982 mapping
= to_dma_iommu_mapping(dev
);
1984 dev_warn(dev
, "Not attached\n");
1988 iommu_detach_device(mapping
->domain
, dev
);
1989 kref_put(&mapping
->kref
, release_iommu_mapping
);
1990 dev
->archdata
.mapping
= NULL
;
1991 set_dma_ops(dev
, NULL
);
1993 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev
));
1995 EXPORT_SYMBOL_GPL(arm_iommu_detach_device
);