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[ARM] cputype: separate definitions, use them
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1 /*
2 * linux/arch/arm/mm/mmap.c
3 */
4 #include <linux/fs.h>
5 #include <linux/mm.h>
6 #include <linux/mman.h>
7 #include <linux/shm.h>
8 #include <linux/sched.h>
9 #include <asm/cputype.h>
10 #include <asm/system.h>
11
12 #define COLOUR_ALIGN(addr,pgoff) \
13 ((((addr)+SHMLBA-1)&~(SHMLBA-1)) + \
14 (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
15
16 /*
17 * We need to ensure that shared mappings are correctly aligned to
18 * avoid aliasing issues with VIPT caches. We need to ensure that
19 * a specific page of an object is always mapped at a multiple of
20 * SHMLBA bytes.
21 *
22 * We unconditionally provide this function for all cases, however
23 * in the VIVT case, we optimise out the alignment rules.
24 */
25 unsigned long
26 arch_get_unmapped_area(struct file *filp, unsigned long addr,
27 unsigned long len, unsigned long pgoff, unsigned long flags)
28 {
29 struct mm_struct *mm = current->mm;
30 struct vm_area_struct *vma;
31 unsigned long start_addr;
32 #ifdef CONFIG_CPU_V6
33 unsigned int cache_type;
34 int do_align = 0, aliasing = 0;
35
36 /*
37 * We only need to do colour alignment if either the I or D
38 * caches alias. This is indicated by bits 9 and 21 of the
39 * cache type register.
40 */
41 cache_type = read_cpuid_cachetype();
42 if (cache_type != read_cpuid_id()) {
43 aliasing = (cache_type | cache_type >> 12) & (1 << 11);
44 if (aliasing)
45 do_align = filp || flags & MAP_SHARED;
46 }
47 #else
48 #define do_align 0
49 #define aliasing 0
50 #endif
51
52 /*
53 * We enforce the MAP_FIXED case.
54 */
55 if (flags & MAP_FIXED) {
56 if (aliasing && flags & MAP_SHARED && addr & (SHMLBA - 1))
57 return -EINVAL;
58 return addr;
59 }
60
61 if (len > TASK_SIZE)
62 return -ENOMEM;
63
64 if (addr) {
65 if (do_align)
66 addr = COLOUR_ALIGN(addr, pgoff);
67 else
68 addr = PAGE_ALIGN(addr);
69
70 vma = find_vma(mm, addr);
71 if (TASK_SIZE - len >= addr &&
72 (!vma || addr + len <= vma->vm_start))
73 return addr;
74 }
75 if (len > mm->cached_hole_size) {
76 start_addr = addr = mm->free_area_cache;
77 } else {
78 start_addr = addr = TASK_UNMAPPED_BASE;
79 mm->cached_hole_size = 0;
80 }
81
82 full_search:
83 if (do_align)
84 addr = COLOUR_ALIGN(addr, pgoff);
85 else
86 addr = PAGE_ALIGN(addr);
87
88 for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
89 /* At this point: (!vma || addr < vma->vm_end). */
90 if (TASK_SIZE - len < addr) {
91 /*
92 * Start a new search - just in case we missed
93 * some holes.
94 */
95 if (start_addr != TASK_UNMAPPED_BASE) {
96 start_addr = addr = TASK_UNMAPPED_BASE;
97 mm->cached_hole_size = 0;
98 goto full_search;
99 }
100 return -ENOMEM;
101 }
102 if (!vma || addr + len <= vma->vm_start) {
103 /*
104 * Remember the place where we stopped the search:
105 */
106 mm->free_area_cache = addr + len;
107 return addr;
108 }
109 if (addr + mm->cached_hole_size < vma->vm_start)
110 mm->cached_hole_size = vma->vm_start - addr;
111 addr = vma->vm_end;
112 if (do_align)
113 addr = COLOUR_ALIGN(addr, pgoff);
114 }
115 }
116
117
118 /*
119 * You really shouldn't be using read() or write() on /dev/mem. This
120 * might go away in the future.
121 */
122 int valid_phys_addr_range(unsigned long addr, size_t size)
123 {
124 if (addr < PHYS_OFFSET)
125 return 0;
126 if (addr + size > __pa(high_memory))
127 return 0;
128
129 return 1;
130 }
131
132 /*
133 * We don't use supersection mappings for mmap() on /dev/mem, which
134 * means that we can't map the memory area above the 4G barrier into
135 * userspace.
136 */
137 int valid_mmap_phys_addr_range(unsigned long pfn, size_t size)
138 {
139 return !(pfn + (size >> PAGE_SHIFT) > 0x00100000);
140 }