]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/arm/plat-mxc/clock.c
888dd33abf76a7a47006cb2b943d403738801f6b
[mirror_ubuntu-bionic-kernel.git] / arch / arm / plat-mxc / clock.c
1 /*
2 * Based on arch/arm/plat-omap/clock.c
3 *
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
7 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
8 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301, USA.
23 */
24
25 /* #define DEBUG */
26
27 #include <linux/clk.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/io.h>
32 #include <linux/kernel.h>
33 #include <linux/list.h>
34 #include <linux/module.h>
35 #include <linux/mutex.h>
36 #include <linux/platform_device.h>
37 #include <linux/proc_fs.h>
38 #include <linux/semaphore.h>
39 #include <linux/string.h>
40
41 #include <mach/clock.h>
42
43 static LIST_HEAD(clocks);
44 static DEFINE_MUTEX(clocks_mutex);
45
46 /*-------------------------------------------------------------------------
47 * Standard clock functions defined in include/linux/clk.h
48 *-------------------------------------------------------------------------*/
49
50 /*
51 * Retrieve a clock by name.
52 *
53 * Note that we first try to use device id on the bus
54 * and clock name. If this fails, we try to use "<name>.<id>". If this fails,
55 * we try to use clock name only.
56 * The reference count to the clock's module owner ref count is incremented.
57 */
58 struct clk *clk_get(struct device *dev, const char *id)
59 {
60 struct clk *p, *clk = ERR_PTR(-ENOENT);
61 int idno;
62 const char *str;
63
64 if (id == NULL)
65 return clk;
66
67 if (dev == NULL || dev->bus != &platform_bus_type)
68 idno = -1;
69 else
70 idno = to_platform_device(dev)->id;
71
72 mutex_lock(&clocks_mutex);
73
74 list_for_each_entry(p, &clocks, node) {
75 if (p->id == idno &&
76 strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
77 clk = p;
78 goto found;
79 }
80 }
81
82 str = strrchr(id, '.');
83 if (str) {
84 int cnt = str - id;
85 str++;
86 idno = simple_strtol(str, NULL, 10);
87 list_for_each_entry(p, &clocks, node) {
88 if (p->id == idno &&
89 strlen(p->name) == cnt &&
90 strncmp(id, p->name, cnt) == 0 &&
91 try_module_get(p->owner)) {
92 clk = p;
93 goto found;
94 }
95 }
96 }
97
98 list_for_each_entry(p, &clocks, node) {
99 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
100 clk = p;
101 goto found;
102 }
103 }
104
105 printk(KERN_WARNING "clk: Unable to get requested clock: %s\n", id);
106
107 found:
108 mutex_unlock(&clocks_mutex);
109
110 return clk;
111 }
112 EXPORT_SYMBOL(clk_get);
113
114 static void __clk_disable(struct clk *clk)
115 {
116 if (clk == NULL || IS_ERR(clk))
117 return;
118
119 __clk_disable(clk->parent);
120 __clk_disable(clk->secondary);
121
122 if (!(--clk->usecount) && clk->disable)
123 clk->disable(clk);
124 }
125
126 static int __clk_enable(struct clk *clk)
127 {
128 if (clk == NULL || IS_ERR(clk))
129 return -EINVAL;
130
131 __clk_enable(clk->parent);
132 __clk_enable(clk->secondary);
133
134 if (clk->usecount++ == 0 && clk->enable)
135 clk->enable(clk);
136
137 return 0;
138 }
139
140 /* This function increments the reference count on the clock and enables the
141 * clock if not already enabled. The parent clock tree is recursively enabled
142 */
143 int clk_enable(struct clk *clk)
144 {
145 int ret = 0;
146
147 if (clk == NULL || IS_ERR(clk))
148 return -EINVAL;
149
150 mutex_lock(&clocks_mutex);
151 ret = __clk_enable(clk);
152 mutex_unlock(&clocks_mutex);
153
154 return ret;
155 }
156 EXPORT_SYMBOL(clk_enable);
157
158 /* This function decrements the reference count on the clock and disables
159 * the clock when reference count is 0. The parent clock tree is
160 * recursively disabled
161 */
162 void clk_disable(struct clk *clk)
163 {
164 if (clk == NULL || IS_ERR(clk))
165 return;
166
167 mutex_lock(&clocks_mutex);
168 __clk_disable(clk);
169 mutex_unlock(&clocks_mutex);
170 }
171 EXPORT_SYMBOL(clk_disable);
172
173 /* Retrieve the *current* clock rate. If the clock itself
174 * does not provide a special calculation routine, ask
175 * its parent and so on, until one is able to return
176 * a valid clock rate
177 */
178 unsigned long clk_get_rate(struct clk *clk)
179 {
180 if (clk == NULL || IS_ERR(clk))
181 return 0UL;
182
183 if (clk->get_rate)
184 return clk->get_rate(clk);
185
186 return clk_get_rate(clk->parent);
187 }
188 EXPORT_SYMBOL(clk_get_rate);
189
190 /* Decrement the clock's module reference count */
191 void clk_put(struct clk *clk)
192 {
193 if (clk && !IS_ERR(clk))
194 module_put(clk->owner);
195 }
196 EXPORT_SYMBOL(clk_put);
197
198 /* Round the requested clock rate to the nearest supported
199 * rate that is less than or equal to the requested rate.
200 * This is dependent on the clock's current parent.
201 */
202 long clk_round_rate(struct clk *clk, unsigned long rate)
203 {
204 if (clk == NULL || IS_ERR(clk) || !clk->round_rate)
205 return 0;
206
207 return clk->round_rate(clk, rate);
208 }
209 EXPORT_SYMBOL(clk_round_rate);
210
211 /* Set the clock to the requested clock rate. The rate must
212 * match a supported rate exactly based on what clk_round_rate returns
213 */
214 int clk_set_rate(struct clk *clk, unsigned long rate)
215 {
216 int ret = -EINVAL;
217
218 if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0)
219 return ret;
220
221 mutex_lock(&clocks_mutex);
222 ret = clk->set_rate(clk, rate);
223 mutex_unlock(&clocks_mutex);
224
225 return ret;
226 }
227 EXPORT_SYMBOL(clk_set_rate);
228
229 /* Set the clock's parent to another clock source */
230 int clk_set_parent(struct clk *clk, struct clk *parent)
231 {
232 int ret = -EINVAL;
233
234 if (clk == NULL || IS_ERR(clk) || parent == NULL ||
235 IS_ERR(parent) || clk->set_parent == NULL)
236 return ret;
237
238 mutex_lock(&clocks_mutex);
239 ret = clk->set_parent(clk, parent);
240 if (ret == 0)
241 clk->parent = parent;
242 mutex_unlock(&clocks_mutex);
243
244 return ret;
245 }
246 EXPORT_SYMBOL(clk_set_parent);
247
248 /* Retrieve the clock's parent clock source */
249 struct clk *clk_get_parent(struct clk *clk)
250 {
251 struct clk *ret = NULL;
252
253 if (clk == NULL || IS_ERR(clk))
254 return ret;
255
256 return clk->parent;
257 }
258 EXPORT_SYMBOL(clk_get_parent);
259
260 /*
261 * Add a new clock to the clock tree.
262 */
263 int clk_register(struct clk *clk)
264 {
265 if (clk == NULL || IS_ERR(clk))
266 return -EINVAL;
267
268 mutex_lock(&clocks_mutex);
269 list_add(&clk->node, &clocks);
270 mutex_unlock(&clocks_mutex);
271
272 return 0;
273 }
274 EXPORT_SYMBOL(clk_register);
275
276 /* Remove a clock from the clock tree */
277 void clk_unregister(struct clk *clk)
278 {
279 if (clk == NULL || IS_ERR(clk))
280 return;
281
282 mutex_lock(&clocks_mutex);
283 list_del(&clk->node);
284 mutex_unlock(&clocks_mutex);
285 }
286 EXPORT_SYMBOL(clk_unregister);
287
288 #ifdef CONFIG_PROC_FS
289 static int mxc_clock_read_proc(char *page, char **start, off_t off,
290 int count, int *eof, void *data)
291 {
292 struct clk *clkp;
293 char *p = page;
294 int len;
295
296 list_for_each_entry(clkp, &clocks, node) {
297 p += sprintf(p, "%s-%d:\t\t%lu, %d", clkp->name, clkp->id,
298 clk_get_rate(clkp), clkp->usecount);
299 if (clkp->parent)
300 p += sprintf(p, ", %s-%d\n", clkp->parent->name,
301 clkp->parent->id);
302 else
303 p += sprintf(p, "\n");
304 }
305
306 len = (p - page) - off;
307 if (len < 0)
308 len = 0;
309
310 *eof = (len <= count) ? 1 : 0;
311 *start = page + off;
312
313 return len;
314 }
315
316 static int __init mxc_setup_proc_entry(void)
317 {
318 struct proc_dir_entry *res;
319
320 res = create_proc_read_entry("cpu/clocks", 0, NULL,
321 mxc_clock_read_proc, NULL);
322 if (!res) {
323 printk(KERN_ERR "Failed to create proc/cpu/clocks\n");
324 return -ENOMEM;
325 }
326 return 0;
327 }
328
329 late_initcall(mxc_setup_proc_entry);
330 #endif
331
332 /*
333 * Get the resulting clock rate from a PLL register value and the input
334 * frequency. PLLs with this register layout can at least be found on
335 * MX1, MX21, MX27 and MX31
336 *
337 * mfi + mfn / (mfd + 1)
338 * f = 2 * f_ref * --------------------
339 * pd + 1
340 */
341 unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq)
342 {
343 long long ll;
344 int mfn_abs;
345 unsigned int mfi, mfn, mfd, pd;
346
347 mfi = (reg_val >> 10) & 0xf;
348 mfn = reg_val & 0x3ff;
349 mfd = (reg_val >> 16) & 0x3ff;
350 pd = (reg_val >> 26) & 0xf;
351
352 mfi = mfi <= 5 ? 5 : mfi;
353
354 mfn_abs = mfn;
355
356 #if !defined CONFIG_ARCH_MX1 && !defined CONFIG_ARCH_MX21
357 if (mfn >= 0x200) {
358 mfn |= 0xFFFFFE00;
359 mfn_abs = -mfn;
360 }
361 #endif
362
363 freq *= 2;
364 freq /= pd + 1;
365
366 ll = (unsigned long long)freq * mfn_abs;
367
368 do_div(ll, mfd + 1);
369 if (mfn < 0)
370 ll = -ll;
371 ll = (freq * mfi) + ll;
372
373 return ll;
374 }