arch/arm/plat-omap/include/plat/omap-serial.h

   1 /*
   2  * Driver for OMAP-UART controller.
   3  * Based on drivers/serial/8250.c
   4  *
   5  * Copyright (C) 2010 Texas Instruments.
   6  *
   7  * Authors:
   8  *      Govindraj R     <govindraj.raja@ti.com>
   9  *      Thara Gopinath  <thara@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #ifndef __OMAP_SERIAL_H__
  18 #define __OMAP_SERIAL_H__
  19
  20 #include <linux/serial_core.h>
  21 #include <linux/device.h>
  22 #include <linux/pm_qos.h>
  23
  24 #define DRIVER_NAME     "omap_uart"
  25
  26 /*
  27  * Use tty device name as ttyO, [O -> OMAP]
  28  * in bootargs we specify as console=ttyO0 if uart1
  29  * is used as console uart.
  30  */
  31 #define OMAP_SERIAL_NAME        "ttyO"
  32
  33 #define OMAP_MODE13X_SPEED      230400
  34
  35 #define OMAP_UART_SCR_TX_EMPTY  0x08
  36
  37 /* WER = 0x7F
  38  * Enable module level wakeup in WER reg
  39  */
  40 #define OMAP_UART_WER_MOD_WKUP  0X7F
  41
  42 /* Enable XON/XOFF flow control on output */
  43 #define OMAP_UART_SW_TX         0x8
  44
  45 /* Enable XON/XOFF flow control on input */
  46 #define OMAP_UART_SW_RX         0x2
  47
  48 #define OMAP_UART_SYSC_RESET    0X07
  49 #define OMAP_UART_TCR_TRIG      0X0F
  50 #define OMAP_UART_SW_CLR        0XF0
  51 #define OMAP_UART_FIFO_CLR      0X06
  52
  53 #define OMAP_UART_DMA_CH_FREE   -1
  54
  55 #define OMAP_MAX_HSUART_PORTS   4
  56
  57 #define MSR_SAVE_FLAGS          UART_MSR_ANY_DELTA
  58
  59 #define UART_ERRATA_i202_MDR1_ACCESS    BIT(0)
  60 #define UART_ERRATA_i291_DMA_FORCEIDLE  BIT(1)
  61
  62 struct omap_uart_port_info {
  63         bool                    dma_enabled;    /* To specify DMA Mode */
  64         unsigned int            uartclk;        /* UART clock rate */
  65         upf_t                   flags;          /* UPF_* flags */
  66         unsigned int            dma_rx_buf_size;
  67         unsigned int            dma_rx_timeout;
  68         unsigned int            autosuspend_timeout;
  69         unsigned int            dma_rx_poll_rate;
  70         int                     DTR_gpio;
  71         int                     DTR_inverted;
  72         int                     DTR_present;
  73
  74         int (*get_context_loss_count)(struct device *);
  75         void (*set_forceidle)(struct device *);
  76         void (*set_noidle)(struct device *);
  77         void (*enable_wakeup)(struct device *, bool);
  78 };
  79
  80 struct uart_omap_dma {
  81         u8                      uart_dma_tx;
  82         u8                      uart_dma_rx;
  83         int                     rx_dma_channel;
  84         int                     tx_dma_channel;
  85         dma_addr_t              rx_buf_dma_phys;
  86         dma_addr_t              tx_buf_dma_phys;
  87         unsigned int            uart_base;
  88         /*
  89          * Buffer for rx dma.It is not required for tx because the buffer
  90          * comes from port structure.
  91          */
  92         unsigned char           *rx_buf;
  93         unsigned int            prev_rx_dma_pos;
  94         int                     tx_buf_size;
  95         int                     tx_dma_used;
  96         int                     rx_dma_used;
  97         spinlock_t              tx_lock;
  98         spinlock_t              rx_lock;
  99         /* timer to poll activity on rx dma */
 100         struct timer_list       rx_timer;
 101         unsigned int            rx_buf_size;
 102         unsigned int            rx_poll_rate;
 103         unsigned int            rx_timeout;
 104 };
 105
 106 #endif /* __OMAP_SERIAL_H__ */