1 /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
8 * S3C Platform - GPIO pin configuration
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 /* This file contains the necessary definitions to get the basic gpio
16 * pin configuration done such as setting a pin to input or output or
17 * changing the pull-{up,down} configurations.
20 /* Note, this interface is being added to the s3c64xx arch first and will
21 * be added to the s3c24xx systems later.
24 #ifndef __PLAT_GPIO_CFG_H
25 #define __PLAT_GPIO_CFG_H __FILE__
27 typedef unsigned int __bitwise__ s3c_gpio_pull_t
;
28 typedef unsigned int __bitwise__ s5p_gpio_drvstr_t
;
30 /* forward declaration if gpio-core.h hasn't been included */
34 * struct s3c_gpio_cfg GPIO configuration
35 * @cfg_eint: Configuration setting when used for external interrupt source
36 * @get_pull: Read the current pull configuration for the GPIO
37 * @set_pull: Set the current pull configuraiton for the GPIO
38 * @set_config: Set the current configuration for the GPIO
39 * @get_config: Read the current configuration for the GPIO
41 * Each chip can have more than one type of GPIO bank available and some
42 * have different capabilites even when they have the same control register
43 * layouts. Provide an point to vector control routine and provide any
44 * per-bank configuration information that other systems such as the
45 * external interrupt code will need.
49 * @sa s3c_gpio_setpull
50 * @sa s3c_gpio_getpull
53 unsigned int cfg_eint
;
55 s3c_gpio_pull_t (*get_pull
)(struct s3c_gpio_chip
*chip
, unsigned offs
);
56 int (*set_pull
)(struct s3c_gpio_chip
*chip
, unsigned offs
,
57 s3c_gpio_pull_t pull
);
59 unsigned (*get_config
)(struct s3c_gpio_chip
*chip
, unsigned offs
);
60 int (*set_config
)(struct s3c_gpio_chip
*chip
, unsigned offs
,
64 #define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
65 #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
67 /* Defines for generic pin configurations */
68 #define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
69 #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
70 #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
72 #define s3c_gpio_is_cfg_special(_cfg) \
73 (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
76 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
77 * @pin pin The pin number to configure.
78 * @to to The configuration for the pin's function.
80 * Configure which function is actually connected to the external
81 * pin, such as an gpio input, output or some form of special function
82 * connected to an internal peripheral block.
84 * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
85 * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
86 * will then generate the correct bit mask and shift for the configuration.
88 * If a bank of GPIOs all needs to be set to special-function 2, then
89 * the following code will work:
91 * for (gpio = start; gpio < end; gpio++)
92 * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
94 * The @to parameter can also be a specific value already shifted to the
95 * correct position in the control register, although these are discouraged
96 * in newer kernels and are only being kept for compatibility.
98 extern int s3c_gpio_cfgpin(unsigned int pin
, unsigned int to
);
101 * s3c_gpio_getcfg - Read the current function for a GPIO pin
102 * @pin: The pin to read the configuration value for.
104 * Read the configuration state of the given @pin, returning a value that
105 * could be passed back to s3c_gpio_cfgpin().
107 * @sa s3c_gpio_cfgpin
109 extern unsigned s3c_gpio_getcfg(unsigned int pin
);
112 * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
113 * @start: The pin number to start at
114 * @nr: The number of pins to configure from @start.
115 * @cfg: The configuration for the pin's function
117 * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
119 * @sa s3c_gpio_cfgpin.
121 extern int s3c_gpio_cfgpin_range(unsigned int start
, unsigned int nr
,
124 /* Define values for the pull-{up,down} available for each gpio pin.
126 * These values control the state of the weak pull-{up,down} resistors
127 * available on most pins on the S3C series. Not all chips support both
128 * up or down settings, and it may be dependant on the chip that is being
129 * used to whether the particular mode is available.
131 #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
132 #define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01)
133 #define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02)
136 * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
137 * @pin: The pin number to configure the pull resistor.
138 * @pull: The configuration for the pull resistor.
140 * This function sets the state of the pull-{up,down} resistor for the
141 * specified pin. It will return 0 if successfull, or a negative error
142 * code if the pin cannot support the requested pull setting.
144 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
146 extern int s3c_gpio_setpull(unsigned int pin
, s3c_gpio_pull_t pull
);
149 * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
150 * @pin: The pin number to get the settings for
152 * Read the pull resistor value for the specified pin.
154 extern s3c_gpio_pull_t
s3c_gpio_getpull(unsigned int pin
);
156 /* configure `all` aspects of an gpio */
159 * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
160 * @start: The gpio number to start at.
161 * @nr: The number of gpio to configure from @start.
162 * @cfg: The configuration to use
163 * @pull: The pull setting to use.
165 * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
166 * @gpio and running for @size.
168 * @sa s3c_gpio_cfgpin
169 * @sa s3c_gpio_setpull
170 * @sa s3c_gpio_cfgpin_range
172 extern int s3c_gpio_cfgall_range(unsigned int start
, unsigned int nr
,
173 unsigned int cfg
, s3c_gpio_pull_t pull
);
175 static inline int s3c_gpio_cfgrange_nopull(unsigned int pin
, unsigned int size
,
178 return s3c_gpio_cfgall_range(pin
, size
, cfg
, S3C_GPIO_PULL_NONE
);
181 /* Define values for the drvstr available for each gpio pin.
183 * These values control the value of the output signal driver strength,
184 * configurable on most pins on the S5P series.
186 #define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
187 #define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
188 #define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
189 #define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
192 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
193 * @pin: The pin number to get the settings for
195 * Read the driver streght value for the specified pin.
197 extern s5p_gpio_drvstr_t
s5p_gpio_get_drvstr(unsigned int pin
);
200 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
201 * @pin: The pin number to configure the driver streght value
202 * @drvstr: The new value of the driver strength
204 * This function sets the driver strength value for the specified pin.
205 * It will return 0 if successfull, or a negative error code if the pin
206 * cannot support the requested setting.
208 extern int s5p_gpio_set_drvstr(unsigned int pin
, s5p_gpio_drvstr_t drvstr
);
211 * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
212 * @pin: The pin number from the group to be registered
214 * This function registers gpio interrupt support for the group that the
215 * specified pin belongs to.
217 * The total number of gpio pins is quite large ob s5p series. Registering
218 * irq support for all of them would be a resource waste. Because of that the
219 * interrupt support for standard gpio pins is registered dynamically.
221 * It will return the irq number of the interrupt that has been registered
222 * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
223 * to call this function more than once for the same gpio group (the group
224 * will be registered only once).
226 extern int s5p_register_gpio_interrupt(int pin
);
228 /** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt
229 * registration (see s5p_register_gpio_interrupt function)
230 * @chain_irq: chained irq number for the gpio int handler for this bank
231 * @start: start gpio group number of this bank
232 * @nr_groups: number of gpio groups handled by this bank
234 * This functions registers initial information about gpio banks that
235 * can be later used by the s5p_register_gpio_interrupt() function to
236 * enable support for gpio interrupt for particular gpio group.
238 #ifdef CONFIG_S5P_GPIO_INT
239 extern int s5p_register_gpioint_bank(int chain_irq
, int start
, int nr_groups
);
241 #define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0)
244 #endif /* __PLAT_GPIO_CFG_H */