arch/arm26/machine/irq.c

   1 /*
   2  *  linux/arch/arm26/mach-arc/irq.c
   3  *
   4  *  Copyright (C) 1996 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  Changelog:
  11  *   24-09-1996 RMK     Created
  12  *   10-10-1996 RMK     Brought up to date with arch-sa110eval
  13  *   22-10-1996 RMK     Changed interrupt numbers & uses new inb/outb macros
  14  *   11-01-1998 RMK     Added mask_and_ack_irq
  15  *   22-08-1998 RMK     Restructured IRQ routines
  16  *   08-09-2002 IM      Brought up to date for 2.5
  17  *   01-06-2003 JMA     Removed arc_fiq_chip
  18  */
  19 #include <linux/init.h>
  20
  21 #include <asm/irq.h>
  22 #include <asm/irqchip.h>
  23 #include <asm/ioc.h>
  24 #include <asm/io.h>
  25 #include <asm/system.h>
  26
  27 extern void init_FIQ(void);
  28
  29 #define a_clf() clf()
  30 #define a_stf() stf()
  31
  32 static void arc_ack_irq_a(unsigned int irq)
  33 {
  34         unsigned int val, mask;
  35
  36         mask = 1 << irq;
  37         a_clf();
  38         val = ioc_readb(IOC_IRQMASKA);
  39         ioc_writeb(val & ~mask, IOC_IRQMASKA);
  40         ioc_writeb(mask, IOC_IRQCLRA);
  41         a_stf();
  42 }
  43
  44 static void arc_mask_irq_a(unsigned int irq)
  45 {
  46         unsigned int val, mask;
  47
  48         mask = 1 << irq;
  49         a_clf();
  50         val = ioc_readb(IOC_IRQMASKA);
  51         ioc_writeb(val & ~mask, IOC_IRQMASKA);
  52         a_stf();
  53 }
  54
  55 static void arc_unmask_irq_a(unsigned int irq)
  56 {
  57         unsigned int val, mask;
  58
  59         mask = 1 << irq;
  60         a_clf();
  61         val = ioc_readb(IOC_IRQMASKA);
  62         ioc_writeb(val | mask, IOC_IRQMASKA);
  63         a_stf();
  64 }
  65
  66 static struct irqchip arc_a_chip = {
  67         .ack    = arc_ack_irq_a,
  68         .mask   = arc_mask_irq_a,
  69         .unmask = arc_unmask_irq_a,
  70 };
  71
  72 static void arc_mask_irq_b(unsigned int irq)
  73 {
  74         unsigned int val, mask;
  75         mask = 1 << (irq & 7);
  76         val = ioc_readb(IOC_IRQMASKB);
  77         ioc_writeb(val & ~mask, IOC_IRQMASKB);
  78 }
  79
  80 static void arc_unmask_irq_b(unsigned int irq)
  81 {
  82         unsigned int val, mask;
  83
  84         mask = 1 << (irq & 7);
  85         val = ioc_readb(IOC_IRQMASKB);
  86         ioc_writeb(val | mask, IOC_IRQMASKB);
  87 }
  88
  89 static struct irqchip arc_b_chip = {
  90         .ack    = arc_mask_irq_b,
  91         .mask   = arc_mask_irq_b,
  92         .unmask = arc_unmask_irq_b,
  93 };
  94
  95 /* FIXME - JMA none of these functions are used in arm26 currently
  96 static void arc_mask_irq_fiq(unsigned int irq)
  97 {
  98         unsigned int val, mask;
  99
 100         mask = 1 << (irq & 7);
 101         val = ioc_readb(IOC_FIQMASK);
 102         ioc_writeb(val & ~mask, IOC_FIQMASK);
 103 }
 104
 105 static void arc_unmask_irq_fiq(unsigned int irq)
 106 {
 107         unsigned int val, mask;
 108
 109         mask = 1 << (irq & 7);
 110         val = ioc_readb(IOC_FIQMASK);
 111         ioc_writeb(val | mask, IOC_FIQMASK);
 112 }
 113
 114 static struct irqchip arc_fiq_chip = {
 115         .ack    = arc_mask_irq_fiq,
 116         .mask   = arc_mask_irq_fiq,
 117         .unmask = arc_unmask_irq_fiq,
 118 };
 119 */
 120
 121 void __init arc_init_irq(void)
 122 {
 123         unsigned int irq, flags;
 124
 125         /* Disable all IOC interrupt sources */
 126         ioc_writeb(0, IOC_IRQMASKA);
 127         ioc_writeb(0, IOC_IRQMASKB);
 128         ioc_writeb(0, IOC_FIQMASK);
 129
 130         for (irq = 0; irq < NR_IRQS; irq++) {
 131                 flags = IRQF_VALID;
 132
 133                 if (irq <= 6 || (irq >= 9 && irq <= 15))
 134                         flags |= IRQF_PROBE;
 135
 136                 if (irq == IRQ_KEYBOARDTX)
 137                         flags |= IRQF_NOAUTOEN;
 138
 139                 switch (irq) {
 140                 case 0 ... 7:
 141                         set_irq_chip(irq, &arc_a_chip);
 142                         set_irq_handler(irq, do_level_IRQ);
 143                         set_irq_flags(irq, flags);
 144                         break;
 145
 146                 case 8 ... 15:
 147                         set_irq_chip(irq, &arc_b_chip);
 148                         set_irq_handler(irq, do_level_IRQ);
 149                         set_irq_flags(irq, flags);
 150
 151 /*              case 64 ... 72:
 152                         set_irq_chip(irq, &arc_fiq_chip);
 153                         set_irq_flags(irq, flags);
 154                         break;
 155 */
 156
 157                 }
 158         }
 159
 160         irq_desc[IRQ_KEYBOARDTX].noautoenable = 1;
 161
 162         init_FIQ();
 163 }
 164