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ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64
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1 config ARM64
2 def_bool y
3 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
4 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
5 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
6 select ARCH_HAS_GCOV_PROFILE_ALL
7 select ARCH_HAS_SG_CHAIN
8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9 select ARCH_USE_CMPXCHG_LOCKREF
10 select ARCH_SUPPORTS_ATOMIC_RMW
11 select ARCH_WANT_OPTIONAL_GPIOLIB
12 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
13 select ARCH_WANT_FRAME_POINTERS
14 select ARM_AMBA
15 select ARM_ARCH_TIMER
16 select ARM_GIC
17 select AUDIT_ARCH_COMPAT_GENERIC
18 select ARM_GIC_V2M if PCI_MSI
19 select ARM_GIC_V3
20 select ARM_GIC_V3_ITS if PCI_MSI
21 select BUILDTIME_EXTABLE_SORT
22 select CLONE_BACKWARDS
23 select COMMON_CLK
24 select CPU_PM if (SUSPEND || CPU_IDLE)
25 select DCACHE_WORD_ACCESS
26 select GENERIC_ALLOCATOR
27 select GENERIC_CLOCKEVENTS
28 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
29 select GENERIC_CPU_AUTOPROBE
30 select GENERIC_EARLY_IOREMAP
31 select GENERIC_IRQ_PROBE
32 select GENERIC_IRQ_SHOW
33 select GENERIC_PCI_IOMAP
34 select GENERIC_SCHED_CLOCK
35 select GENERIC_SMP_IDLE_THREAD
36 select GENERIC_STRNCPY_FROM_USER
37 select GENERIC_STRNLEN_USER
38 select GENERIC_TIME_VSYSCALL
39 select HANDLE_DOMAIN_IRQ
40 select HARDIRQS_SW_RESEND
41 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
42 select HAVE_ARCH_AUDITSYSCALL
43 select HAVE_ARCH_BITREVERSE
44 select HAVE_ARCH_JUMP_LABEL
45 select HAVE_ARCH_KGDB
46 select HAVE_ARCH_SECCOMP_FILTER
47 select HAVE_ARCH_TRACEHOOK
48 select HAVE_BPF_JIT
49 select HAVE_C_RECORDMCOUNT
50 select HAVE_CC_STACKPROTECTOR
51 select HAVE_CMPXCHG_DOUBLE
52 select HAVE_DEBUG_BUGVERBOSE
53 select HAVE_DEBUG_KMEMLEAK
54 select HAVE_DMA_API_DEBUG
55 select HAVE_DMA_ATTRS
56 select HAVE_DMA_CONTIGUOUS
57 select HAVE_DYNAMIC_FTRACE
58 select HAVE_EFFICIENT_UNALIGNED_ACCESS
59 select HAVE_FTRACE_MCOUNT_RECORD
60 select HAVE_FUNCTION_TRACER
61 select HAVE_FUNCTION_GRAPH_TRACER
62 select HAVE_GENERIC_DMA_COHERENT
63 select HAVE_HW_BREAKPOINT if PERF_EVENTS
64 select HAVE_MEMBLOCK
65 select HAVE_PATA_PLATFORM
66 select HAVE_PERF_EVENTS
67 select HAVE_PERF_REGS
68 select HAVE_PERF_USER_STACK_DUMP
69 select HAVE_RCU_TABLE_FREE
70 select HAVE_SYSCALL_TRACEPOINTS
71 select IRQ_DOMAIN
72 select MODULES_USE_ELF_RELA
73 select NO_BOOTMEM
74 select OF
75 select OF_EARLY_FLATTREE
76 select OF_RESERVED_MEM
77 select PERF_USE_VMALLOC
78 select POWER_RESET
79 select POWER_SUPPLY
80 select RTC_LIB
81 select SPARSE_IRQ
82 select SYSCTL_EXCEPTION_TRACE
83 select HAVE_CONTEXT_TRACKING
84 help
85 ARM 64-bit (AArch64) Linux support.
86
87 config 64BIT
88 def_bool y
89
90 config ARCH_PHYS_ADDR_T_64BIT
91 def_bool y
92
93 config MMU
94 def_bool y
95
96 config NO_IOPORT_MAP
97 def_bool y if !PCI
98
99 config STACKTRACE_SUPPORT
100 def_bool y
101
102 config LOCKDEP_SUPPORT
103 def_bool y
104
105 config TRACE_IRQFLAGS_SUPPORT
106 def_bool y
107
108 config RWSEM_XCHGADD_ALGORITHM
109 def_bool y
110
111 config GENERIC_HWEIGHT
112 def_bool y
113
114 config GENERIC_CSUM
115 def_bool y
116
117 config GENERIC_CALIBRATE_DELAY
118 def_bool y
119
120 config ZONE_DMA
121 def_bool y
122
123 config HAVE_GENERIC_RCU_GUP
124 def_bool y
125
126 config ARCH_DMA_ADDR_T_64BIT
127 def_bool y
128
129 config NEED_DMA_MAP_STATE
130 def_bool y
131
132 config NEED_SG_DMA_LENGTH
133 def_bool y
134
135 config SWIOTLB
136 def_bool y
137
138 config IOMMU_HELPER
139 def_bool SWIOTLB
140
141 config KERNEL_MODE_NEON
142 def_bool y
143
144 config FIX_EARLYCON_MEM
145 def_bool y
146
147 source "init/Kconfig"
148
149 source "kernel/Kconfig.freezer"
150
151 menu "Platform selection"
152
153 config ARCH_EXYNOS
154 bool
155 help
156 This enables support for Samsung Exynos SoC family
157
158 config ARCH_EXYNOS7
159 bool "ARMv8 based Samsung Exynos7"
160 select ARCH_EXYNOS
161 select COMMON_CLK_SAMSUNG
162 select HAVE_S3C2410_WATCHDOG if WATCHDOG
163 select HAVE_S3C_RTC if RTC_CLASS
164 select PINCTRL
165 select PINCTRL_EXYNOS
166
167 help
168 This enables support for Samsung Exynos7 SoC family
169
170 config ARCH_FSL_LS2085A
171 bool "Freescale LS2085A SOC"
172 help
173 This enables support for Freescale LS2085A SOC.
174
175 config ARCH_MEDIATEK
176 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
177 select ARM_GIC
178 help
179 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
180
181 config ARCH_SEATTLE
182 bool "AMD Seattle SoC Family"
183 help
184 This enables support for AMD Seattle SOC Family
185
186 config ARCH_TEGRA
187 bool "NVIDIA Tegra SoC Family"
188 select ARCH_HAS_RESET_CONTROLLER
189 select ARCH_REQUIRE_GPIOLIB
190 select CLKDEV_LOOKUP
191 select CLKSRC_MMIO
192 select CLKSRC_OF
193 select GENERIC_CLOCKEVENTS
194 select HAVE_CLK
195 select PINCTRL
196 select RESET_CONTROLLER
197 help
198 This enables support for the NVIDIA Tegra SoC family.
199
200 config ARCH_TEGRA_132_SOC
201 bool "NVIDIA Tegra132 SoC"
202 depends on ARCH_TEGRA
203 select PINCTRL_TEGRA124
204 select USB_ULPI if USB_PHY
205 select USB_ULPI_VIEWPORT if USB_PHY
206 help
207 Enable support for NVIDIA Tegra132 SoC, based on the Denver
208 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
209 but contains an NVIDIA Denver CPU complex in place of
210 Tegra124's "4+1" Cortex-A15 CPU complex.
211
212 config ARCH_THUNDER
213 bool "Cavium Inc. Thunder SoC Family"
214 help
215 This enables support for Cavium's Thunder Family of SoCs.
216
217 config ARCH_VEXPRESS
218 bool "ARMv8 software model (Versatile Express)"
219 select ARCH_REQUIRE_GPIOLIB
220 select COMMON_CLK_VERSATILE
221 select POWER_RESET_VEXPRESS
222 select VEXPRESS_CONFIG
223 help
224 This enables support for the ARMv8 software model (Versatile
225 Express).
226
227 config ARCH_XGENE
228 bool "AppliedMicro X-Gene SOC Family"
229 help
230 This enables support for AppliedMicro X-Gene SOC Family
231
232 endmenu
233
234 menu "Bus support"
235
236 config PCI
237 bool "PCI support"
238 help
239 This feature enables support for PCI bus system. If you say Y
240 here, the kernel will include drivers and infrastructure code
241 to support PCI bus devices.
242
243 config PCI_DOMAINS
244 def_bool PCI
245
246 config PCI_DOMAINS_GENERIC
247 def_bool PCI
248
249 config PCI_SYSCALL
250 def_bool PCI
251
252 source "drivers/pci/Kconfig"
253 source "drivers/pci/pcie/Kconfig"
254 source "drivers/pci/hotplug/Kconfig"
255
256 endmenu
257
258 menu "Kernel Features"
259
260 menu "ARM errata workarounds via the alternatives framework"
261
262 config ARM64_ERRATUM_826319
263 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
264 default y
265 help
266 This option adds an alternative code sequence to work around ARM
267 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
268 AXI master interface and an L2 cache.
269
270 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
271 and is unable to accept a certain write via this interface, it will
272 not progress on read data presented on the read data channel and the
273 system can deadlock.
274
275 The workaround promotes data cache clean instructions to
276 data cache clean-and-invalidate.
277 Please note that this does not necessarily enable the workaround,
278 as it depends on the alternative framework, which will only patch
279 the kernel if an affected CPU is detected.
280
281 If unsure, say Y.
282
283 config ARM64_ERRATUM_827319
284 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
285 default y
286 help
287 This option adds an alternative code sequence to work around ARM
288 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
289 master interface and an L2 cache.
290
291 Under certain conditions this erratum can cause a clean line eviction
292 to occur at the same time as another transaction to the same address
293 on the AMBA 5 CHI interface, which can cause data corruption if the
294 interconnect reorders the two transactions.
295
296 The workaround promotes data cache clean instructions to
297 data cache clean-and-invalidate.
298 Please note that this does not necessarily enable the workaround,
299 as it depends on the alternative framework, which will only patch
300 the kernel if an affected CPU is detected.
301
302 If unsure, say Y.
303
304 config ARM64_ERRATUM_824069
305 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
306 default y
307 help
308 This option adds an alternative code sequence to work around ARM
309 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
310 to a coherent interconnect.
311
312 If a Cortex-A53 processor is executing a store or prefetch for
313 write instruction at the same time as a processor in another
314 cluster is executing a cache maintenance operation to the same
315 address, then this erratum might cause a clean cache line to be
316 incorrectly marked as dirty.
317
318 The workaround promotes data cache clean instructions to
319 data cache clean-and-invalidate.
320 Please note that this option does not necessarily enable the
321 workaround, as it depends on the alternative framework, which will
322 only patch the kernel if an affected CPU is detected.
323
324 If unsure, say Y.
325
326 config ARM64_ERRATUM_819472
327 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
328 default y
329 help
330 This option adds an alternative code sequence to work around ARM
331 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
332 present when it is connected to a coherent interconnect.
333
334 If the processor is executing a load and store exclusive sequence at
335 the same time as a processor in another cluster is executing a cache
336 maintenance operation to the same address, then this erratum might
337 cause data corruption.
338
339 The workaround promotes data cache clean instructions to
340 data cache clean-and-invalidate.
341 Please note that this does not necessarily enable the workaround,
342 as it depends on the alternative framework, which will only patch
343 the kernel if an affected CPU is detected.
344
345 If unsure, say Y.
346
347 config ARM64_ERRATUM_832075
348 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
349 default y
350 help
351 This option adds an alternative code sequence to work around ARM
352 erratum 832075 on Cortex-A57 parts up to r1p2.
353
354 Affected Cortex-A57 parts might deadlock when exclusive load/store
355 instructions to Write-Back memory are mixed with Device loads.
356
357 The workaround is to promote device loads to use Load-Acquire
358 semantics.
359 Please note that this does not necessarily enable the workaround,
360 as it depends on the alternative framework, which will only patch
361 the kernel if an affected CPU is detected.
362
363 If unsure, say Y.
364
365 endmenu
366
367
368 choice
369 prompt "Page size"
370 default ARM64_4K_PAGES
371 help
372 Page size (translation granule) configuration.
373
374 config ARM64_4K_PAGES
375 bool "4KB"
376 help
377 This feature enables 4KB pages support.
378
379 config ARM64_64K_PAGES
380 bool "64KB"
381 help
382 This feature enables 64KB pages support (4KB by default)
383 allowing only two levels of page tables and faster TLB
384 look-up. AArch32 emulation is not available when this feature
385 is enabled.
386
387 endchoice
388
389 choice
390 prompt "Virtual address space size"
391 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
392 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
393 help
394 Allows choosing one of multiple possible virtual address
395 space sizes. The level of translation table is determined by
396 a combination of page size and virtual address space size.
397
398 config ARM64_VA_BITS_39
399 bool "39-bit"
400 depends on ARM64_4K_PAGES
401
402 config ARM64_VA_BITS_42
403 bool "42-bit"
404 depends on ARM64_64K_PAGES
405
406 config ARM64_VA_BITS_48
407 bool "48-bit"
408
409 endchoice
410
411 config ARM64_VA_BITS
412 int
413 default 39 if ARM64_VA_BITS_39
414 default 42 if ARM64_VA_BITS_42
415 default 48 if ARM64_VA_BITS_48
416
417 config ARM64_PGTABLE_LEVELS
418 int
419 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
420 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
421 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
422 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
423
424 config CPU_BIG_ENDIAN
425 bool "Build big-endian kernel"
426 help
427 Say Y if you plan on running a kernel in big-endian mode.
428
429 config SMP
430 bool "Symmetric Multi-Processing"
431 help
432 This enables support for systems with more than one CPU. If
433 you say N here, the kernel will run on single and
434 multiprocessor machines, but will use only one CPU of a
435 multiprocessor machine. If you say Y here, the kernel will run
436 on many, but not all, single processor machines. On a single
437 processor machine, the kernel will run faster if you say N
438 here.
439
440 If you don't know what to do here, say N.
441
442 config SCHED_MC
443 bool "Multi-core scheduler support"
444 depends on SMP
445 help
446 Multi-core scheduler support improves the CPU scheduler's decision
447 making when dealing with multi-core CPU chips at a cost of slightly
448 increased overhead in some places. If unsure say N here.
449
450 config SCHED_SMT
451 bool "SMT scheduler support"
452 depends on SMP
453 help
454 Improves the CPU scheduler's decision making when dealing with
455 MultiThreading at a cost of slightly increased overhead in some
456 places. If unsure say N here.
457
458 config NR_CPUS
459 int "Maximum number of CPUs (2-64)"
460 range 2 64
461 depends on SMP
462 # These have to remain sorted largest to smallest
463 default "64"
464
465 config HOTPLUG_CPU
466 bool "Support for hot-pluggable CPUs"
467 depends on SMP
468 help
469 Say Y here to experiment with turning CPUs off and on. CPUs
470 can be controlled through /sys/devices/system/cpu.
471
472 source kernel/Kconfig.preempt
473
474 config HZ
475 int
476 default 100
477
478 config ARCH_HAS_HOLES_MEMORYMODEL
479 def_bool y if SPARSEMEM
480
481 config ARCH_SPARSEMEM_ENABLE
482 def_bool y
483 select SPARSEMEM_VMEMMAP_ENABLE
484
485 config ARCH_SPARSEMEM_DEFAULT
486 def_bool ARCH_SPARSEMEM_ENABLE
487
488 config ARCH_SELECT_MEMORY_MODEL
489 def_bool ARCH_SPARSEMEM_ENABLE
490
491 config HAVE_ARCH_PFN_VALID
492 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
493
494 config HW_PERF_EVENTS
495 bool "Enable hardware performance counter support for perf events"
496 depends on PERF_EVENTS
497 default y
498 help
499 Enable hardware performance counter support for perf events. If
500 disabled, perf events will use software events only.
501
502 config SYS_SUPPORTS_HUGETLBFS
503 def_bool y
504
505 config ARCH_WANT_GENERAL_HUGETLB
506 def_bool y
507
508 config ARCH_WANT_HUGE_PMD_SHARE
509 def_bool y if !ARM64_64K_PAGES
510
511 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
512 def_bool y
513
514 config ARCH_HAS_CACHE_LINE_SIZE
515 def_bool y
516
517 source "mm/Kconfig"
518
519 config SECCOMP
520 bool "Enable seccomp to safely compute untrusted bytecode"
521 ---help---
522 This kernel feature is useful for number crunching applications
523 that may need to compute untrusted bytecode during their
524 execution. By using pipes or other transports made available to
525 the process as file descriptors supporting the read/write
526 syscalls, it's possible to isolate those applications in
527 their own address space using seccomp. Once seccomp is
528 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
529 and the task is only allowed to execute a few safe syscalls
530 defined by each seccomp mode.
531
532 config XEN_DOM0
533 def_bool y
534 depends on XEN
535
536 config XEN
537 bool "Xen guest support on ARM64"
538 depends on ARM64 && OF
539 select SWIOTLB_XEN
540 help
541 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
542
543 config FORCE_MAX_ZONEORDER
544 int
545 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
546 default "11"
547
548 menuconfig ARMV8_DEPRECATED
549 bool "Emulate deprecated/obsolete ARMv8 instructions"
550 depends on COMPAT
551 help
552 Legacy software support may require certain instructions
553 that have been deprecated or obsoleted in the architecture.
554
555 Enable this config to enable selective emulation of these
556 features.
557
558 If unsure, say Y
559
560 if ARMV8_DEPRECATED
561
562 config SWP_EMULATION
563 bool "Emulate SWP/SWPB instructions"
564 help
565 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
566 they are always undefined. Say Y here to enable software
567 emulation of these instructions for userspace using LDXR/STXR.
568
569 In some older versions of glibc [<=2.8] SWP is used during futex
570 trylock() operations with the assumption that the code will not
571 be preempted. This invalid assumption may be more likely to fail
572 with SWP emulation enabled, leading to deadlock of the user
573 application.
574
575 NOTE: when accessing uncached shared regions, LDXR/STXR rely
576 on an external transaction monitoring block called a global
577 monitor to maintain update atomicity. If your system does not
578 implement a global monitor, this option can cause programs that
579 perform SWP operations to uncached memory to deadlock.
580
581 If unsure, say Y
582
583 config CP15_BARRIER_EMULATION
584 bool "Emulate CP15 Barrier instructions"
585 help
586 The CP15 barrier instructions - CP15ISB, CP15DSB, and
587 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
588 strongly recommended to use the ISB, DSB, and DMB
589 instructions instead.
590
591 Say Y here to enable software emulation of these
592 instructions for AArch32 userspace code. When this option is
593 enabled, CP15 barrier usage is traced which can help
594 identify software that needs updating.
595
596 If unsure, say Y
597
598 config SETEND_EMULATION
599 bool "Emulate SETEND instruction"
600 help
601 The SETEND instruction alters the data-endianness of the
602 AArch32 EL0, and is deprecated in ARMv8.
603
604 Say Y here to enable software emulation of the instruction
605 for AArch32 userspace code.
606
607 Note: All the cpus on the system must have mixed endian support at EL0
608 for this feature to be enabled. If a new CPU - which doesn't support mixed
609 endian - is hotplugged in after this feature has been enabled, there could
610 be unexpected results in the applications.
611
612 If unsure, say Y
613 endif
614
615 endmenu
616
617 menu "Boot options"
618
619 config CMDLINE
620 string "Default kernel command string"
621 default ""
622 help
623 Provide a set of default command-line options at build time by
624 entering them here. As a minimum, you should specify the the
625 root device (e.g. root=/dev/nfs).
626
627 config CMDLINE_FORCE
628 bool "Always use the default kernel command string"
629 help
630 Always use the default kernel command string, even if the boot
631 loader passes other arguments to the kernel.
632 This is useful if you cannot or don't want to change the
633 command-line options your boot loader passes to the kernel.
634
635 config EFI_STUB
636 bool
637
638 config EFI
639 bool "UEFI runtime support"
640 depends on OF && !CPU_BIG_ENDIAN
641 select LIBFDT
642 select UCS2_STRING
643 select EFI_PARAMS_FROM_FDT
644 select EFI_RUNTIME_WRAPPERS
645 select EFI_STUB
646 select EFI_ARMSTUB
647 default y
648 help
649 This option provides support for runtime services provided
650 by UEFI firmware (such as non-volatile variables, realtime
651 clock, and platform reset). A UEFI stub is also provided to
652 allow the kernel to be booted as an EFI application. This
653 is only useful on systems that have UEFI firmware.
654
655 config DMI
656 bool "Enable support for SMBIOS (DMI) tables"
657 depends on EFI
658 default y
659 help
660 This enables SMBIOS/DMI feature for systems.
661
662 This option is only useful on systems that have UEFI firmware.
663 However, even with this option, the resultant kernel should
664 continue to boot on existing non-UEFI platforms.
665
666 endmenu
667
668 menu "Userspace binary formats"
669
670 source "fs/Kconfig.binfmt"
671
672 config COMPAT
673 bool "Kernel support for 32-bit EL0"
674 depends on !ARM64_64K_PAGES
675 select COMPAT_BINFMT_ELF
676 select HAVE_UID16
677 select OLD_SIGSUSPEND3
678 select COMPAT_OLD_SIGACTION
679 help
680 This option enables support for a 32-bit EL0 running under a 64-bit
681 kernel at EL1. AArch32-specific components such as system calls,
682 the user helper functions, VFP support and the ptrace interface are
683 handled appropriately by the kernel.
684
685 If you want to execute 32-bit userspace applications, say Y.
686
687 config SYSVIPC_COMPAT
688 def_bool y
689 depends on COMPAT && SYSVIPC
690
691 endmenu
692
693 menu "Power management options"
694
695 source "kernel/power/Kconfig"
696
697 config ARCH_SUSPEND_POSSIBLE
698 def_bool y
699
700 endmenu
701
702 menu "CPU Power Management"
703
704 source "drivers/cpuidle/Kconfig"
705
706 source "drivers/cpufreq/Kconfig"
707
708 endmenu
709
710 source "net/Kconfig"
711
712 source "drivers/Kconfig"
713
714 source "drivers/firmware/Kconfig"
715
716 source "fs/Kconfig"
717
718 source "arch/arm64/kvm/Kconfig"
719
720 source "arch/arm64/Kconfig.debug"
721
722 source "security/Kconfig"
723
724 source "crypto/Kconfig"
725 if CRYPTO
726 source "arch/arm64/crypto/Kconfig"
727 endif
728
729 source "lib/Kconfig"