3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
5 select ARCH_HAS_GCOV_PROFILE_ALL
6 select ARCH_HAS_SG_CHAIN
7 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
8 select ARCH_USE_CMPXCHG_LOCKREF
9 select ARCH_SUPPORTS_ATOMIC_RMW
10 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
12 select ARCH_WANT_FRAME_POINTERS
16 select AUDIT_ARCH_COMPAT_GENERIC
18 select BUILDTIME_EXTABLE_SORT
19 select CLONE_BACKWARDS
21 select CPU_PM if (SUSPEND || CPU_IDLE)
22 select DCACHE_WORD_ACCESS
23 select GENERIC_ALLOCATOR
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
26 select GENERIC_CPU_AUTOPROBE
27 select GENERIC_EARLY_IOREMAP
28 select GENERIC_IRQ_PROBE
29 select GENERIC_IRQ_SHOW
30 select GENERIC_PCI_IOMAP
31 select GENERIC_SCHED_CLOCK
32 select GENERIC_SMP_IDLE_THREAD
33 select GENERIC_STRNCPY_FROM_USER
34 select GENERIC_STRNLEN_USER
35 select GENERIC_TIME_VSYSCALL
36 select HANDLE_DOMAIN_IRQ
37 select HARDIRQS_SW_RESEND
38 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
39 select HAVE_ARCH_AUDITSYSCALL
40 select HAVE_ARCH_JUMP_LABEL
42 select HAVE_ARCH_SECCOMP_FILTER
43 select HAVE_ARCH_TRACEHOOK
45 select HAVE_C_RECORDMCOUNT
46 select HAVE_CC_STACKPROTECTOR
47 select HAVE_CMPXCHG_DOUBLE
48 select HAVE_DEBUG_BUGVERBOSE
49 select HAVE_DEBUG_KMEMLEAK
50 select HAVE_DMA_API_DEBUG
52 select HAVE_DMA_CONTIGUOUS
53 select HAVE_DYNAMIC_FTRACE
54 select HAVE_EFFICIENT_UNALIGNED_ACCESS
55 select HAVE_FTRACE_MCOUNT_RECORD
56 select HAVE_FUNCTION_TRACER
57 select HAVE_FUNCTION_GRAPH_TRACER
58 select HAVE_GENERIC_DMA_COHERENT
59 select HAVE_HW_BREAKPOINT if PERF_EVENTS
61 select HAVE_PATA_PLATFORM
62 select HAVE_PERF_EVENTS
64 select HAVE_PERF_USER_STACK_DUMP
65 select HAVE_RCU_TABLE_FREE
66 select HAVE_SYSCALL_TRACEPOINTS
68 select MODULES_USE_ELF_RELA
71 select OF_EARLY_FLATTREE
72 select OF_RESERVED_MEM
73 select PERF_USE_VMALLOC
78 select SYSCTL_EXCEPTION_TRACE
79 select HAVE_CONTEXT_TRACKING
81 ARM 64-bit (AArch64) Linux support.
86 config ARCH_PHYS_ADDR_T_64BIT
95 config STACKTRACE_SUPPORT
98 config LOCKDEP_SUPPORT
101 config TRACE_IRQFLAGS_SUPPORT
104 config RWSEM_XCHGADD_ALGORITHM
107 config GENERIC_HWEIGHT
113 config GENERIC_CALIBRATE_DELAY
119 config HAVE_GENERIC_RCU_GUP
122 config ARCH_DMA_ADDR_T_64BIT
125 config NEED_DMA_MAP_STATE
128 config NEED_SG_DMA_LENGTH
137 config KERNEL_MODE_NEON
140 config FIX_EARLYCON_MEM
143 source "init/Kconfig"
145 source "kernel/Kconfig.freezer"
147 menu "Platform selection"
150 bool "AMD Seattle SoC Family"
152 This enables support for AMD Seattle SOC Family
155 bool "Cavium Inc. Thunder SoC Family"
157 This enables support for Cavium's Thunder Family of SoCs.
160 bool "ARMv8 software model (Versatile Express)"
161 select ARCH_REQUIRE_GPIOLIB
162 select COMMON_CLK_VERSATILE
163 select POWER_RESET_VEXPRESS
164 select VEXPRESS_CONFIG
166 This enables support for the ARMv8 software model (Versatile
170 bool "AppliedMicro X-Gene SOC Family"
172 This enables support for AppliedMicro X-Gene SOC Family
181 This feature enables support for PCI bus system. If you say Y
182 here, the kernel will include drivers and infrastructure code
183 to support PCI bus devices.
188 config PCI_DOMAINS_GENERIC
194 source "drivers/pci/Kconfig"
195 source "drivers/pci/pcie/Kconfig"
196 source "drivers/pci/hotplug/Kconfig"
200 menu "Kernel Features"
202 menu "ARM errata workarounds via the alternatives framework"
204 config ARM64_ERRATUM_826319
205 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
208 This option adds an alternative code sequence to work around ARM
209 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
210 AXI master interface and an L2 cache.
212 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
213 and is unable to accept a certain write via this interface, it will
214 not progress on read data presented on the read data channel and the
217 The workaround promotes data cache clean instructions to
218 data cache clean-and-invalidate.
219 Please note that this does not necessarily enable the workaround,
220 as it depends on the alternative framework, which will only patch
221 the kernel if an affected CPU is detected.
225 config ARM64_ERRATUM_827319
226 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
229 This option adds an alternative code sequence to work around ARM
230 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
231 master interface and an L2 cache.
233 Under certain conditions this erratum can cause a clean line eviction
234 to occur at the same time as another transaction to the same address
235 on the AMBA 5 CHI interface, which can cause data corruption if the
236 interconnect reorders the two transactions.
238 The workaround promotes data cache clean instructions to
239 data cache clean-and-invalidate.
240 Please note that this does not necessarily enable the workaround,
241 as it depends on the alternative framework, which will only patch
242 the kernel if an affected CPU is detected.
246 config ARM64_ERRATUM_824069
247 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
250 This option adds an alternative code sequence to work around ARM
251 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
252 to a coherent interconnect.
254 If a Cortex-A53 processor is executing a store or prefetch for
255 write instruction at the same time as a processor in another
256 cluster is executing a cache maintenance operation to the same
257 address, then this erratum might cause a clean cache line to be
258 incorrectly marked as dirty.
260 The workaround promotes data cache clean instructions to
261 data cache clean-and-invalidate.
262 Please note that this option does not necessarily enable the
263 workaround, as it depends on the alternative framework, which will
264 only patch the kernel if an affected CPU is detected.
268 config ARM64_ERRATUM_819472
269 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
272 This option adds an alternative code sequence to work around ARM
273 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
274 present when it is connected to a coherent interconnect.
276 If the processor is executing a load and store exclusive sequence at
277 the same time as a processor in another cluster is executing a cache
278 maintenance operation to the same address, then this erratum might
279 cause data corruption.
281 The workaround promotes data cache clean instructions to
282 data cache clean-and-invalidate.
283 Please note that this does not necessarily enable the workaround,
284 as it depends on the alternative framework, which will only patch
285 the kernel if an affected CPU is detected.
289 config ARM64_ERRATUM_832075
290 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
293 This option adds an alternative code sequence to work around ARM
294 erratum 832075 on Cortex-A57 parts up to r1p2.
296 Affected Cortex-A57 parts might deadlock when exclusive load/store
297 instructions to Write-Back memory are mixed with Device loads.
299 The workaround is to promote device loads to use Load-Acquire
301 Please note that this does not necessarily enable the workaround,
302 as it depends on the alternative framework, which will only patch
303 the kernel if an affected CPU is detected.
312 default ARM64_4K_PAGES
314 Page size (translation granule) configuration.
316 config ARM64_4K_PAGES
319 This feature enables 4KB pages support.
321 config ARM64_64K_PAGES
324 This feature enables 64KB pages support (4KB by default)
325 allowing only two levels of page tables and faster TLB
326 look-up. AArch32 emulation is not available when this feature
332 prompt "Virtual address space size"
333 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
334 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
336 Allows choosing one of multiple possible virtual address
337 space sizes. The level of translation table is determined by
338 a combination of page size and virtual address space size.
340 config ARM64_VA_BITS_39
342 depends on ARM64_4K_PAGES
344 config ARM64_VA_BITS_42
346 depends on ARM64_64K_PAGES
348 config ARM64_VA_BITS_48
356 default 39 if ARM64_VA_BITS_39
357 default 42 if ARM64_VA_BITS_42
358 default 48 if ARM64_VA_BITS_48
360 config ARM64_PGTABLE_LEVELS
362 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
363 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
364 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
365 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
367 config CPU_BIG_ENDIAN
368 bool "Build big-endian kernel"
370 Say Y if you plan on running a kernel in big-endian mode.
373 bool "Symmetric Multi-Processing"
375 This enables support for systems with more than one CPU. If
376 you say N here, the kernel will run on single and
377 multiprocessor machines, but will use only one CPU of a
378 multiprocessor machine. If you say Y here, the kernel will run
379 on many, but not all, single processor machines. On a single
380 processor machine, the kernel will run faster if you say N
383 If you don't know what to do here, say N.
386 bool "Multi-core scheduler support"
389 Multi-core scheduler support improves the CPU scheduler's decision
390 making when dealing with multi-core CPU chips at a cost of slightly
391 increased overhead in some places. If unsure say N here.
394 bool "SMT scheduler support"
397 Improves the CPU scheduler's decision making when dealing with
398 MultiThreading at a cost of slightly increased overhead in some
399 places. If unsure say N here.
402 int "Maximum number of CPUs (2-64)"
405 # These have to remain sorted largest to smallest
409 bool "Support for hot-pluggable CPUs"
412 Say Y here to experiment with turning CPUs off and on. CPUs
413 can be controlled through /sys/devices/system/cpu.
415 source kernel/Kconfig.preempt
421 config ARCH_HAS_HOLES_MEMORYMODEL
422 def_bool y if SPARSEMEM
424 config ARCH_SPARSEMEM_ENABLE
426 select SPARSEMEM_VMEMMAP_ENABLE
428 config ARCH_SPARSEMEM_DEFAULT
429 def_bool ARCH_SPARSEMEM_ENABLE
431 config ARCH_SELECT_MEMORY_MODEL
432 def_bool ARCH_SPARSEMEM_ENABLE
434 config HAVE_ARCH_PFN_VALID
435 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
437 config HW_PERF_EVENTS
438 bool "Enable hardware performance counter support for perf events"
439 depends on PERF_EVENTS
442 Enable hardware performance counter support for perf events. If
443 disabled, perf events will use software events only.
445 config SYS_SUPPORTS_HUGETLBFS
448 config ARCH_WANT_GENERAL_HUGETLB
451 config ARCH_WANT_HUGE_PMD_SHARE
452 def_bool y if !ARM64_64K_PAGES
454 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
457 config ARCH_HAS_CACHE_LINE_SIZE
463 bool "Enable seccomp to safely compute untrusted bytecode"
465 This kernel feature is useful for number crunching applications
466 that may need to compute untrusted bytecode during their
467 execution. By using pipes or other transports made available to
468 the process as file descriptors supporting the read/write
469 syscalls, it's possible to isolate those applications in
470 their own address space using seccomp. Once seccomp is
471 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
472 and the task is only allowed to execute a few safe syscalls
473 defined by each seccomp mode.
480 bool "Xen guest support on ARM64"
481 depends on ARM64 && OF
484 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
486 config FORCE_MAX_ZONEORDER
488 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
491 menuconfig ARMV8_DEPRECATED
492 bool "Emulate deprecated/obsolete ARMv8 instructions"
495 Legacy software support may require certain instructions
496 that have been deprecated or obsoleted in the architecture.
498 Enable this config to enable selective emulation of these
506 bool "Emulate SWP/SWPB instructions"
508 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
509 they are always undefined. Say Y here to enable software
510 emulation of these instructions for userspace using LDXR/STXR.
512 In some older versions of glibc [<=2.8] SWP is used during futex
513 trylock() operations with the assumption that the code will not
514 be preempted. This invalid assumption may be more likely to fail
515 with SWP emulation enabled, leading to deadlock of the user
518 NOTE: when accessing uncached shared regions, LDXR/STXR rely
519 on an external transaction monitoring block called a global
520 monitor to maintain update atomicity. If your system does not
521 implement a global monitor, this option can cause programs that
522 perform SWP operations to uncached memory to deadlock.
526 config CP15_BARRIER_EMULATION
527 bool "Emulate CP15 Barrier instructions"
529 The CP15 barrier instructions - CP15ISB, CP15DSB, and
530 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
531 strongly recommended to use the ISB, DSB, and DMB
532 instructions instead.
534 Say Y here to enable software emulation of these
535 instructions for AArch32 userspace code. When this option is
536 enabled, CP15 barrier usage is traced which can help
537 identify software that needs updating.
548 string "Default kernel command string"
551 Provide a set of default command-line options at build time by
552 entering them here. As a minimum, you should specify the the
553 root device (e.g. root=/dev/nfs).
556 bool "Always use the default kernel command string"
558 Always use the default kernel command string, even if the boot
559 loader passes other arguments to the kernel.
560 This is useful if you cannot or don't want to change the
561 command-line options your boot loader passes to the kernel.
567 bool "UEFI runtime support"
568 depends on OF && !CPU_BIG_ENDIAN
571 select EFI_PARAMS_FROM_FDT
572 select EFI_RUNTIME_WRAPPERS
577 This option provides support for runtime services provided
578 by UEFI firmware (such as non-volatile variables, realtime
579 clock, and platform reset). A UEFI stub is also provided to
580 allow the kernel to be booted as an EFI application. This
581 is only useful on systems that have UEFI firmware.
584 bool "Enable support for SMBIOS (DMI) tables"
588 This enables SMBIOS/DMI feature for systems.
590 This option is only useful on systems that have UEFI firmware.
591 However, even with this option, the resultant kernel should
592 continue to boot on existing non-UEFI platforms.
596 menu "Userspace binary formats"
598 source "fs/Kconfig.binfmt"
601 bool "Kernel support for 32-bit EL0"
602 depends on !ARM64_64K_PAGES
603 select COMPAT_BINFMT_ELF
605 select OLD_SIGSUSPEND3
606 select COMPAT_OLD_SIGACTION
608 This option enables support for a 32-bit EL0 running under a 64-bit
609 kernel at EL1. AArch32-specific components such as system calls,
610 the user helper functions, VFP support and the ptrace interface are
611 handled appropriately by the kernel.
613 If you want to execute 32-bit userspace applications, say Y.
615 config SYSVIPC_COMPAT
617 depends on COMPAT && SYSVIPC
621 menu "Power management options"
623 source "kernel/power/Kconfig"
625 config ARCH_SUSPEND_POSSIBLE
628 config ARM64_CPU_SUSPEND
633 menu "CPU Power Management"
635 source "drivers/cpuidle/Kconfig"
637 source "drivers/cpufreq/Kconfig"
643 source "drivers/Kconfig"
645 source "drivers/firmware/Kconfig"
649 source "arch/arm64/kvm/Kconfig"
651 source "arch/arm64/Kconfig.debug"
653 source "security/Kconfig"
655 source "crypto/Kconfig"
657 source "arch/arm64/crypto/Kconfig"