arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "meson-gx.dtsi"
  44 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
  45 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
  46 #include <dt-bindings/clock/gxbb-clkc.h>
  47 #include <dt-bindings/clock/gxbb-aoclkc.h>
  48 #include <dt-bindings/reset/gxbb-aoclkc.h>
  49
  50 / {
  51         compatible = "amlogic,meson-gxbb";
  52
  53         scpi {
  54                 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
  55                 mboxes = <&mailbox 1 &mailbox 2>;
  56                 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
  57
  58                 clocks {
  59                         compatible = "arm,scpi-clocks";
  60
  61                         scpi_dvfs: scpi_clocks@0 {
  62                                 compatible = "arm,scpi-dvfs-clocks";
  63                                 #clock-cells = <1>;
  64                                 clock-indices = <0>;
  65                                 clock-output-names = "vcpu";
  66                         };
  67                 };
  68
  69                 scpi_sensors: sensors {
  70                         compatible = "arm,scpi-sensors";
  71                         #thermal-sensor-cells = <1>;
  72                 };
  73         };
  74
  75         soc {
  76                 usb0_phy: phy@c0000000 {
  77                         compatible = "amlogic,meson-gxbb-usb2-phy";
  78                         #phy-cells = <0>;
  79                         reg = <0x0 0xc0000000 0x0 0x20>;
  80                         resets = <&reset RESET_USB_OTG>;
  81                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
  82                         clock-names = "usb_general", "usb";
  83                         status = "disabled";
  84                 };
  85
  86                 usb1_phy: phy@c0000020 {
  87                         compatible = "amlogic,meson-gxbb-usb2-phy";
  88                         #phy-cells = <0>;
  89                         reg = <0x0 0xc0000020 0x0 0x20>;
  90                         resets = <&reset RESET_USB_OTG>;
  91                         clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
  92                         clock-names = "usb_general", "usb";
  93                         status = "disabled";
  94                 };
  95
  96                 sram: sram@c8000000 {
  97                         compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
  98                         reg = <0x0 0xc8000000 0x0 0x14000>;
  99
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102                         ranges = <0 0x0 0xc8000000 0x14000>;
 103
 104                         cpu_scp_lpri: scp-shmem@0 {
 105                                 compatible = "amlogic,meson-gxbb-scp-shmem";
 106                                 reg = <0x13000 0x400>;
 107                         };
 108
 109                         cpu_scp_hpri: scp-shmem@200 {
 110                                 compatible = "amlogic,meson-gxbb-scp-shmem";
 111                                 reg = <0x13400 0x400>;
 112                         };
 113                 };
 114
 115                 usb0: usb@c9000000 {
 116                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
 117                         reg = <0x0 0xc9000000 0x0 0x40000>;
 118                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 119                         clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
 120                         clock-names = "otg";
 121                         phys = <&usb0_phy>;
 122                         phy-names = "usb2-phy";
 123                         dr_mode = "host";
 124                         status = "disabled";
 125                 };
 126
 127                 usb1: usb@c9100000 {
 128                         compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
 129                         reg = <0x0 0xc9100000 0x0 0x40000>;
 130                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 131                         clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
 132                         clock-names = "otg";
 133                         phys = <&usb1_phy>;
 134                         phy-names = "usb2-phy";
 135                         dr_mode = "host";
 136                         status = "disabled";
 137                 };
 138         };
 139 };
 140
 141 &cpu0 {
 142         clocks = <&scpi_dvfs 0>;
 143 };
 144
 145 &cpu1 {
 146         clocks = <&scpi_dvfs 0>;
 147 };
 148
 149 &cpu2 {
 150         clocks = <&scpi_dvfs 0>;
 151 };
 152
 153 &cpu3 {
 154         clocks = <&scpi_dvfs 0>;
 155 };
 156
 157 &cbus {
 158         spifc: spi@8c80 {
 159                 compatible = "amlogic,meson-gxbb-spifc";
 160                 reg = <0x0 0x08c80 0x0 0x80>;
 161                 #address-cells = <1>;
 162                 #size-cells = <0>;
 163                 clocks = <&clkc CLKID_SPI>;
 164                 status = "disabled";
 165         };
 166 };
 167
 168 &ethmac {
 169         clocks = <&clkc CLKID_ETH>,
 170                  <&clkc CLKID_FCLK_DIV2>,
 171                  <&clkc CLKID_MPLL2>;
 172         clock-names = "stmmaceth", "clkin0", "clkin1";
 173 };
 174
 175 &aobus {
 176         pinctrl_aobus: pinctrl@14 {
 177                 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
 178                 #address-cells = <2>;
 179                 #size-cells = <2>;
 180                 ranges;
 181
 182                 gpio_ao: bank@14 {
 183                         reg = <0x0 0x00014 0x0 0x8>,
 184                               <0x0 0x0002c 0x0 0x4>,
 185                               <0x0 0x00024 0x0 0x8>;
 186                         reg-names = "mux", "pull", "gpio";
 187                         gpio-controller;
 188                         #gpio-cells = <2>;
 189                 };
 190
 191                 uart_ao_a_pins: uart_ao_a {
 192                         mux {
 193                                 groups = "uart_tx_ao_a", "uart_rx_ao_a";
 194                                 function = "uart_ao";
 195                         };
 196                 };
 197
 198                 remote_input_ao_pins: remote_input_ao {
 199                         mux {
 200                                 groups = "remote_input_ao";
 201                                 function = "remote_input_ao";
 202                         };
 203                 };
 204
 205                 i2c_ao_pins: i2c_ao {
 206                         mux {
 207                                 groups = "i2c_sck_ao",
 208                                        "i2c_sda_ao";
 209                                 function = "i2c_ao";
 210                         };
 211                 };
 212
 213                 pwm_ao_a_3_pins: pwm_ao_a_3 {
 214                         mux {
 215                                 groups = "pwm_ao_a_3";
 216                                 function = "pwm_ao_a_3";
 217                         };
 218                 };
 219
 220                 pwm_ao_a_6_pins: pwm_ao_a_6 {
 221                         mux {
 222                                 groups = "pwm_ao_a_6";
 223                                 function = "pwm_ao_a_6";
 224                         };
 225                 };
 226
 227                 pwm_ao_a_12_pins: pwm_ao_a_12 {
 228                         mux {
 229                                 groups = "pwm_ao_a_12";
 230                                 function = "pwm_ao_a_12";
 231                         };
 232                 };
 233
 234                 pwm_ao_b_pins: pwm_ao_b {
 235                         mux {
 236                                 groups = "pwm_ao_b";
 237                                 function = "pwm_ao_b";
 238                         };
 239                 };
 240         };
 241
 242         clkc_AO: clock-controller@040 {
 243                 compatible = "amlogic,gxbb-aoclkc";
 244                 reg = <0x0 0x00040 0x0 0x4>;
 245                 #clock-cells = <1>;
 246                 #reset-cells = <1>;
 247         };
 248
 249         pwm_ab_AO: pwm@550 {
 250                 compatible = "amlogic,meson-gxbb-pwm";
 251                 reg = <0x0 0x0550 0x0 0x10>;
 252                 #pwm-cells = <3>;
 253                 status = "disabled";
 254         };
 255
 256         i2c_AO: i2c@500 {
 257                 compatible = "amlogic,meson-gxbb-i2c";
 258                 reg = <0x0 0x500 0x0 0x20>;
 259                 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
 260                 clocks = <&clkc CLKID_AO_I2C>;
 261                 #address-cells = <1>;
 262                 #size-cells = <0>;
 263                 status = "disabled";
 264         };
 265 };
 266
 267 &periphs {
 268         pinctrl_periphs: pinctrl@4b0 {
 269                 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
 270                 #address-cells = <2>;
 271                 #size-cells = <2>;
 272                 ranges;
 273
 274                 gpio: bank@4b0 {
 275                         reg = <0x0 0x004b0 0x0 0x28>,
 276                               <0x0 0x004e8 0x0 0x14>,
 277                               <0x0 0x00120 0x0 0x14>,
 278                               <0x0 0x00430 0x0 0x40>;
 279                         reg-names = "mux", "pull", "pull-enable", "gpio";
 280                         gpio-controller;
 281                         #gpio-cells = <2>;
 282                 };
 283
 284                 emmc_pins: emmc {
 285                         mux {
 286                                 groups = "emmc_nand_d07",
 287                                        "emmc_cmd",
 288                                        "emmc_clk",
 289                                        "emmc_ds";
 290                                 function = "emmc";
 291                         };
 292                 };
 293
 294                 nor_pins: nor {
 295                         mux {
 296                                 groups = "nor_d",
 297                                        "nor_q",
 298                                        "nor_c",
 299                                        "nor_cs";
 300                                 function = "nor";
 301                         };
 302                 };
 303
 304                 sdcard_pins: sdcard {
 305                         mux {
 306                                 groups = "sdcard_d0",
 307                                        "sdcard_d1",
 308                                        "sdcard_d2",
 309                                        "sdcard_d3",
 310                                        "sdcard_cmd",
 311                                        "sdcard_clk";
 312                                 function = "sdcard";
 313                         };
 314                 };
 315
 316                 sdio_pins: sdio {
 317                         mux {
 318                                 groups = "sdio_d0",
 319                                        "sdio_d1",
 320                                        "sdio_d2",
 321                                        "sdio_d3",
 322                                        "sdio_cmd",
 323                                        "sdio_clk";
 324                                 function = "sdio";
 325                         };
 326                 };
 327
 328                 sdio_irq_pins: sdio_irq {
 329                         mux {
 330                                 groups = "sdio_irq";
 331                                 function = "sdio";
 332                         };
 333                 };
 334
 335                 uart_a_pins: uart_a {
 336                         mux {
 337                                 groups = "uart_tx_a",
 338                                        "uart_rx_a";
 339                                 function = "uart_a";
 340                         };
 341                 };
 342
 343                 uart_b_pins: uart_b {
 344                         mux {
 345                                 groups = "uart_tx_b",
 346                                        "uart_rx_b";
 347                                 function = "uart_b";
 348                         };
 349                 };
 350
 351                 uart_c_pins: uart_c {
 352                         mux {
 353                                 groups = "uart_tx_c",
 354                                        "uart_rx_c";
 355                                 function = "uart_c";
 356                         };
 357                 };
 358
 359                 i2c_a_pins: i2c_a {
 360                         mux {
 361                                 groups = "i2c_sck_a",
 362                                        "i2c_sda_a";
 363                                 function = "i2c_a";
 364                         };
 365                 };
 366
 367                 i2c_b_pins: i2c_b {
 368                         mux {
 369                                 groups = "i2c_sck_b",
 370                                        "i2c_sda_b";
 371                                 function = "i2c_b";
 372                         };
 373                 };
 374
 375                 i2c_c_pins: i2c_c {
 376                         mux {
 377                                 groups = "i2c_sck_c",
 378                                        "i2c_sda_c";
 379                                 function = "i2c_c";
 380                         };
 381                 };
 382
 383                 eth_rgmii_pins: eth-rgmii {
 384                         mux {
 385                                 groups = "eth_mdio",
 386                                        "eth_mdc",
 387                                        "eth_clk_rx_clk",
 388                                        "eth_rx_dv",
 389                                        "eth_rxd0",
 390                                        "eth_rxd1",
 391                                        "eth_rxd2",
 392                                        "eth_rxd3",
 393                                        "eth_rgmii_tx_clk",
 394                                        "eth_tx_en",
 395                                        "eth_txd0",
 396                                        "eth_txd1",
 397                                        "eth_txd2",
 398                                        "eth_txd3";
 399                                 function = "eth";
 400                         };
 401                 };
 402
 403                 eth_rmii_pins: eth-rmii {
 404                         mux {
 405                                 groups = "eth_mdio",
 406                                        "eth_mdc",
 407                                        "eth_clk_rx_clk",
 408                                        "eth_rx_dv",
 409                                        "eth_rxd0",
 410                                        "eth_rxd1",
 411                                        "eth_tx_en",
 412                                        "eth_txd0",
 413                                        "eth_txd1";
 414                                 function = "eth";
 415                         };
 416                 };
 417
 418                 pwm_a_x_pins: pwm_a_x {
 419                         mux {
 420                                 groups = "pwm_a_x";
 421                                 function = "pwm_a_x";
 422                         };
 423                 };
 424
 425                 pwm_a_y_pins: pwm_a_y {
 426                         mux {
 427                                 groups = "pwm_a_y";
 428                                 function = "pwm_a_y";
 429                         };
 430                 };
 431
 432                 pwm_b_pins: pwm_b {
 433                         mux {
 434                                 groups = "pwm_b";
 435                                 function = "pwm_b";
 436                         };
 437                 };
 438
 439                 pwm_d_pins: pwm_d {
 440                         mux {
 441                                 groups = "pwm_d";
 442                                 function = "pwm_d";
 443                         };
 444                 };
 445
 446                 pwm_e_pins: pwm_e {
 447                         mux {
 448                                 groups = "pwm_e";
 449                                 function = "pwm_e";
 450                         };
 451                 };
 452
 453                 pwm_f_x_pins: pwm_f_x {
 454                         mux {
 455                                 groups = "pwm_f_x";
 456                                 function = "pwm_f_x";
 457                         };
 458                 };
 459
 460                 pwm_f_y_pins: pwm_f_y {
 461                         mux {
 462                                 groups = "pwm_f_y";
 463                                 function = "pwm_f_y";
 464                         };
 465                 };
 466         };
 467 };
 468
 469 &hiubus {
 470         clkc: clock-controller@0 {
 471                 compatible = "amlogic,gxbb-clkc";
 472                 #clock-cells = <1>;
 473                 reg = <0x0 0x0 0x0 0x3db>;
 474         };
 475 };
 476
 477 &i2c_A {
 478         clocks = <&clkc CLKID_I2C>;
 479 };
 480
 481 &i2c_B {
 482         clocks = <&clkc CLKID_I2C>;
 483 };
 484
 485 &i2c_C {
 486         clocks = <&clkc CLKID_I2C>;
 487 };
 488
 489 &sd_emmc_a {
 490         clocks = <&clkc CLKID_SD_EMMC_A>,
 491                  <&xtal>,
 492                  <&clkc CLKID_FCLK_DIV2>;
 493         clock-names = "core", "clkin0", "clkin1";
 494 };
 495
 496 &sd_emmc_b {
 497         clocks = <&clkc CLKID_SD_EMMC_B>,
 498                  <&xtal>,
 499                  <&clkc CLKID_FCLK_DIV2>;
 500         clock-names = "core", "clkin0", "clkin1";
 501 };
 502
 503 &sd_emmc_c {
 504         clocks = <&clkc CLKID_SD_EMMC_C>,
 505                  <&xtal>,
 506                  <&clkc CLKID_FCLK_DIV2>;
 507         clock-names = "core", "clkin0", "clkin1";
 508 };
 509
 510 &vpu {
 511         compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 512 };