arch/arm64/boot/dts/arm/juno.dts

   1 /*
   2  * ARM Ltd. Juno Platform
   3  *
   4  * Copyright (c) 2013-2014 ARM Ltd.
   5  *
   6  * This file is licensed under a dual GPLv2 or BSD license.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12
  13 / {
  14         model = "ARM Juno development board (r0)";
  15         compatible = "arm,juno", "arm,vexpress";
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 serial0 = &soc_uart0;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         psci {
  29                 compatible = "arm,psci-0.2";
  30                 method = "smc";
  31         };
  32
  33         cpus {
  34                 #address-cells = <2>;
  35                 #size-cells = <0>;
  36
  37                 A57_0: cpu@0 {
  38                         compatible = "arm,cortex-a57","arm,armv8";
  39                         reg = <0x0 0x0>;
  40                         device_type = "cpu";
  41                         enable-method = "psci";
  42                 };
  43
  44                 A57_1: cpu@1 {
  45                         compatible = "arm,cortex-a57","arm,armv8";
  46                         reg = <0x0 0x1>;
  47                         device_type = "cpu";
  48                         enable-method = "psci";
  49                 };
  50
  51                 A53_0: cpu@100 {
  52                         compatible = "arm,cortex-a53","arm,armv8";
  53                         reg = <0x0 0x100>;
  54                         device_type = "cpu";
  55                         enable-method = "psci";
  56                 };
  57
  58                 A53_1: cpu@101 {
  59                         compatible = "arm,cortex-a53","arm,armv8";
  60                         reg = <0x0 0x101>;
  61                         device_type = "cpu";
  62                         enable-method = "psci";
  63                 };
  64
  65                 A53_2: cpu@102 {
  66                         compatible = "arm,cortex-a53","arm,armv8";
  67                         reg = <0x0 0x102>;
  68                         device_type = "cpu";
  69                         enable-method = "psci";
  70                 };
  71
  72                 A53_3: cpu@103 {
  73                         compatible = "arm,cortex-a53","arm,armv8";
  74                         reg = <0x0 0x103>;
  75                         device_type = "cpu";
  76                         enable-method = "psci";
  77                 };
  78         };
  79
  80         memory@80000000 {
  81                 device_type = "memory";
  82                 /* last 16MB of the first memory area is reserved for secure world use by firmware */
  83                 reg = <0x00000000 0x80000000 0x0 0x7f000000>,
  84                       <0x00000008 0x80000000 0x1 0x80000000>;
  85         };
  86
  87         gic: interrupt-controller@2c001000 {
  88                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
  89                 reg = <0x0 0x2c010000 0 0x1000>,
  90                       <0x0 0x2c02f000 0 0x2000>,
  91                       <0x0 0x2c04f000 0 0x2000>,
  92                       <0x0 0x2c06f000 0 0x2000>;
  93                 #address-cells = <0>;
  94                 #interrupt-cells = <3>;
  95                 interrupt-controller;
  96                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
  97         };
  98
  99         timer {
 100                 compatible = "arm,armv8-timer";
 101                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 102                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 103                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 104                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 105         };
 106
 107         pmu {
 108                 compatible = "arm,armv8-pmuv3";
 109                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 110                              <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
 111                              <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
 112                              <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
 113                              <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
 114                              <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>;
 115         };
 116
 117         /include/ "juno-clocks.dtsi"
 118
 119         dma@7ff00000 {
 120                 compatible = "arm,pl330", "arm,primecell";
 121                 reg = <0x0 0x7ff00000 0 0x1000>;
 122                 #dma-cells = <1>;
 123                 #dma-channels = <8>;
 124                 #dma-requests = <32>;
 125                 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
 126                              <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
 127                              <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
 128                              <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
 129                              <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
 130                              <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 131                              <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 132                              <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 133                 clocks = <&soc_faxiclk>;
 134                 clock-names = "apb_pclk";
 135         };
 136
 137         soc_uart0: uart@7ff80000 {
 138                 compatible = "arm,pl011", "arm,primecell";
 139                 reg = <0x0 0x7ff80000 0x0 0x1000>;
 140                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 141                 clocks = <&soc_uartclk>, <&soc_refclk100mhz>;
 142                 clock-names = "uartclk", "apb_pclk";
 143         };
 144
 145         i2c@7ffa0000 {
 146                 compatible = "snps,designware-i2c";
 147                 reg = <0x0 0x7ffa0000 0x0 0x1000>;
 148                 #address-cells = <1>;
 149                 #size-cells = <0>;
 150                 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
 151                 clock-frequency = <400000>;
 152                 i2c-sda-hold-time-ns = <500>;
 153                 clocks = <&soc_smc50mhz>;
 154
 155                 dvi0: dvi-transmitter@70 {
 156                         compatible = "nxp,tda998x";
 157                         reg = <0x70>;
 158                 };
 159
 160                 dvi1: dvi-transmitter@71 {
 161                         compatible = "nxp,tda998x";
 162                         reg = <0x71>;
 163                 };
 164         };
 165
 166         ohci@7ffb0000 {
 167                 compatible = "generic-ohci";
 168                 reg = <0x0 0x7ffb0000 0x0 0x10000>;
 169                 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
 170                 clocks = <&soc_usb48mhz>;
 171         };
 172
 173         ehci@7ffc0000 {
 174                 compatible = "generic-ehci";
 175                 reg = <0x0 0x7ffc0000 0x0 0x10000>;
 176                 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 177                 clocks = <&soc_usb48mhz>;
 178         };
 179
 180         memory-controller@7ffd0000 {
 181                 compatible = "arm,pl354", "arm,primecell";
 182                 reg = <0 0x7ffd0000 0 0x1000>;
 183                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 184                              <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 185                 clocks = <&soc_smc50mhz>;
 186                 clock-names = "apb_pclk";
 187         };
 188
 189         smb {
 190                 compatible = "simple-bus";
 191                 #address-cells = <2>;
 192                 #size-cells = <1>;
 193                 ranges = <0 0 0 0x08000000 0x04000000>,
 194                          <1 0 0 0x14000000 0x04000000>,
 195                          <2 0 0 0x18000000 0x04000000>,
 196                          <3 0 0 0x1c000000 0x04000000>,
 197                          <4 0 0 0x0c000000 0x04000000>,
 198                          <5 0 0 0x10000000 0x04000000>;
 199
 200                 #interrupt-cells = <1>;
 201                 interrupt-map-mask = <0 0 15>;
 202                 interrupt-map = <0 0  0 &gic 0  68 IRQ_TYPE_LEVEL_HIGH>,
 203                                 <0 0  1 &gic 0  69 IRQ_TYPE_LEVEL_HIGH>,
 204                                 <0 0  2 &gic 0  70 IRQ_TYPE_LEVEL_HIGH>,
 205                                 <0 0  3 &gic 0 160 IRQ_TYPE_LEVEL_HIGH>,
 206                                 <0 0  4 &gic 0 161 IRQ_TYPE_LEVEL_HIGH>,
 207                                 <0 0  5 &gic 0 162 IRQ_TYPE_LEVEL_HIGH>,
 208                                 <0 0  6 &gic 0 163 IRQ_TYPE_LEVEL_HIGH>,
 209                                 <0 0  7 &gic 0 164 IRQ_TYPE_LEVEL_HIGH>,
 210                                 <0 0  8 &gic 0 165 IRQ_TYPE_LEVEL_HIGH>,
 211                                 <0 0  9 &gic 0 166 IRQ_TYPE_LEVEL_HIGH>,
 212                                 <0 0 10 &gic 0 167 IRQ_TYPE_LEVEL_HIGH>,
 213                                 <0 0 11 &gic 0 168 IRQ_TYPE_LEVEL_HIGH>,
 214                                 <0 0 12 &gic 0 169 IRQ_TYPE_LEVEL_HIGH>;
 215
 216                 /include/ "juno-motherboard.dtsi"
 217         };
 218 };