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1 /*
2 * dts file for Hisilicon HiKey Development Board
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 *
6 */
7
8 /dts-v1/;
9 #include "hi6220.dtsi"
10 #include "hikey-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12
13 / {
14 model = "HiKey Development Board";
15 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
16
17 aliases {
18 serial0 = &uart0; /* On board UART0 */
19 serial1 = &uart1; /* BT UART */
20 serial2 = &uart2; /* LS Expansion UART0 */
21 serial3 = &uart3; /* LS Expansion UART1 */
22 };
23
24 chosen {
25 stdout-path = "serial3:115200n8";
26 };
27
28 /*
29 * Reserve below regions from memory node:
30 *
31 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
32 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
33 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
34 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
35 * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
36 * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
37 */
38 memory@0 {
39 device_type = "memory";
40 reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
41 <0x00000000 0x05f00000 0x00000000 0x00001000>,
42 <0x00000000 0x05f02000 0x00000000 0x00efd000>,
43 <0x00000000 0x06e00000 0x00000000 0x0060f000>,
44 <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
45 <0x00000000 0x22000000 0x00000000 0x1c000000>;
46 };
47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 ramoops@0x21f00000 {
54 compatible = "ramoops";
55 reg = <0x0 0x21f00000 0x0 0x00100000>;
56 record-size = <0x00020000>;
57 console-size = <0x00020000>;
58 ftrace-size = <0x00020000>;
59 };
60
61 /* global autoconfigured region for contiguous allocations */
62 linux,cma {
63 compatible = "shared-dma-pool";
64 reusable;
65 size = <0x00000000 0x08000000>;
66 linux,cma-default;
67 };
68 };
69
70 reboot-mode-syscon@5f01000 {
71 compatible = "syscon", "simple-mfd";
72 reg = <0x0 0x05f01000 0x0 0x00001000>;
73
74 reboot-mode {
75 compatible = "syscon-reboot-mode";
76 offset = <0x0>;
77
78 mode-normal = <0x77665501>;
79 mode-bootloader = <0x77665500>;
80 mode-recovery = <0x77665502>;
81 };
82 };
83
84 reg_sys_5v: regulator@0 {
85 compatible = "regulator-fixed";
86 regulator-name = "SYS_5V";
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 regulator-boot-on;
90 regulator-always-on;
91 };
92
93 reg_vdd_3v3: regulator@1 {
94 compatible = "regulator-fixed";
95 regulator-name = "VDD_3V3";
96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>;
98 regulator-boot-on;
99 regulator-always-on;
100 vin-supply = <&reg_sys_5v>;
101 };
102
103 reg_5v_hub: regulator@2 {
104 compatible = "regulator-fixed";
105 regulator-name = "5V_HUB";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 regulator-boot-on;
109 gpio = <&gpio0 7 0>;
110 regulator-always-on;
111 vin-supply = <&reg_sys_5v>;
112 };
113
114 wl1835_pwrseq: wl1835-pwrseq {
115 compatible = "mmc-pwrseq-simple";
116 /* WLAN_EN GPIO */
117 reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
118 clocks = <&pmic>;
119 clock-names = "ext_clock";
120 power-off-delay-us = <10>;
121 };
122
123 soc {
124 spi0: spi@f7106000 {
125 status = "ok";
126 };
127
128 i2c0: i2c@f7100000 {
129 status = "ok";
130 };
131
132 i2c1: i2c@f7101000 {
133 status = "ok";
134 };
135
136 uart1: uart@f7111000 {
137 assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
138 assigned-clock-rates = <150000000>;
139 status = "ok";
140
141 bluetooth {
142 compatible = "ti,wl1835-st";
143 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
144 };
145 };
146
147 uart2: uart@f7112000 {
148 status = "ok";
149 };
150
151 uart3: uart@f7113000 {
152 status = "ok";
153 };
154
155 /*
156 * Legend: proper name = the GPIO line is used as GPIO
157 * NC = not connected (not routed from the SoC)
158 * "[PER]" = pin is muxed for peripheral (not GPIO)
159 * "" = no idea, schematic doesn't say, could be
160 * unrouted (not connected to any external pin)
161 * LSEC = Low Speed External Connector
162 * HSEC = High Speed External Connector
163 *
164 * Pin assignments taken from LeMaker and CircuitCo Schematics
165 * Rev A1.
166 *
167 * For the lines routed to the external connectors the
168 * lines are named after the 96Boards CE Specification 1.0,
169 * Appendix "Expansion Connector Signal Description".
170 *
171 * When the 96Board naming of a line and the schematic name of
172 * the same line are in conflict, the 96Board specification
173 * takes precedence, which means that the external UART on the
174 * LSEC is named UART0 while the schematic and SoC names this
175 * UART2. This is only for the informational lines i.e. "[FOO]",
176 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
177 * ones actually used for GPIO.
178 */
179 gpio0: gpio@f8011000 {
180 gpio-line-names = "PWR_HOLD", "DSI_SEL",
181 "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
182 "PWRON_DET", "5V_HUB_EN";
183 };
184
185 gpio1: gpio@f8012000 {
186 gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
187 "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
188 };
189
190 gpio2: gpio@f8013000 {
191 gpio-line-names =
192 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
193 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
194 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
195 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
196 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
197 "USB_ID_DET", "USB_VBUS_DET",
198 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
199 };
200
201 gpio3: gpio@f8014000 {
202 gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
203 "WLAN_ACTIVE", "NC", "NC";
204 };
205
206 gpio4: gpio@f7020000 {
207 gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
208 "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
209 };
210
211 gpio5: gpio@f7021000 {
212 gpio-line-names = "NC", "NC",
213 "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
214 "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
215 "[AUX_SSI1]", "NC",
216 "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
217 "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
218 };
219
220 gpio6: gpio@f7022000 {
221 gpio-line-names =
222 "[SPI0_DIN]", /* Pin 10: SPI0_DI */
223 "[SPI0_DOUT]", /* Pin 14: SPI0_DO */
224 "[SPI0_CS]", /* Pin 12: SPI0_CS_N */
225 "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
226 "NC", "NC", "NC",
227 "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
228 };
229
230 gpio7: gpio@f7023000 {
231 gpio-line-names = "NC", "NC", "NC", "NC",
232 "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
233 "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
234 "NC", "NC";
235 };
236
237 gpio8: gpio@f7024000 {
238 gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
239 "", "", "", "", "", "";
240 };
241
242 gpio9: gpio@f7025000 {
243 gpio-line-names = "",
244 "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
245 "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
246 "NC", "NC", "NC", "NC", "[ISP_CCLK0]";
247 };
248
249 gpio10: gpio@f7026000 {
250 gpio-line-names = "BOOT_SEL",
251 "[ISP_CCLK1]",
252 "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
253 "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
254 "NC", "NC",
255 "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
256 "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
257 };
258
259 gpio11: gpio@f7027000 {
260 gpio-line-names =
261 "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
262 "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
263 "", "NC", "NC", "NC", "", "";
264 };
265
266 gpio12: gpio@f7028000 {
267 gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
268 "[BT_PCM_DO]",
269 "NC", "NC", "NC", "NC",
270 "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
271 };
272
273 gpio13: gpio@f7029000 {
274 gpio-line-names = "[UART0_RX]", "[UART0_TX]",
275 "[BT_UART1_CTS]", "[BT_UART1_RTS]",
276 "[BT_UART1_RX]", "[BT_UART1_TX]",
277 "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
278 "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
279 };
280
281 gpio14: gpio@f702a000 {
282 gpio-line-names =
283 "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
284 "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
285 "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
286 "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
287 "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
288 "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
289 "[I2C2_SCL]", "[I2C2_SDA]";
290 };
291
292 gpio15: gpio@f702b000 {
293 gpio-line-names = "", "", "", "", "", "", "NC", "";
294 };
295
296 /* GPIO blocks 16 thru 19 do not appear to be routed to pins */
297
298 dwmmc_0: dwmmc0@f723d000 {
299 cap-mmc-highspeed;
300 non-removable;
301 bus-width = <0x8>;
302 vmmc-supply = <&ldo19>;
303 };
304
305 dwmmc_1: dwmmc1@f723e000 {
306 card-detect-delay = <200>;
307 cap-sd-highspeed;
308 sd-uhs-sdr12;
309 sd-uhs-sdr25;
310 sd-uhs-sdr50;
311 vqmmc-supply = <&ldo7>;
312 vmmc-supply = <&ldo10>;
313 bus-width = <0x4>;
314 disable-wp;
315 cd-gpios = <&gpio1 0 1>;
316 };
317
318 dwmmc_2: dwmmc2@f723f000 {
319 bus-width = <0x4>;
320 non-removable;
321 vmmc-supply = <&reg_vdd_3v3>;
322 mmc-pwrseq = <&wl1835_pwrseq>;
323
324 #address-cells = <0x1>;
325 #size-cells = <0x0>;
326 wlcore: wlcore@2 {
327 compatible = "ti,wl1835";
328 reg = <2>; /* sdio func num */
329 /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
330 interrupt-parent = <&gpio1>;
331 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
332 };
333 };
334 };
335
336 leds {
337 compatible = "gpio-leds";
338 user_led4 {
339 label = "user_led4";
340 gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
341 linux,default-trigger = "heartbeat";
342 };
343
344 user_led3 {
345 label = "user_led3";
346 gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
347 linux,default-trigger = "mmc0";
348 };
349
350 user_led2 {
351 label = "user_led2";
352 gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
353 linux,default-trigger = "mmc1";
354 };
355
356 user_led1 {
357 label = "user_led1";
358 gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
359 linux,default-trigger = "cpu0";
360 };
361
362 wlan_active_led {
363 label = "wifi_active";
364 gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
365 linux,default-trigger = "phy0tx";
366 default-state = "off";
367 };
368
369 bt_active_led {
370 label = "bt_active";
371 gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
372 linux,default-trigger = "hci0rx";
373 default-state = "off";
374 };
375 };
376
377 pmic: pmic@f8000000 {
378 compatible = "hisilicon,hi655x-pmic";
379 reg = <0x0 0xf8000000 0x0 0x1000>;
380 #clock-cells = <0>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
383 pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
384
385 regulators {
386 ldo2: LDO2 {
387 regulator-name = "LDO2_2V8";
388 regulator-min-microvolt = <2500000>;
389 regulator-max-microvolt = <3200000>;
390 regulator-enable-ramp-delay = <120>;
391 };
392
393 ldo7: LDO7 {
394 regulator-name = "LDO7_SDIO";
395 regulator-min-microvolt = <1800000>;
396 regulator-max-microvolt = <3300000>;
397 regulator-enable-ramp-delay = <120>;
398 };
399
400 ldo10: LDO10 {
401 regulator-name = "LDO10_2V85";
402 regulator-min-microvolt = <1800000>;
403 regulator-max-microvolt = <3000000>;
404 regulator-enable-ramp-delay = <360>;
405 };
406
407 ldo13: LDO13 {
408 regulator-name = "LDO13_1V8";
409 regulator-min-microvolt = <1600000>;
410 regulator-max-microvolt = <1950000>;
411 regulator-enable-ramp-delay = <120>;
412 };
413
414 ldo14: LDO14 {
415 regulator-name = "LDO14_2V8";
416 regulator-min-microvolt = <2500000>;
417 regulator-max-microvolt = <3200000>;
418 regulator-enable-ramp-delay = <120>;
419 };
420
421 ldo15: LDO15 {
422 regulator-name = "LDO15_1V8";
423 regulator-min-microvolt = <1600000>;
424 regulator-max-microvolt = <1950000>;
425 regulator-boot-on;
426 regulator-always-on;
427 regulator-enable-ramp-delay = <120>;
428 };
429
430 ldo17: LDO17 {
431 regulator-name = "LDO17_2V5";
432 regulator-min-microvolt = <2500000>;
433 regulator-max-microvolt = <3200000>;
434 regulator-enable-ramp-delay = <120>;
435 };
436
437 ldo19: LDO19 {
438 regulator-name = "LDO19_3V0";
439 regulator-min-microvolt = <1800000>;
440 regulator-max-microvolt = <3000000>;
441 regulator-enable-ramp-delay = <360>;
442 };
443
444 ldo21: LDO21 {
445 regulator-name = "LDO21_1V8";
446 regulator-min-microvolt = <1650000>;
447 regulator-max-microvolt = <2000000>;
448 regulator-always-on;
449 regulator-enable-ramp-delay = <120>;
450 };
451
452 ldo22: LDO22 {
453 regulator-name = "LDO22_1V2";
454 regulator-min-microvolt = <900000>;
455 regulator-max-microvolt = <1200000>;
456 regulator-boot-on;
457 regulator-always-on;
458 regulator-enable-ramp-delay = <120>;
459 };
460 };
461 };
462
463 firmware {
464 optee {
465 compatible = "linaro,optee-tz";
466 method = "smc";
467 };
468 };
469 };
470
471 &uart2 {
472 label = "LS-UART0";
473 };
474 &uart3 {
475 label = "LS-UART1";
476 };
477
478 &ade {
479 status = "ok";
480 };
481
482 &dsi {
483 status = "ok";
484
485 ports {
486 /* 1 for output port */
487 port@1 {
488 reg = <1>;
489
490 dsi_out0: endpoint@0 {
491 remote-endpoint = <&adv7533_in>;
492 };
493 };
494 };
495 };
496
497 &i2c2 {
498 #address-cells = <1>;
499 #size-cells = <0>;
500 status = "ok";
501
502 adv7533: adv7533@39 {
503 compatible = "adi,adv7533";
504 reg = <0x39>;
505 interrupt-parent = <&gpio1>;
506 interrupts = <1 2>;
507 pd-gpio = <&gpio0 4 0>;
508 adi,dsi-lanes = <4>;
509
510 port {
511 adv7533_in: endpoint {
512 remote-endpoint = <&dsi_out0>;
513 };
514 };
515 };
516 };