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Merge remote-tracking branch 'regulator/fix/max77802' into regulator-linus
[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / marvell / armada-cp110-master.dtsi
1 /*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 /*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
47 / {
48 cp110-master {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 compatible = "simple-bus";
52 interrupt-parent = <&gic>;
53 ranges;
54
55 config-space@f2000000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&gic>;
60 ranges = <0x0 0x0 0xf2000000 0x2000000>;
61
62 cpm_ethernet: ethernet@0 {
63 compatible = "marvell,armada-7k-pp22";
64 reg = <0x0 0x100000>, <0x129000 0xb000>;
65 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
66 clock-names = "pp_clk", "gop_clk", "mg_clk";
67 status = "disabled";
68 dma-coherent;
69
70 cpm_eth0: eth0 {
71 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
72 port-id = <0>;
73 gop-port-id = <0>;
74 status = "disabled";
75 };
76
77 cpm_eth1: eth1 {
78 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
79 port-id = <1>;
80 gop-port-id = <2>;
81 status = "disabled";
82 };
83
84 cpm_eth2: eth2 {
85 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
86 port-id = <2>;
87 gop-port-id = <3>;
88 status = "disabled";
89 };
90 };
91
92 cpm_mdio: mdio@12a200 {
93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "marvell,orion-mdio";
96 reg = <0x12a200 0x10>;
97 };
98
99 cpm_syscon0: system-controller@440000 {
100 compatible = "marvell,cp110-system-controller0",
101 "syscon";
102 reg = <0x440000 0x1000>;
103 #clock-cells = <2>;
104 core-clock-output-names =
105 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
106 "cpm-core", "cpm-nand-core";
107 gate-clock-output-names =
108 "cpm-audio", "cpm-communit", "cpm-nand",
109 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
110 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
111 "cpm-gop-dp", "none", "cpm-pcie_x10",
112 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
113 "cpm-sata", "cpm-sata-usb", "cpm-main",
114 "cpm-sd-mmc-gop", "none", "none",
115 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
116 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
117 };
118
119 cpm_rtc: rtc@284000 {
120 compatible = "marvell,armada-8k-rtc";
121 reg = <0x284000 0x20>, <0x284080 0x24>;
122 reg-names = "rtc", "rtc-soc";
123 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
124 };
125
126 cpm_sata0: sata@540000 {
127 compatible = "marvell,armada-8k-ahci",
128 "generic-ahci";
129 reg = <0x540000 0x30000>;
130 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
131 clocks = <&cpm_syscon0 1 15>;
132 status = "disabled";
133 };
134
135 cpm_usb3_0: usb3@500000 {
136 compatible = "marvell,armada-8k-xhci",
137 "generic-xhci";
138 reg = <0x500000 0x4000>;
139 dma-coherent;
140 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
141 clocks = <&cpm_syscon0 1 22>;
142 status = "disabled";
143 };
144
145 cpm_usb3_1: usb3@510000 {
146 compatible = "marvell,armada-8k-xhci",
147 "generic-xhci";
148 reg = <0x510000 0x4000>;
149 dma-coherent;
150 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
151 clocks = <&cpm_syscon0 1 23>;
152 status = "disabled";
153 };
154
155 cpm_xor0: xor@6a0000 {
156 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
157 reg = <0x6a0000 0x1000>,
158 <0x6b0000 0x1000>;
159 dma-coherent;
160 msi-parent = <&gic_v2m0>;
161 clocks = <&cpm_syscon0 1 8>;
162 };
163
164 cpm_xor1: xor@6c0000 {
165 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
166 reg = <0x6c0000 0x1000>,
167 <0x6d0000 0x1000>;
168 dma-coherent;
169 msi-parent = <&gic_v2m0>;
170 clocks = <&cpm_syscon0 1 7>;
171 };
172
173 cpm_spi0: spi@700600 {
174 compatible = "marvell,armada-380-spi";
175 reg = <0x700600 0x50>;
176 #address-cells = <0x1>;
177 #size-cells = <0x0>;
178 cell-index = <1>;
179 clocks = <&cpm_syscon0 1 21>;
180 status = "disabled";
181 };
182
183 cpm_spi1: spi@700680 {
184 compatible = "marvell,armada-380-spi";
185 reg = <0x700680 0x50>;
186 #address-cells = <1>;
187 #size-cells = <0>;
188 cell-index = <2>;
189 clocks = <&cpm_syscon0 1 21>;
190 status = "disabled";
191 };
192
193 cpm_i2c0: i2c@701000 {
194 compatible = "marvell,mv78230-i2c";
195 reg = <0x701000 0x20>;
196 #address-cells = <1>;
197 #size-cells = <0>;
198 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
199 clocks = <&cpm_syscon0 1 21>;
200 status = "disabled";
201 };
202
203 cpm_i2c1: i2c@701100 {
204 compatible = "marvell,mv78230-i2c";
205 reg = <0x701100 0x20>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
209 clocks = <&cpm_syscon0 1 21>;
210 status = "disabled";
211 };
212
213 cpm_trng: trng@760000 {
214 compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
215 reg = <0x760000 0x7d>;
216 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
217 clocks = <&cpm_syscon0 1 25>;
218 status = "okay";
219 };
220
221 cpm_sdhci0: sdhci@780000 {
222 compatible = "marvell,armada-cp110-sdhci";
223 reg = <0x780000 0x300>;
224 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
225 clock-names = "core";
226 clocks = <&cpm_syscon0 1 4>;
227 dma-coherent;
228 status = "disabled";
229 };
230
231 cpm_crypto: crypto@800000 {
232 compatible = "inside-secure,safexcel-eip197";
233 reg = <0x800000 0x200000>;
234 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
237 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
238 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
240 interrupt-names = "mem", "ring0", "ring1",
241 "ring2", "ring3", "eip";
242 clocks = <&cpm_syscon0 1 26>;
243 status = "disabled";
244 };
245 };
246
247 cpm_pcie0: pcie@f2600000 {
248 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
249 reg = <0 0xf2600000 0 0x10000>,
250 <0 0xf6f00000 0 0x80000>;
251 reg-names = "ctrl", "config";
252 #address-cells = <3>;
253 #size-cells = <2>;
254 #interrupt-cells = <1>;
255 device_type = "pci";
256 dma-coherent;
257 msi-parent = <&gic_v2m0>;
258
259 bus-range = <0 0xff>;
260 ranges =
261 /* downstream I/O */
262 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
263 /* non-prefetchable memory */
264 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
265 interrupt-map-mask = <0 0 0 0>;
266 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
267 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
268 num-lanes = <1>;
269 clocks = <&cpm_syscon0 1 13>;
270 status = "disabled";
271 };
272
273 cpm_pcie1: pcie@f2620000 {
274 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
275 reg = <0 0xf2620000 0 0x10000>,
276 <0 0xf7f00000 0 0x80000>;
277 reg-names = "ctrl", "config";
278 #address-cells = <3>;
279 #size-cells = <2>;
280 #interrupt-cells = <1>;
281 device_type = "pci";
282 dma-coherent;
283 msi-parent = <&gic_v2m0>;
284
285 bus-range = <0 0xff>;
286 ranges =
287 /* downstream I/O */
288 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
289 /* non-prefetchable memory */
290 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
291 interrupt-map-mask = <0 0 0 0>;
292 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
293 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
294
295 num-lanes = <1>;
296 clocks = <&cpm_syscon0 1 11>;
297 status = "disabled";
298 };
299
300 cpm_pcie2: pcie@f2640000 {
301 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
302 reg = <0 0xf2640000 0 0x10000>,
303 <0 0xf8f00000 0 0x80000>;
304 reg-names = "ctrl", "config";
305 #address-cells = <3>;
306 #size-cells = <2>;
307 #interrupt-cells = <1>;
308 device_type = "pci";
309 dma-coherent;
310 msi-parent = <&gic_v2m0>;
311
312 bus-range = <0 0xff>;
313 ranges =
314 /* downstream I/O */
315 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
316 /* non-prefetchable memory */
317 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
318 interrupt-map-mask = <0 0 0 0>;
319 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
320 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
321
322 num-lanes = <1>;
323 clocks = <&cpm_syscon0 1 12>;
324 status = "disabled";
325 };
326 };
327 };
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