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[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / marvell / armada-cp110-slave.dtsi
1 /*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 /*
44 * Device Tree file for Marvell Armada CP110 Slave.
45 */
46
47 / {
48 cp110-slave {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 compatible = "simple-bus";
52 interrupt-parent = <&gic>;
53 ranges;
54
55 config-space@f4000000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&gic>;
60 ranges = <0x0 0x0 0xf4000000 0x2000000>;
61
62 cps_rtc: rtc@284000 {
63 compatible = "marvell,armada-8k-rtc";
64 reg = <0x284000 0x20>, <0x284080 0x24>;
65 reg-names = "rtc", "rtc-soc";
66 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
67 };
68
69 cps_ethernet: ethernet@0 {
70 compatible = "marvell,armada-7k-pp22";
71 reg = <0x0 0x100000>, <0x129000 0xb000>;
72 clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
73 clock-names = "pp_clk", "gop_clk", "mg_clk";
74 status = "disabled";
75 dma-coherent;
76
77 cps_eth0: eth0 {
78 interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
79 port-id = <0>;
80 gop-port-id = <0>;
81 status = "disabled";
82 };
83
84 cps_eth1: eth1 {
85 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
86 port-id = <1>;
87 gop-port-id = <2>;
88 status = "disabled";
89 };
90
91 cps_eth2: eth2 {
92 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
93 port-id = <2>;
94 gop-port-id = <3>;
95 status = "disabled";
96 };
97 };
98
99 cps_mdio: mdio@12a200 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "marvell,orion-mdio";
103 reg = <0x12a200 0x10>;
104 };
105
106 cps_syscon0: system-controller@440000 {
107 compatible = "marvell,cp110-system-controller0",
108 "syscon";
109 reg = <0x440000 0x1000>;
110 #clock-cells = <2>;
111 core-clock-output-names =
112 "cps-apll", "cps-ppv2-core", "cps-eip",
113 "cps-core", "cps-nand-core";
114 gate-clock-output-names =
115 "cps-audio", "cps-communit", "cps-nand",
116 "cps-ppv2", "cps-sdio", "cps-mg-domain",
117 "cps-mg-core", "cps-xor1", "cps-xor0",
118 "cps-gop-dp", "none", "cps-pcie_x10",
119 "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
120 "cps-sata", "cps-sata-usb", "cps-main",
121 "cps-sd-mmc-gop", "none", "none",
122 "cps-slow-io", "cps-usb3h0", "cps-usb3h1",
123 "cps-usb3dev", "cps-eip150", "cps-eip197";
124 };
125
126 cps_sata0: sata@540000 {
127 compatible = "marvell,armada-8k-ahci",
128 "generic-ahci";
129 reg = <0x540000 0x30000>;
130 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
131 clocks = <&cps_syscon0 1 15>;
132 status = "disabled";
133 };
134
135 cps_usb3_0: usb3@500000 {
136 compatible = "marvell,armada-8k-xhci",
137 "generic-xhci";
138 reg = <0x500000 0x4000>;
139 dma-coherent;
140 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
141 clocks = <&cps_syscon0 1 22>;
142 status = "disabled";
143 };
144
145 cps_usb3_1: usb3@510000 {
146 compatible = "marvell,armada-8k-xhci",
147 "generic-xhci";
148 reg = <0x510000 0x4000>;
149 dma-coherent;
150 interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
151 clocks = <&cps_syscon0 1 23>;
152 status = "disabled";
153 };
154
155 cps_xor0: xor@6a0000 {
156 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
157 reg = <0x6a0000 0x1000>,
158 <0x6b0000 0x1000>;
159 dma-coherent;
160 msi-parent = <&gic_v2m0>;
161 clocks = <&cps_syscon0 1 8>;
162 };
163
164 cps_xor1: xor@6c0000 {
165 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
166 reg = <0x6c0000 0x1000>,
167 <0x6d0000 0x1000>;
168 dma-coherent;
169 msi-parent = <&gic_v2m0>;
170 clocks = <&cps_syscon0 1 7>;
171 };
172
173 cps_spi0: spi@700600 {
174 compatible = "marvell,armada-380-spi";
175 reg = <0x700600 0x50>;
176 #address-cells = <0x1>;
177 #size-cells = <0x0>;
178 cell-index = <3>;
179 clocks = <&cps_syscon0 1 21>;
180 status = "disabled";
181 };
182
183 cps_spi1: spi@700680 {
184 compatible = "marvell,armada-380-spi";
185 reg = <0x700680 0x50>;
186 #address-cells = <1>;
187 #size-cells = <0>;
188 cell-index = <4>;
189 clocks = <&cps_syscon0 1 21>;
190 status = "disabled";
191 };
192
193 cps_i2c0: i2c@701000 {
194 compatible = "marvell,mv78230-i2c";
195 reg = <0x701000 0x20>;
196 #address-cells = <1>;
197 #size-cells = <0>;
198 interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
199 clocks = <&cps_syscon0 1 21>;
200 status = "disabled";
201 };
202
203 cps_i2c1: i2c@701100 {
204 compatible = "marvell,mv78230-i2c";
205 reg = <0x701100 0x20>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
209 clocks = <&cps_syscon0 1 21>;
210 status = "disabled";
211 };
212
213 cps_trng: trng@760000 {
214 compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
215 reg = <0x760000 0x7d>;
216 interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
217 clocks = <&cps_syscon0 1 25>;
218 status = "okay";
219 };
220
221 cps_crypto: crypto@800000 {
222 compatible = "inside-secure,safexcel-eip197";
223 reg = <0x800000 0x200000>;
224 interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
225 | IRQ_TYPE_LEVEL_HIGH)>,
226 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>;
231 interrupt-names = "mem", "ring0", "ring1",
232 "ring2", "ring3", "eip";
233 clocks = <&cps_syscon0 1 26>;
234 status = "disabled";
235 };
236 };
237
238 cps_pcie0: pcie@f4600000 {
239 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
240 reg = <0 0xf4600000 0 0x10000>,
241 <0 0xfaf00000 0 0x80000>;
242 reg-names = "ctrl", "config";
243 #address-cells = <3>;
244 #size-cells = <2>;
245 #interrupt-cells = <1>;
246 device_type = "pci";
247 dma-coherent;
248 msi-parent = <&gic_v2m0>;
249
250 bus-range = <0 0xff>;
251 ranges =
252 /* downstream I/O */
253 <0x81000000 0 0xfd000000 0 0xfd000000 0 0x10000
254 /* non-prefetchable memory */
255 0x82000000 0 0xfa000000 0 0xfa000000 0 0xf00000>;
256 interrupt-map-mask = <0 0 0 0>;
257 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
258 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
259 num-lanes = <1>;
260 clocks = <&cps_syscon0 1 13>;
261 status = "disabled";
262 };
263
264 cps_pcie1: pcie@f4620000 {
265 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
266 reg = <0 0xf4620000 0 0x10000>,
267 <0 0xfbf00000 0 0x80000>;
268 reg-names = "ctrl", "config";
269 #address-cells = <3>;
270 #size-cells = <2>;
271 #interrupt-cells = <1>;
272 device_type = "pci";
273 dma-coherent;
274 msi-parent = <&gic_v2m0>;
275
276 bus-range = <0 0xff>;
277 ranges =
278 /* downstream I/O */
279 <0x81000000 0 0xfd010000 0 0xfd010000 0 0x10000
280 /* non-prefetchable memory */
281 0x82000000 0 0xfb000000 0 0xfb000000 0 0xf00000>;
282 interrupt-map-mask = <0 0 0 0>;
283 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
284 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
285
286 num-lanes = <1>;
287 clocks = <&cps_syscon0 1 11>;
288 status = "disabled";
289 };
290
291 cps_pcie2: pcie@f4640000 {
292 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
293 reg = <0 0xf4640000 0 0x10000>,
294 <0 0xfcf00000 0 0x80000>;
295 reg-names = "ctrl", "config";
296 #address-cells = <3>;
297 #size-cells = <2>;
298 #interrupt-cells = <1>;
299 device_type = "pci";
300 dma-coherent;
301 msi-parent = <&gic_v2m0>;
302
303 bus-range = <0 0xff>;
304 ranges =
305 /* downstream I/O */
306 <0x81000000 0 0xfd020000 0 0xfd020000 0 0x10000
307 /* non-prefetchable memory */
308 0x82000000 0 0xfc000000 0 0xfc000000 0 0xf00000>;
309 interrupt-map-mask = <0 0 0 0>;
310 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
311 interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
312
313 num-lanes = <1>;
314 clocks = <&cps_syscon0 1 12>;
315 status = "disabled";
316 };
317 };
318 };
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