]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[mirror_ubuntu-bionic-kernel.git] / arch / arm64 / boot / dts / nvidia / tegra186-p3310.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi"
3
4 #include <dt-bindings/mfd/max77620.h>
5
6 / {
7 model = "NVIDIA Tegra186 P3310 Processor Module";
8 compatible = "nvidia,p3310", "nvidia,tegra186";
9
10 aliases {
11 sdhci0 = "/sdhci@3460000";
12 sdhci1 = "/sdhci@3400000";
13 serial0 = &uarta;
14 i2c0 = "/bpmp/i2c";
15 i2c1 = "/i2c@3160000";
16 i2c2 = "/i2c@c240000";
17 i2c3 = "/i2c@3180000";
18 i2c4 = "/i2c@3190000";
19 i2c5 = "/i2c@31c0000";
20 i2c6 = "/i2c@c250000";
21 i2c7 = "/i2c@31e0000";
22 };
23
24 chosen {
25 bootargs = "earlycon console=ttyS0,115200n8";
26 stdout-path = "serial0:115200n8";
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x0 0x80000000 0x2 0x00000000>;
32 };
33
34 ethernet@2490000 {
35 status = "okay";
36
37 phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;
38 phy-handle = <&phy>;
39 phy-mode = "rgmii";
40
41 mdio {
42 #address-cells = <1>;
43 #size-cells = <0>;
44
45 phy: phy@0 {
46 compatible = "ethernet-phy-ieee802.3-c22";
47 reg = <0x0>;
48 interrupt-parent = <&gpio>;
49 interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>;
50 };
51 };
52 };
53
54 serial@3100000 {
55 status = "okay";
56 };
57
58 i2c@3160000 {
59 status = "okay";
60
61 power-monitor@40 {
62 compatible = "ti,ina3221";
63 reg = <0x40>;
64 };
65
66 power-monitor@41 {
67 compatible = "ti,ina3221";
68 reg = <0x41>;
69 };
70 };
71
72 i2c@3180000 {
73 status = "okay";
74 };
75
76 i2c@3190000 {
77 status = "okay";
78 };
79
80 i2c@31c0000 {
81 status = "okay";
82 };
83
84 i2c@31e0000 {
85 status = "okay";
86 };
87
88 /* SDMMC1 (SD/MMC) */
89 sdhci@3400000 {
90 cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
91 wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>;
92
93 vqmmc-supply = <&vddio_sdmmc1>;
94 };
95
96 /* SDMMC3 (SDIO) */
97 sdhci@3440000 {
98 status = "okay";
99 };
100
101 /* SDMMC4 (eMMC) */
102 sdhci@3460000 {
103 status = "okay";
104 bus-width = <8>;
105 non-removable;
106
107 vqmmc-supply = <&vdd_1v8_ap>;
108 vmmc-supply = <&vdd_3v3_sys>;
109 };
110
111 hsp@3c00000 {
112 status = "okay";
113 };
114
115 i2c@c240000 {
116 status = "okay";
117 };
118
119 i2c@c250000 {
120 status = "okay";
121 };
122
123 pmc@c360000 {
124 nvidia,invert-interrupt;
125 };
126
127 cpus {
128 cpu@0 {
129 enable-method = "psci";
130 };
131
132 cpu@1 {
133 enable-method = "psci";
134 };
135
136 cpu@2 {
137 enable-method = "psci";
138 };
139
140 cpu@3 {
141 enable-method = "psci";
142 };
143
144 cpu@4 {
145 enable-method = "psci";
146 };
147
148 cpu@5 {
149 enable-method = "psci";
150 };
151 };
152
153 bpmp {
154 i2c {
155 status = "okay";
156
157 pmic: pmic@3c {
158 compatible = "maxim,max77620";
159 reg = <0x3c>;
160
161 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
164
165 #gpio-cells = <2>;
166 gpio-controller;
167
168 pinctrl-names = "default";
169 pinctrl-0 = <&max77620_default>;
170
171 max77620_default: pinmux {
172 gpio0 {
173 pins = "gpio0";
174 function = "gpio";
175 };
176
177 gpio1 {
178 pins = "gpio1";
179 function = "fps-out";
180 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
181 };
182
183 gpio2 {
184 pins = "gpio2";
185 function = "fps-out";
186 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
187 };
188
189 gpio3 {
190 pins = "gpio3";
191 function = "fps-out";
192 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
193 };
194
195 gpio4 {
196 pins = "gpio4";
197 function = "32k-out1";
198 drive-push-pull = <1>;
199 };
200
201 gpio5 {
202 pins = "gpio5";
203 function = "gpio";
204 drive-push-pull = <0>;
205 };
206
207 gpio6 {
208 pins = "gpio6";
209 function = "gpio";
210 drive-push-pull = <1>;
211 };
212
213 gpio7 {
214 pins = "gpio7";
215 function = "gpio";
216 drive-push-pull = <0>;
217 };
218 };
219
220 fps {
221 fps0 {
222 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
223 maxim,shutdown-fps-time-period-us = <640>;
224 };
225
226 fps1 {
227 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
228 maxim,shutdown-fps-time-period-us = <640>;
229 };
230
231 fps2 {
232 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
233 maxim,shutdown-fps-time-period-us = <640>;
234 };
235 };
236
237 regulators {
238 in-sd0-supply = <&vdd_5v0_sys>;
239 in-sd1-supply = <&vdd_5v0_sys>;
240 in-sd2-supply = <&vdd_5v0_sys>;
241 in-sd3-supply = <&vdd_5v0_sys>;
242
243 in-ldo0-1-supply = <&vdd_5v0_sys>;
244 in-ldo2-supply = <&vdd_5v0_sys>;
245 in-ldo3-5-supply = <&vdd_5v0_sys>;
246 in-ldo4-6-supply = <&vdd_1v8>;
247 in-ldo7-8-supply = <&avdd_dsi_csi>;
248
249 sd0 {
250 regulator-name = "VDD_DDR_1V1_PMIC";
251 regulator-min-microvolt = <1100000>;
252 regulator-max-microvolt = <1100000>;
253 regulator-always-on;
254 regulator-boot-on;
255 };
256
257 avdd_dsi_csi: sd1 {
258 regulator-name = "AVDD_DSI_CSI_1V2";
259 regulator-min-microvolt = <1200000>;
260 regulator-max-microvolt = <1200000>;
261 /* XXX */
262 regulator-always-on;
263 regulator-boot-on;
264 };
265
266 vdd_1v8: sd2 {
267 regulator-name = "VDD_1V8";
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
270 /* XXX */
271 regulator-always-on;
272 regulator-boot-on;
273 };
274
275 vdd_3v3_sys: sd3 {
276 regulator-name = "VDD_3V3_SYS";
277 regulator-min-microvolt = <3300000>;
278 regulator-max-microvolt = <3300000>;
279 /* XXX */
280 regulator-always-on;
281 regulator-boot-on;
282 };
283
284 ldo0 {
285 regulator-name = "VDD_1V8_AP_PLL";
286 regulator-min-microvolt = <1800000>;
287 regulator-max-microvolt = <1800000>;
288 /* XXX */
289 regulator-always-on;
290 regulator-boot-on;
291 };
292
293 ldo2 {
294 regulator-name = "VDDIO_3V3_AOHV";
295 regulator-min-microvolt = <3300000>;
296 regulator-max-microvolt = <3300000>;
297 /* XXX */
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302 vddio_sdmmc1: ldo3 {
303 regulator-name = "VDDIO_SDMMC1_AP";
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <3300000>;
306 };
307
308 ldo4 {
309 regulator-name = "VDD_RTC";
310 regulator-min-microvolt = <1000000>;
311 regulator-max-microvolt = <1000000>;
312 };
313
314 vddio_sdmmc3: ldo5 {
315 regulator-name = "VDDIO_SDMMC3_AP";
316 regulator-min-microvolt = <2800000>;
317 regulator-max-microvolt = <2800000>;
318 };
319
320 avdd_1v05: ldo7 {
321 regulator-name = "VDD_HDMI_1V05";
322 regulator-min-microvolt = <1050000>;
323 regulator-max-microvolt = <1050000>;
324 /* XXX */
325 regulator-always-on;
326 regulator-boot-on;
327 };
328
329 vdd_pex: ldo8 {
330 regulator-name = "VDD_PEX_1V05";
331 regulator-min-microvolt = <1050000>;
332 regulator-max-microvolt = <1050000>;
333 /* XXX */
334 regulator-always-on;
335 regulator-boot-on;
336 };
337 };
338 };
339 };
340 };
341
342 psci {
343 compatible = "arm,psci-1.0";
344 status = "okay";
345 method = "smc";
346 };
347
348 regulators {
349 compatible = "simple-bus";
350 #address-cells = <1>;
351 #size-cells = <0>;
352
353 vdd_5v0_sys: regulator@0 {
354 compatible = "regulator-fixed";
355 reg = <0>;
356
357 regulator-name = "VDD_5V0_SYS";
358 regulator-min-microvolt = <5000000>;
359 regulator-max-microvolt = <5000000>;
360 regulator-always-on;
361 regulator-boot-on;
362 };
363
364 vdd_1v8_ap: regulator@1 {
365 compatible = "regulator-fixed";
366 reg = <1>;
367
368 regulator-name = "VDD_1V8_AP";
369 regulator-min-microvolt = <1800000>;
370 regulator-max-microvolt = <1800000>;
371
372 /* XXX */
373 regulator-always-on;
374 regulator-boot-on;
375
376 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
377 enable-active-high;
378
379 vin-supply = <&vdd_1v8>;
380 };
381 };
382 };