arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

   1 /*
   2  * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2016 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7795.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "Renesas H3ULCB board based on r8a7795";
  19         compatible = "renesas,h3ulcb", "renesas,r8a7795";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23                 ethernet0 = &avb;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@48000000 {
  31                 device_type = "memory";
  32                 /* first 128MB is reserved for secure area. */
  33                 reg = <0x0 0x48000000 0x0 0x38000000>;
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 led5 {
  40                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  41                 };
  42                 led6 {
  43                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  44                 };
  45         };
  46
  47         keyboard {
  48                 compatible = "gpio-keys";
  49
  50                 key-1 {
  51                         linux,code = <KEY_1>;
  52                         label = "SW3";
  53                         wakeup-source;
  54                         debounce-interval = <20>;
  55                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  56                 };
  57         };
  58
  59         x12_clk: x12 {
  60                 compatible = "fixed-clock";
  61                 #clock-cells = <0>;
  62                 clock-frequency = <24576000>;
  63         };
  64
  65         reg_1p8v: regulator0 {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "fixed-1.8V";
  68                 regulator-min-microvolt = <1800000>;
  69                 regulator-max-microvolt = <1800000>;
  70                 regulator-boot-on;
  71                 regulator-always-on;
  72         };
  73
  74         reg_3p3v: regulator1 {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "fixed-3.3V";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79                 regulator-boot-on;
  80                 regulator-always-on;
  81         };
  82
  83         vcc_sdhi0: regulator-vcc-sdhi0 {
  84                 compatible = "regulator-fixed";
  85
  86                 regulator-name = "SDHI0 Vcc";
  87                 regulator-min-microvolt = <3300000>;
  88                 regulator-max-microvolt = <3300000>;
  89
  90                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  91                 enable-active-high;
  92         };
  93
  94         vccq_sdhi0: regulator-vccq-sdhi0 {
  95                 compatible = "regulator-gpio";
  96
  97                 regulator-name = "SDHI0 VccQ";
  98                 regulator-min-microvolt = <1800000>;
  99                 regulator-max-microvolt = <3300000>;
 100
 101                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 102                 gpios-states = <1>;
 103                 states = <3300000 1
 104                           1800000 0>;
 105         };
 106
 107         audio_clkout: audio-clkout {
 108                 /*
 109                  * This is same as <&rcar_sound 0>
 110                  * but needed to avoid cs2000/rcar_sound probe dead-lock
 111                  */
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <11289600>;
 115         };
 116
 117         rsnd_ak4613: sound {
 118                 compatible = "simple-audio-card";
 119
 120                 simple-audio-card,format = "left_j";
 121                 simple-audio-card,bitclock-master = <&sndcpu>;
 122                 simple-audio-card,frame-master = <&sndcpu>;
 123
 124                 sndcpu: simple-audio-card,cpu {
 125                         sound-dai = <&rcar_sound>;
 126                 };
 127
 128                 sndcodec: simple-audio-card,codec {
 129                         sound-dai = <&ak4613>;
 130                 };
 131         };
 132 };
 133
 134 &extal_clk {
 135         clock-frequency = <16666666>;
 136 };
 137
 138 &extalr_clk {
 139         clock-frequency = <32768>;
 140 };
 141
 142 &pfc {
 143         pinctrl-0 = <&scif_clk_pins>;
 144         pinctrl-names = "default";
 145
 146         scif2_pins: scif2 {
 147                 groups = "scif2_data_a";
 148                 function = "scif2";
 149         };
 150
 151         scif_clk_pins: scif_clk {
 152                 groups = "scif_clk_a";
 153                 function = "scif_clk";
 154         };
 155
 156         i2c2_pins: i2c2 {
 157                 groups = "i2c2_a";
 158                 function = "i2c2";
 159         };
 160
 161         avb_pins: avb {
 162                 groups = "avb_mdc";
 163                 function = "avb";
 164         };
 165
 166         sdhi0_pins: sd0 {
 167                 groups = "sdhi0_data4", "sdhi0_ctrl";
 168                 function = "sdhi0";
 169                 power-source = <3300>;
 170         };
 171
 172         sdhi0_pins_uhs: sd0_uhs {
 173                 groups = "sdhi0_data4", "sdhi0_ctrl";
 174                 function = "sdhi0";
 175                 power-source = <1800>;
 176         };
 177
 178         sdhi2_pins: sd2 {
 179                 groups = "sdhi2_data8", "sdhi2_ctrl";
 180                 function = "sdhi2";
 181                 power-source = <3300>;
 182         };
 183
 184         sdhi2_pins_uhs: sd2_uhs {
 185                 groups = "sdhi2_data8", "sdhi2_ctrl";
 186                 function = "sdhi2";
 187                 power-source = <1800>;
 188         };
 189
 190         sound_pins: sound {
 191                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 192                 function = "ssi";
 193         };
 194
 195         sound_clk_pins: sound-clk {
 196                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 197                          "audio_clkout_a", "audio_clkout3_a";
 198                 function = "audio_clk";
 199         };
 200
 201         usb1_pins: usb1 {
 202                 groups = "usb1";
 203                 function = "usb1";
 204         };
 205 };
 206
 207 &scif2 {
 208         pinctrl-0 = <&scif2_pins>;
 209         pinctrl-names = "default";
 210
 211         status = "okay";
 212 };
 213
 214 &scif_clk {
 215         clock-frequency = <14745600>;
 216         status = "okay";
 217 };
 218
 219 &i2c2 {
 220         pinctrl-0 = <&i2c2_pins>;
 221         pinctrl-names = "default";
 222
 223         status = "okay";
 224
 225         clock-frequency = <100000>;
 226
 227         ak4613: codec@10 {
 228                 compatible = "asahi-kasei,ak4613";
 229                 #sound-dai-cells = <0>;
 230                 reg = <0x10>;
 231                 clocks = <&rcar_sound 3>;
 232
 233                 asahi-kasei,in1-single-end;
 234                 asahi-kasei,in2-single-end;
 235                 asahi-kasei,out1-single-end;
 236                 asahi-kasei,out2-single-end;
 237                 asahi-kasei,out3-single-end;
 238                 asahi-kasei,out4-single-end;
 239                 asahi-kasei,out5-single-end;
 240                 asahi-kasei,out6-single-end;
 241         };
 242
 243         cs2000: clk-multiplier@4f {
 244                 #clock-cells = <0>;
 245                 compatible = "cirrus,cs2000-cp";
 246                 reg = <0x4f>;
 247                 clocks = <&audio_clkout>, <&x12_clk>;
 248                 clock-names = "clk_in", "ref_clk";
 249
 250                 assigned-clocks = <&cs2000>;
 251                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 252         };
 253 };
 254
 255 &rcar_sound {
 256         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 257         pinctrl-names = "default";
 258
 259         /* Single DAI */
 260         #sound-dai-cells = <0>;
 261
 262         /* audio_clkout0/1/2/3 */
 263         #clock-cells = <1>;
 264         clock-frequency = <11289600>;
 265
 266         status = "okay";
 267
 268         /* update <audio_clk_b> to <cs2000> */
 269         clocks = <&cpg CPG_MOD 1005>,
 270                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 271                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 272                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 273                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 274                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 275                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 276                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 277                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 278                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 279                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 280                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 281                  <&audio_clk_a>, <&cs2000>,
 282                  <&audio_clk_c>,
 283                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 284
 285         rcar_sound,dai {
 286                 dai0 {
 287                         playback = <&ssi0 &src0 &dvc0>;
 288                         capture  = <&ssi1 &src1 &dvc1>;
 289                 };
 290         };
 291 };
 292
 293 &sdhi0 {
 294         pinctrl-0 = <&sdhi0_pins>;
 295         pinctrl-1 = <&sdhi0_pins_uhs>;
 296         pinctrl-names = "default", "state_uhs";
 297
 298         vmmc-supply = <&vcc_sdhi0>;
 299         vqmmc-supply = <&vccq_sdhi0>;
 300         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 301         bus-width = <4>;
 302         sd-uhs-sdr50;
 303         status = "okay";
 304 };
 305
 306 &sdhi2 {
 307         /* used for on-board 8bit eMMC */
 308         pinctrl-0 = <&sdhi2_pins>;
 309         pinctrl-1 = <&sdhi2_pins_uhs>;
 310         pinctrl-names = "default", "state_uhs";
 311
 312         vmmc-supply = <&reg_3p3v>;
 313         vqmmc-supply = <&reg_1p8v>;
 314         bus-width = <8>;
 315         non-removable;
 316         status = "okay";
 317 };
 318
 319 &ssi1 {
 320         shared-pin;
 321 };
 322
 323 &wdt0 {
 324         timeout-sec = <60>;
 325         status = "okay";
 326 };
 327
 328 &audio_clk_a {
 329         clock-frequency = <22579200>;
 330 };
 331
 332 &avb {
 333         pinctrl-0 = <&avb_pins>;
 334         pinctrl-names = "default";
 335         renesas,no-ether-link;
 336         phy-handle = <&phy0>;
 337         status = "okay";
 338
 339         phy0: ethernet-phy@0 {
 340                 rxc-skew-ps = <900>;
 341                 rxdv-skew-ps = <0>;
 342                 rxd0-skew-ps = <0>;
 343                 rxd1-skew-ps = <0>;
 344                 rxd2-skew-ps = <0>;
 345                 rxd3-skew-ps = <0>;
 346                 txc-skew-ps = <900>;
 347                 txen-skew-ps = <0>;
 348                 txd0-skew-ps = <0>;
 349                 txd1-skew-ps = <0>;
 350                 txd2-skew-ps = <0>;
 351                 txd3-skew-ps = <0>;
 352                 reg = <0>;
 353                 interrupt-parent = <&gpio2>;
 354                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 355         };
 356 };
 357
 358 &usb2_phy1 {
 359         pinctrl-0 = <&usb1_pins>;
 360         pinctrl-names = "default";
 361
 362         status = "okay";
 363 };
 364
 365 &ehci1 {
 366         status = "okay";
 367 };
 368
 369 &ohci1 {
 370         status = "okay";
 371 };