arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a57_2: cpu@2 {
  58                         compatible = "arm,cortex-a57","arm,armv8";
  59                         reg = <0x2>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  62                         next-level-cache = <&L2_CA57>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a57_3: cpu@3 {
  67                         compatible = "arm,cortex-a57","arm,armv8";
  68                         reg = <0x3>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  71                         next-level-cache = <&L2_CA57>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 L2_CA57: cache-controller@0 {
  76                         compatible = "cache";
  77                         reg = <0>;
  78                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
  79                         cache-unified;
  80                         cache-level = <2>;
  81                 };
  82
  83                 L2_CA53: cache-controller@100 {
  84                         compatible = "cache";
  85                         reg = <0x100>;
  86                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
  87                         cache-unified;
  88                         cache-level = <2>;
  89                 };
  90         };
  91
  92         extal_clk: extal {
  93                 compatible = "fixed-clock";
  94                 #clock-cells = <0>;
  95                 /* This value must be overridden by the board */
  96                 clock-frequency = <0>;
  97         };
  98
  99         extalr_clk: extalr {
 100                 compatible = "fixed-clock";
 101                 #clock-cells = <0>;
 102                 /* This value must be overridden by the board */
 103                 clock-frequency = <0>;
 104         };
 105
 106         /*
 107          * The external audio clocks are configured as 0 Hz fixed frequency
 108          * clocks by default.
 109          * Boards that provide audio clocks should override them.
 110          */
 111         audio_clk_a: audio_clk_a {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <0>;
 115         };
 116
 117         audio_clk_b: audio_clk_b {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <0>;
 121         };
 122
 123         audio_clk_c: audio_clk_c {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         /* External CAN clock - to be overridden by boards that provide it */
 130         can_clk: can {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 clock-frequency = <0>;
 134         };
 135
 136         /* External SCIF clock - to be overridden by boards that provide it */
 137         scif_clk: scif {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <0>;
 141         };
 142
 143         /* External PCIe clock - can be overridden by the board */
 144         pcie_bus_clk: pcie_bus {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 clock-frequency = <0>;
 148         };
 149
 150         soc {
 151                 compatible = "simple-bus";
 152                 interrupt-parent = <&gic>;
 153
 154                 #address-cells = <2>;
 155                 #size-cells = <2>;
 156                 ranges;
 157
 158                 gic: interrupt-controller@f1010000 {
 159                         compatible = "arm,gic-400";
 160                         #interrupt-cells = <3>;
 161                         #address-cells = <0>;
 162                         interrupt-controller;
 163                         reg = <0x0 0xf1010000 0 0x1000>,
 164                               <0x0 0xf1020000 0 0x20000>,
 165                               <0x0 0xf1040000 0 0x20000>,
 166                               <0x0 0xf1060000 0 0x20000>;
 167                         interrupts = <GIC_PPI 9
 168                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 169                 };
 170
 171                 wdt0: watchdog@e6020000 {
 172                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 176                         status = "disabled";
 177                 };
 178
 179                 gpio0: gpio@e6050000 {
 180                         compatible = "renesas,gpio-r8a7795",
 181                                      "renesas,gpio-rcar";
 182                         reg = <0 0xe6050000 0 0x50>;
 183                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 184                         #gpio-cells = <2>;
 185                         gpio-controller;
 186                         gpio-ranges = <&pfc 0 0 16>;
 187                         #interrupt-cells = <2>;
 188                         interrupt-controller;
 189                         clocks = <&cpg CPG_MOD 912>;
 190                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 191                 };
 192
 193                 gpio1: gpio@e6051000 {
 194                         compatible = "renesas,gpio-r8a7795",
 195                                      "renesas,gpio-rcar";
 196                         reg = <0 0xe6051000 0 0x50>;
 197                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 32 28>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 911>;
 204                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 205                 };
 206
 207                 gpio2: gpio@e6052000 {
 208                         compatible = "renesas,gpio-r8a7795",
 209                                      "renesas,gpio-rcar";
 210                         reg = <0 0xe6052000 0 0x50>;
 211                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 64 15>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 910>;
 218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 219                 };
 220
 221                 gpio3: gpio@e6053000 {
 222                         compatible = "renesas,gpio-r8a7795",
 223                                      "renesas,gpio-rcar";
 224                         reg = <0 0xe6053000 0 0x50>;
 225                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 226                         #gpio-cells = <2>;
 227                         gpio-controller;
 228                         gpio-ranges = <&pfc 0 96 16>;
 229                         #interrupt-cells = <2>;
 230                         interrupt-controller;
 231                         clocks = <&cpg CPG_MOD 909>;
 232                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 233                 };
 234
 235                 gpio4: gpio@e6054000 {
 236                         compatible = "renesas,gpio-r8a7795",
 237                                      "renesas,gpio-rcar";
 238                         reg = <0 0xe6054000 0 0x50>;
 239                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 240                         #gpio-cells = <2>;
 241                         gpio-controller;
 242                         gpio-ranges = <&pfc 0 128 18>;
 243                         #interrupt-cells = <2>;
 244                         interrupt-controller;
 245                         clocks = <&cpg CPG_MOD 908>;
 246                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 247                 };
 248
 249                 gpio5: gpio@e6055000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6055000 0 0x50>;
 253                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 160 26>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 907>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                 };
 262
 263                 gpio6: gpio@e6055400 {
 264                         compatible = "renesas,gpio-r8a7795",
 265                                      "renesas,gpio-rcar";
 266                         reg = <0 0xe6055400 0 0x50>;
 267                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 192 32>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 906>;
 274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 275                 };
 276
 277                 gpio7: gpio@e6055800 {
 278                         compatible = "renesas,gpio-r8a7795",
 279                                      "renesas,gpio-rcar";
 280                         reg = <0 0xe6055800 0 0x50>;
 281                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 282                         #gpio-cells = <2>;
 283                         gpio-controller;
 284                         gpio-ranges = <&pfc 0 224 4>;
 285                         #interrupt-cells = <2>;
 286                         interrupt-controller;
 287                         clocks = <&cpg CPG_MOD 905>;
 288                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 289                 };
 290
 291                 pmu_a57 {
 292                         compatible = "arm,cortex-a57-pmu";
 293                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 297                         interrupt-affinity = <&a57_0>,
 298                                              <&a57_1>,
 299                                              <&a57_2>,
 300                                              <&a57_3>;
 301                 };
 302
 303                 timer {
 304                         compatible = "arm,armv8-timer";
 305                         interrupts = <GIC_PPI 13
 306                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 307                                      <GIC_PPI 14
 308                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                                      <GIC_PPI 11
 310                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 311                                      <GIC_PPI 10
 312                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 313                 };
 314
 315                 cpg: clock-controller@e6150000 {
 316                         compatible = "renesas,r8a7795-cpg-mssr";
 317                         reg = <0 0xe6150000 0 0x1000>;
 318                         clocks = <&extal_clk>, <&extalr_clk>;
 319                         clock-names = "extal", "extalr";
 320                         #clock-cells = <2>;
 321                         #power-domain-cells = <0>;
 322                 };
 323
 324                 rst: reset-controller@e6160000 {
 325                         compatible = "renesas,r8a7795-rst";
 326                         reg = <0 0xe6160000 0 0x0200>;
 327                 };
 328
 329                 sysc: system-controller@e6180000 {
 330                         compatible = "renesas,r8a7795-sysc";
 331                         reg = <0 0xe6180000 0 0x0400>;
 332                         #power-domain-cells = <1>;
 333                 };
 334
 335                 audma0: dma-controller@ec700000 {
 336                         compatible = "renesas,dmac-r8a7795",
 337                                      "renesas,rcar-dmac";
 338                         reg = <0 0xec700000 0 0x10000>;
 339                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 351                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 352                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 353                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 354                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 355                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 356                         interrupt-names = "error",
 357                                         "ch0", "ch1", "ch2", "ch3",
 358                                         "ch4", "ch5", "ch6", "ch7",
 359                                         "ch8", "ch9", "ch10", "ch11",
 360                                         "ch12", "ch13", "ch14", "ch15";
 361                         clocks = <&cpg CPG_MOD 502>;
 362                         clock-names = "fck";
 363                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 364                         #dma-cells = <1>;
 365                         dma-channels = <16>;
 366                 };
 367
 368                 audma1: dma-controller@ec720000 {
 369                         compatible = "renesas,dmac-r8a7795",
 370                                      "renesas,rcar-dmac";
 371                         reg = <0 0xec720000 0 0x10000>;
 372                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 375                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 376                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 377                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 379                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 384                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 385                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 386                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 387                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 388                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 389                         interrupt-names = "error",
 390                                         "ch0", "ch1", "ch2", "ch3",
 391                                         "ch4", "ch5", "ch6", "ch7",
 392                                         "ch8", "ch9", "ch10", "ch11",
 393                                         "ch12", "ch13", "ch14", "ch15";
 394                         clocks = <&cpg CPG_MOD 501>;
 395                         clock-names = "fck";
 396                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 397                         #dma-cells = <1>;
 398                         dma-channels = <16>;
 399                 };
 400
 401                 pfc: pfc@e6060000 {
 402                         compatible = "renesas,pfc-r8a7795";
 403                         reg = <0 0xe6060000 0 0x50c>;
 404                 };
 405
 406                 intc_ex: interrupt-controller@e61c0000 {
 407                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 408                         #interrupt-cells = <2>;
 409                         interrupt-controller;
 410                         reg = <0 0xe61c0000 0 0x200>;
 411                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 412                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 413                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 417                         clocks = <&cpg CPG_MOD 407>;
 418                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 419                 };
 420
 421                 dmac0: dma-controller@e6700000 {
 422                         compatible = "renesas,dmac-r8a7795",
 423                                      "renesas,rcar-dmac";
 424                         reg = <0 0xe6700000 0 0x10000>;
 425                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 442                         interrupt-names = "error",
 443                                         "ch0", "ch1", "ch2", "ch3",
 444                                         "ch4", "ch5", "ch6", "ch7",
 445                                         "ch8", "ch9", "ch10", "ch11",
 446                                         "ch12", "ch13", "ch14", "ch15";
 447                         clocks = <&cpg CPG_MOD 219>;
 448                         clock-names = "fck";
 449                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 450                         #dma-cells = <1>;
 451                         dma-channels = <16>;
 452                 };
 453
 454                 dmac1: dma-controller@e7300000 {
 455                         compatible = "renesas,dmac-r8a7795",
 456                                      "renesas,rcar-dmac";
 457                         reg = <0 0xe7300000 0 0x10000>;
 458                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 475                         interrupt-names = "error",
 476                                         "ch0", "ch1", "ch2", "ch3",
 477                                         "ch4", "ch5", "ch6", "ch7",
 478                                         "ch8", "ch9", "ch10", "ch11",
 479                                         "ch12", "ch13", "ch14", "ch15";
 480                         clocks = <&cpg CPG_MOD 218>;
 481                         clock-names = "fck";
 482                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 483                         #dma-cells = <1>;
 484                         dma-channels = <16>;
 485                 };
 486
 487                 dmac2: dma-controller@e7310000 {
 488                         compatible = "renesas,dmac-r8a7795",
 489                                      "renesas,rcar-dmac";
 490                         reg = <0 0xe7310000 0 0x10000>;
 491                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 493                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 503                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 504                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 505                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 506                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 507                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 508                         interrupt-names = "error",
 509                                         "ch0", "ch1", "ch2", "ch3",
 510                                         "ch4", "ch5", "ch6", "ch7",
 511                                         "ch8", "ch9", "ch10", "ch11",
 512                                         "ch12", "ch13", "ch14", "ch15";
 513                         clocks = <&cpg CPG_MOD 217>;
 514                         clock-names = "fck";
 515                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 516                         #dma-cells = <1>;
 517                         dma-channels = <16>;
 518                 };
 519
 520                 avb: ethernet@e6800000 {
 521                         compatible = "renesas,etheravb-r8a7795",
 522                                      "renesas,etheravb-rcar-gen3";
 523                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 524                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 525                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 526                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 534                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 542                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 543                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 544                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 545                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 546                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 547                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 548                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 549                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 550                                           "ch4", "ch5", "ch6", "ch7",
 551                                           "ch8", "ch9", "ch10", "ch11",
 552                                           "ch12", "ch13", "ch14", "ch15",
 553                                           "ch16", "ch17", "ch18", "ch19",
 554                                           "ch20", "ch21", "ch22", "ch23",
 555                                           "ch24";
 556                         clocks = <&cpg CPG_MOD 812>;
 557                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 558                         phy-mode = "rgmii-id";
 559                         #address-cells = <1>;
 560                         #size-cells = <0>;
 561                 };
 562
 563                 can0: can@e6c30000 {
 564                         compatible = "renesas,can-r8a7795",
 565                                      "renesas,rcar-gen3-can";
 566                         reg = <0 0xe6c30000 0 0x1000>;
 567                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 568                         clocks = <&cpg CPG_MOD 916>,
 569                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 570                                <&can_clk>;
 571                         clock-names = "clkp1", "clkp2", "can_clk";
 572                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 573                         assigned-clock-rates = <40000000>;
 574                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 575                         status = "disabled";
 576                 };
 577
 578                 can1: can@e6c38000 {
 579                         compatible = "renesas,can-r8a7795",
 580                                      "renesas,rcar-gen3-can";
 581                         reg = <0 0xe6c38000 0 0x1000>;
 582                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 915>,
 584                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 585                                <&can_clk>;
 586                         clock-names = "clkp1", "clkp2", "can_clk";
 587                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 588                         assigned-clock-rates = <40000000>;
 589                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 590                         status = "disabled";
 591                 };
 592
 593                 canfd: can@e66c0000 {
 594                         compatible = "renesas,r8a7795-canfd",
 595                                      "renesas,rcar-gen3-canfd";
 596                         reg = <0 0xe66c0000 0 0x8000>;
 597                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 598                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 599                         clocks = <&cpg CPG_MOD 914>,
 600                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 601                                <&can_clk>;
 602                         clock-names = "fck", "canfd", "can_clk";
 603                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 604                         assigned-clock-rates = <40000000>;
 605                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 606                         status = "disabled";
 607
 608                         channel0 {
 609                                 status = "disabled";
 610                         };
 611
 612                         channel1 {
 613                                 status = "disabled";
 614                         };
 615                 };
 616
 617                 hscif0: serial@e6540000 {
 618                         compatible = "renesas,hscif-r8a7795",
 619                                      "renesas,rcar-gen3-hscif",
 620                                      "renesas,hscif";
 621                         reg = <0 0xe6540000 0 96>;
 622                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 623                         clocks = <&cpg CPG_MOD 520>,
 624                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 625                                  <&scif_clk>;
 626                         clock-names = "fck", "brg_int", "scif_clk";
 627                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 628                         dma-names = "tx", "rx";
 629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 630                         status = "disabled";
 631                 };
 632
 633                 hscif1: serial@e6550000 {
 634                         compatible = "renesas,hscif-r8a7795",
 635                                      "renesas,rcar-gen3-hscif",
 636                                      "renesas,hscif";
 637                         reg = <0 0xe6550000 0 96>;
 638                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 639                         clocks = <&cpg CPG_MOD 519>,
 640                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 641                                  <&scif_clk>;
 642                         clock-names = "fck", "brg_int", "scif_clk";
 643                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 644                         dma-names = "tx", "rx";
 645                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 646                         status = "disabled";
 647                 };
 648
 649                 hscif2: serial@e6560000 {
 650                         compatible = "renesas,hscif-r8a7795",
 651                                      "renesas,rcar-gen3-hscif",
 652                                      "renesas,hscif";
 653                         reg = <0 0xe6560000 0 96>;
 654                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 655                         clocks = <&cpg CPG_MOD 518>,
 656                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 657                                  <&scif_clk>;
 658                         clock-names = "fck", "brg_int", "scif_clk";
 659                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 660                         dma-names = "tx", "rx";
 661                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 662                         status = "disabled";
 663                 };
 664
 665                 hscif3: serial@e66a0000 {
 666                         compatible = "renesas,hscif-r8a7795",
 667                                      "renesas,rcar-gen3-hscif",
 668                                      "renesas,hscif";
 669                         reg = <0 0xe66a0000 0 96>;
 670                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 671                         clocks = <&cpg CPG_MOD 517>,
 672                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 673                                  <&scif_clk>;
 674                         clock-names = "fck", "brg_int", "scif_clk";
 675                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 676                         dma-names = "tx", "rx";
 677                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 678                         status = "disabled";
 679                 };
 680
 681                 hscif4: serial@e66b0000 {
 682                         compatible = "renesas,hscif-r8a7795",
 683                                      "renesas,rcar-gen3-hscif",
 684                                      "renesas,hscif";
 685                         reg = <0 0xe66b0000 0 96>;
 686                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 687                         clocks = <&cpg CPG_MOD 516>,
 688                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 689                                  <&scif_clk>;
 690                         clock-names = "fck", "brg_int", "scif_clk";
 691                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 692                         dma-names = "tx", "rx";
 693                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 694                         status = "disabled";
 695                 };
 696
 697                 scif0: serial@e6e60000 {
 698                         compatible = "renesas,scif-r8a7795",
 699                                      "renesas,rcar-gen3-scif", "renesas,scif";
 700                         reg = <0 0xe6e60000 0 64>;
 701                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 702                         clocks = <&cpg CPG_MOD 207>,
 703                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 704                                  <&scif_clk>;
 705                         clock-names = "fck", "brg_int", "scif_clk";
 706                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 707                         dma-names = "tx", "rx";
 708                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 709                         status = "disabled";
 710                 };
 711
 712                 scif1: serial@e6e68000 {
 713                         compatible = "renesas,scif-r8a7795",
 714                                      "renesas,rcar-gen3-scif", "renesas,scif";
 715                         reg = <0 0xe6e68000 0 64>;
 716                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 206>,
 718                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 719                                  <&scif_clk>;
 720                         clock-names = "fck", "brg_int", "scif_clk";
 721                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 722                         dma-names = "tx", "rx";
 723                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 724                         status = "disabled";
 725                 };
 726
 727                 scif2: serial@e6e88000 {
 728                         compatible = "renesas,scif-r8a7795",
 729                                      "renesas,rcar-gen3-scif", "renesas,scif";
 730                         reg = <0 0xe6e88000 0 64>;
 731                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 732                         clocks = <&cpg CPG_MOD 310>,
 733                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 734                                  <&scif_clk>;
 735                         clock-names = "fck", "brg_int", "scif_clk";
 736                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 737                         dma-names = "tx", "rx";
 738                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 739                         status = "disabled";
 740                 };
 741
 742                 scif3: serial@e6c50000 {
 743                         compatible = "renesas,scif-r8a7795",
 744                                      "renesas,rcar-gen3-scif", "renesas,scif";
 745                         reg = <0 0xe6c50000 0 64>;
 746                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 747                         clocks = <&cpg CPG_MOD 204>,
 748                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 749                                  <&scif_clk>;
 750                         clock-names = "fck", "brg_int", "scif_clk";
 751                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 752                         dma-names = "tx", "rx";
 753                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 754                         status = "disabled";
 755                 };
 756
 757                 scif4: serial@e6c40000 {
 758                         compatible = "renesas,scif-r8a7795",
 759                                      "renesas,rcar-gen3-scif", "renesas,scif";
 760                         reg = <0 0xe6c40000 0 64>;
 761                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 762                         clocks = <&cpg CPG_MOD 203>,
 763                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 764                                  <&scif_clk>;
 765                         clock-names = "fck", "brg_int", "scif_clk";
 766                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 767                         dma-names = "tx", "rx";
 768                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 769                         status = "disabled";
 770                 };
 771
 772                 scif5: serial@e6f30000 {
 773                         compatible = "renesas,scif-r8a7795",
 774                                      "renesas,rcar-gen3-scif", "renesas,scif";
 775                         reg = <0 0xe6f30000 0 64>;
 776                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 777                         clocks = <&cpg CPG_MOD 202>,
 778                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 779                                  <&scif_clk>;
 780                         clock-names = "fck", "brg_int", "scif_clk";
 781                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 782                         dma-names = "tx", "rx";
 783                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 784                         status = "disabled";
 785                 };
 786
 787                 i2c0: i2c@e6500000 {
 788                         #address-cells = <1>;
 789                         #size-cells = <0>;
 790                         compatible = "renesas,i2c-r8a7795";
 791                         reg = <0 0xe6500000 0 0x40>;
 792                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 793                         clocks = <&cpg CPG_MOD 931>;
 794                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 795                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 796                         dma-names = "tx", "rx";
 797                         i2c-scl-internal-delay-ns = <110>;
 798                         status = "disabled";
 799                 };
 800
 801                 i2c1: i2c@e6508000 {
 802                         #address-cells = <1>;
 803                         #size-cells = <0>;
 804                         compatible = "renesas,i2c-r8a7795";
 805                         reg = <0 0xe6508000 0 0x40>;
 806                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 807                         clocks = <&cpg CPG_MOD 930>;
 808                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 809                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 810                         dma-names = "tx", "rx";
 811                         i2c-scl-internal-delay-ns = <6>;
 812                         status = "disabled";
 813                 };
 814
 815                 i2c2: i2c@e6510000 {
 816                         #address-cells = <1>;
 817                         #size-cells = <0>;
 818                         compatible = "renesas,i2c-r8a7795";
 819                         reg = <0 0xe6510000 0 0x40>;
 820                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 821                         clocks = <&cpg CPG_MOD 929>;
 822                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 823                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 824                         dma-names = "tx", "rx";
 825                         i2c-scl-internal-delay-ns = <6>;
 826                         status = "disabled";
 827                 };
 828
 829                 i2c3: i2c@e66d0000 {
 830                         #address-cells = <1>;
 831                         #size-cells = <0>;
 832                         compatible = "renesas,i2c-r8a7795";
 833                         reg = <0 0xe66d0000 0 0x40>;
 834                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 835                         clocks = <&cpg CPG_MOD 928>;
 836                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 837                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 838                         dma-names = "tx", "rx";
 839                         i2c-scl-internal-delay-ns = <110>;
 840                         status = "disabled";
 841                 };
 842
 843                 i2c4: i2c@e66d8000 {
 844                         #address-cells = <1>;
 845                         #size-cells = <0>;
 846                         compatible = "renesas,i2c-r8a7795";
 847                         reg = <0 0xe66d8000 0 0x40>;
 848                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 849                         clocks = <&cpg CPG_MOD 927>;
 850                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 851                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 852                         dma-names = "tx", "rx";
 853                         i2c-scl-internal-delay-ns = <110>;
 854                         status = "disabled";
 855                 };
 856
 857                 i2c5: i2c@e66e0000 {
 858                         #address-cells = <1>;
 859                         #size-cells = <0>;
 860                         compatible = "renesas,i2c-r8a7795";
 861                         reg = <0 0xe66e0000 0 0x40>;
 862                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 863                         clocks = <&cpg CPG_MOD 919>;
 864                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 865                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 866                         dma-names = "tx", "rx";
 867                         i2c-scl-internal-delay-ns = <110>;
 868                         status = "disabled";
 869                 };
 870
 871                 i2c6: i2c@e66e8000 {
 872                         #address-cells = <1>;
 873                         #size-cells = <0>;
 874                         compatible = "renesas,i2c-r8a7795";
 875                         reg = <0 0xe66e8000 0 0x40>;
 876                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 877                         clocks = <&cpg CPG_MOD 918>;
 878                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 879                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 880                         dma-names = "tx", "rx";
 881                         i2c-scl-internal-delay-ns = <6>;
 882                         status = "disabled";
 883                 };
 884
 885                 rcar_sound: sound@ec500000 {
 886                         /*
 887                          * #sound-dai-cells is required
 888                          *
 889                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 890                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 891                          */
 892                         /*
 893                          * #clock-cells is required for audio_clkout0/1/2/3
 894                          *
 895                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 896                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 897                          */
 898                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 899                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 900                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 901                                 <0 0xec540000 0 0x1000>, /* SSIU */
 902                                 <0 0xec541000 0 0x280>,  /* SSI */
 903                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 904                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 905
 906                         clocks = <&cpg CPG_MOD 1005>,
 907                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 908                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 909                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 910                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 911                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 912                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 913                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 914                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 915                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 916                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 917                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 918                                  <&audio_clk_a>, <&audio_clk_b>,
 919                                  <&audio_clk_c>,
 920                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 921                         clock-names = "ssi-all",
 922                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 923                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 924                                       "ssi.1", "ssi.0",
 925                                       "src.9", "src.8", "src.7", "src.6",
 926                                       "src.5", "src.4", "src.3", "src.2",
 927                                       "src.1", "src.0",
 928                                       "dvc.0", "dvc.1",
 929                                       "clk_a", "clk_b", "clk_c", "clk_i";
 930                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 931                         status = "disabled";
 932
 933                         rcar_sound,dvc {
 934                                 dvc0: dvc-0 {
 935                                         dmas = <&audma0 0xbc>;
 936                                         dma-names = "tx";
 937                                 };
 938                                 dvc1: dvc-1 {
 939                                         dmas = <&audma0 0xbe>;
 940                                         dma-names = "tx";
 941                                 };
 942                         };
 943
 944                         rcar_sound,src {
 945                                 src0: src-0 {
 946                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 947                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 948                                         dma-names = "rx", "tx";
 949                                 };
 950                                 src1: src-1 {
 951                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 952                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 953                                         dma-names = "rx", "tx";
 954                                 };
 955                                 src2: src-2 {
 956                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 957                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 958                                         dma-names = "rx", "tx";
 959                                 };
 960                                 src3: src-3 {
 961                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 962                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 963                                         dma-names = "rx", "tx";
 964                                 };
 965                                 src4: src-4 {
 966                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 967                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 968                                         dma-names = "rx", "tx";
 969                                 };
 970                                 src5: src-5 {
 971                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 972                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 973                                         dma-names = "rx", "tx";
 974                                 };
 975                                 src6: src-6 {
 976                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 977                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 978                                         dma-names = "rx", "tx";
 979                                 };
 980                                 src7: src-7 {
 981                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 982                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 983                                         dma-names = "rx", "tx";
 984                                 };
 985                                 src8: src-8 {
 986                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 987                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 988                                         dma-names = "rx", "tx";
 989                                 };
 990                                 src9: src-9 {
 991                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 992                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 993                                         dma-names = "rx", "tx";
 994                                 };
 995                         };
 996
 997                         rcar_sound,ssi {
 998                                 ssi0: ssi-0 {
 999                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1000                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1001                                         dma-names = "rx", "tx", "rxu", "txu";
1002                                 };
1003                                 ssi1: ssi-1 {
1004                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1005                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1006                                         dma-names = "rx", "tx", "rxu", "txu";
1007                                 };
1008                                 ssi2: ssi-2 {
1009                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1010                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1011                                         dma-names = "rx", "tx", "rxu", "txu";
1012                                 };
1013                                 ssi3: ssi-3 {
1014                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1015                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1016                                         dma-names = "rx", "tx", "rxu", "txu";
1017                                 };
1018                                 ssi4: ssi-4 {
1019                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1020                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1021                                         dma-names = "rx", "tx", "rxu", "txu";
1022                                 };
1023                                 ssi5: ssi-5 {
1024                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1025                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1026                                         dma-names = "rx", "tx", "rxu", "txu";
1027                                 };
1028                                 ssi6: ssi-6 {
1029                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1030                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1031                                         dma-names = "rx", "tx", "rxu", "txu";
1032                                 };
1033                                 ssi7: ssi-7 {
1034                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1035                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1036                                         dma-names = "rx", "tx", "rxu", "txu";
1037                                 };
1038                                 ssi8: ssi-8 {
1039                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1040                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1041                                         dma-names = "rx", "tx", "rxu", "txu";
1042                                 };
1043                                 ssi9: ssi-9 {
1044                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1045                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1046                                         dma-names = "rx", "tx", "rxu", "txu";
1047                                 };
1048                         };
1049                 };
1050
1051                 sata: sata@ee300000 {
1052                         compatible = "renesas,sata-r8a7795";
1053                         reg = <0 0xee300000 0 0x1fff>;
1054                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1055                         clocks = <&cpg CPG_MOD 815>;
1056                         status = "disabled";
1057                 };
1058
1059                 xhci0: usb@ee000000 {
1060                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1061                         reg = <0 0xee000000 0 0xc00>;
1062                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1063                         clocks = <&cpg CPG_MOD 328>;
1064                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1065                         status = "disabled";
1066                 };
1067
1068                 xhci1: usb@ee0400000 {
1069                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1070                         reg = <0 0xee040000 0 0xc00>;
1071                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1072                         clocks = <&cpg CPG_MOD 327>;
1073                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1074                         status = "disabled";
1075                 };
1076
1077                 usb_dmac0: dma-controller@e65a0000 {
1078                         compatible = "renesas,r8a7795-usb-dmac",
1079                                      "renesas,usb-dmac";
1080                         reg = <0 0xe65a0000 0 0x100>;
1081                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1082                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1083                         interrupt-names = "ch0", "ch1";
1084                         clocks = <&cpg CPG_MOD 330>;
1085                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1086                         #dma-cells = <1>;
1087                         dma-channels = <2>;
1088                 };
1089
1090                 usb_dmac1: dma-controller@e65b0000 {
1091                         compatible = "renesas,r8a7795-usb-dmac",
1092                                      "renesas,usb-dmac";
1093                         reg = <0 0xe65b0000 0 0x100>;
1094                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1095                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1096                         interrupt-names = "ch0", "ch1";
1097                         clocks = <&cpg CPG_MOD 331>;
1098                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1099                         #dma-cells = <1>;
1100                         dma-channels = <2>;
1101                 };
1102
1103                 sdhi0: sd@ee100000 {
1104                         compatible = "renesas,sdhi-r8a7795";
1105                         reg = <0 0xee100000 0 0x2000>;
1106                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1107                         clocks = <&cpg CPG_MOD 314>;
1108                         max-frequency = <200000000>;
1109                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1110                         status = "disabled";
1111                 };
1112
1113                 sdhi1: sd@ee120000 {
1114                         compatible = "renesas,sdhi-r8a7795";
1115                         reg = <0 0xee120000 0 0x2000>;
1116                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1117                         clocks = <&cpg CPG_MOD 313>;
1118                         max-frequency = <200000000>;
1119                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1120                         status = "disabled";
1121                 };
1122
1123                 sdhi2: sd@ee140000 {
1124                         compatible = "renesas,sdhi-r8a7795";
1125                         reg = <0 0xee140000 0 0x2000>;
1126                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1127                         clocks = <&cpg CPG_MOD 312>;
1128                         max-frequency = <200000000>;
1129                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1130                         status = "disabled";
1131                 };
1132
1133                 sdhi3: sd@ee160000 {
1134                         compatible = "renesas,sdhi-r8a7795";
1135                         reg = <0 0xee160000 0 0x2000>;
1136                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1137                         clocks = <&cpg CPG_MOD 311>;
1138                         max-frequency = <200000000>;
1139                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1140                         status = "disabled";
1141                 };
1142
1143                 usb2_phy0: usb-phy@ee080200 {
1144                         compatible = "renesas,usb2-phy-r8a7795";
1145                         reg = <0 0xee080200 0 0x700>;
1146                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1147                         clocks = <&cpg CPG_MOD 703>;
1148                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1149                         #phy-cells = <0>;
1150                         status = "disabled";
1151                 };
1152
1153                 usb2_phy1: usb-phy@ee0a0200 {
1154                         compatible = "renesas,usb2-phy-r8a7795";
1155                         reg = <0 0xee0a0200 0 0x700>;
1156                         clocks = <&cpg CPG_MOD 702>;
1157                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1158                         #phy-cells = <0>;
1159                         status = "disabled";
1160                 };
1161
1162                 usb2_phy2: usb-phy@ee0c0200 {
1163                         compatible = "renesas,usb2-phy-r8a7795";
1164                         reg = <0 0xee0c0200 0 0x700>;
1165                         clocks = <&cpg CPG_MOD 701>;
1166                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1167                         #phy-cells = <0>;
1168                         status = "disabled";
1169                 };
1170
1171                 ehci0: usb@ee080100 {
1172                         compatible = "generic-ehci";
1173                         reg = <0 0xee080100 0 0x100>;
1174                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1175                         clocks = <&cpg CPG_MOD 703>;
1176                         phys = <&usb2_phy0>;
1177                         phy-names = "usb";
1178                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1179                         status = "disabled";
1180                 };
1181
1182                 ehci1: usb@ee0a0100 {
1183                         compatible = "generic-ehci";
1184                         reg = <0 0xee0a0100 0 0x100>;
1185                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1186                         clocks = <&cpg CPG_MOD 702>;
1187                         phys = <&usb2_phy1>;
1188                         phy-names = "usb";
1189                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1190                         status = "disabled";
1191                 };
1192
1193                 ehci2: usb@ee0c0100 {
1194                         compatible = "generic-ehci";
1195                         reg = <0 0xee0c0100 0 0x100>;
1196                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1197                         clocks = <&cpg CPG_MOD 701>;
1198                         phys = <&usb2_phy2>;
1199                         phy-names = "usb";
1200                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1201                         status = "disabled";
1202                 };
1203
1204                 ohci0: usb@ee080000 {
1205                         compatible = "generic-ohci";
1206                         reg = <0 0xee080000 0 0x100>;
1207                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1208                         clocks = <&cpg CPG_MOD 703>;
1209                         phys = <&usb2_phy0>;
1210                         phy-names = "usb";
1211                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1212                         status = "disabled";
1213                 };
1214
1215                 ohci1: usb@ee0a0000 {
1216                         compatible = "generic-ohci";
1217                         reg = <0 0xee0a0000 0 0x100>;
1218                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1219                         clocks = <&cpg CPG_MOD 702>;
1220                         phys = <&usb2_phy1>;
1221                         phy-names = "usb";
1222                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1223                         status = "disabled";
1224                 };
1225
1226                 ohci2: usb@ee0c0000 {
1227                         compatible = "generic-ohci";
1228                         reg = <0 0xee0c0000 0 0x100>;
1229                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1230                         clocks = <&cpg CPG_MOD 701>;
1231                         phys = <&usb2_phy2>;
1232                         phy-names = "usb";
1233                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1234                         status = "disabled";
1235                 };
1236
1237                 hsusb: usb@e6590000 {
1238                         compatible = "renesas,usbhs-r8a7795",
1239                                      "renesas,rcar-gen3-usbhs";
1240                         reg = <0 0xe6590000 0 0x100>;
1241                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1242                         clocks = <&cpg CPG_MOD 704>;
1243                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1244                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1245                         dma-names = "ch0", "ch1", "ch2", "ch3";
1246                         renesas,buswait = <11>;
1247                         phys = <&usb2_phy0>;
1248                         phy-names = "usb";
1249                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1250                         status = "disabled";
1251                 };
1252
1253                 pciec0: pcie@fe000000 {
1254                         compatible = "renesas,pcie-r8a7795";
1255                         reg = <0 0xfe000000 0 0x80000>;
1256                         #address-cells = <3>;
1257                         #size-cells = <2>;
1258                         bus-range = <0x00 0xff>;
1259                         device_type = "pci";
1260                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1261                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1262                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1263                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1264                         /* Map all possible DDR as inbound ranges */
1265                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1266                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1267                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1268                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1269                         #interrupt-cells = <1>;
1270                         interrupt-map-mask = <0 0 0 0>;
1271                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1272                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1273                         clock-names = "pcie", "pcie_bus";
1274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1275                         status = "disabled";
1276                 };
1277
1278                 pciec1: pcie@ee800000 {
1279                         compatible = "renesas,pcie-r8a7795";
1280                         reg = <0 0xee800000 0 0x80000>;
1281                         #address-cells = <3>;
1282                         #size-cells = <2>;
1283                         bus-range = <0x00 0xff>;
1284                         device_type = "pci";
1285                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1286                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1287                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1288                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1289                         /* Map all possible DDR as inbound ranges */
1290                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1291                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1292                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1293                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1294                         #interrupt-cells = <1>;
1295                         interrupt-map-mask = <0 0 0 0>;
1296                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1297                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1298                         clock-names = "pcie", "pcie_bus";
1299                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1300                         status = "disabled";
1301                 };
1302
1303                 vspbc: vsp@fe920000 {
1304                         compatible = "renesas,vsp2";
1305                         reg = <0 0xfe920000 0 0x8000>;
1306                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1307                         clocks = <&cpg CPG_MOD 624>;
1308                         power-domains = <&sysc R8A7795_PD_A3VP>;
1309
1310                         renesas,fcp = <&fcpvb1>;
1311                 };
1312
1313                 fcpvb1: fcp@fe92f000 {
1314                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1315                         reg = <0 0xfe92f000 0 0x200>;
1316                         clocks = <&cpg CPG_MOD 606>;
1317                         power-domains = <&sysc R8A7795_PD_A3VP>;
1318                 };
1319
1320                 fcpf0: fcp@fe950000 {
1321                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1322                         reg = <0 0xfe950000 0 0x200>;
1323                         clocks = <&cpg CPG_MOD 615>;
1324                         power-domains = <&sysc R8A7795_PD_A3VP>;
1325                 };
1326
1327                 fcpf1: fcp@fe951000 {
1328                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1329                         reg = <0 0xfe951000 0 0x200>;
1330                         clocks = <&cpg CPG_MOD 614>;
1331                         power-domains = <&sysc R8A7795_PD_A3VP>;
1332                 };
1333
1334                 fcpf2: fcp@fe952000 {
1335                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1336                         reg = <0 0xfe952000 0 0x200>;
1337                         clocks = <&cpg CPG_MOD 613>;
1338                         power-domains = <&sysc R8A7795_PD_A3VP>;
1339                 };
1340
1341                 vspbd: vsp@fe960000 {
1342                         compatible = "renesas,vsp2";
1343                         reg = <0 0xfe960000 0 0x8000>;
1344                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1345                         clocks = <&cpg CPG_MOD 626>;
1346                         power-domains = <&sysc R8A7795_PD_A3VP>;
1347
1348                         renesas,fcp = <&fcpvb0>;
1349                 };
1350
1351                 fcpvb0: fcp@fe96f000 {
1352                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1353                         reg = <0 0xfe96f000 0 0x200>;
1354                         clocks = <&cpg CPG_MOD 607>;
1355                         power-domains = <&sysc R8A7795_PD_A3VP>;
1356                 };
1357
1358                 vspi0: vsp@fe9a0000 {
1359                         compatible = "renesas,vsp2";
1360                         reg = <0 0xfe9a0000 0 0x8000>;
1361                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1362                         clocks = <&cpg CPG_MOD 631>;
1363                         power-domains = <&sysc R8A7795_PD_A3VP>;
1364
1365                         renesas,fcp = <&fcpvi0>;
1366                 };
1367
1368                 fcpvi0: fcp@fe9af000 {
1369                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1370                         reg = <0 0xfe9af000 0 0x200>;
1371                         clocks = <&cpg CPG_MOD 611>;
1372                         power-domains = <&sysc R8A7795_PD_A3VP>;
1373                 };
1374
1375                 vspi1: vsp@fe9b0000 {
1376                         compatible = "renesas,vsp2";
1377                         reg = <0 0xfe9b0000 0 0x8000>;
1378                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1379                         clocks = <&cpg CPG_MOD 630>;
1380                         power-domains = <&sysc R8A7795_PD_A3VP>;
1381
1382                         renesas,fcp = <&fcpvi1>;
1383                 };
1384
1385                 fcpvi1: fcp@fe9bf000 {
1386                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1387                         reg = <0 0xfe9bf000 0 0x200>;
1388                         clocks = <&cpg CPG_MOD 610>;
1389                         power-domains = <&sysc R8A7795_PD_A3VP>;
1390                 };
1391
1392                 vspi2: vsp@fe9c0000 {
1393                         compatible = "renesas,vsp2";
1394                         reg = <0 0xfe9c0000 0 0x8000>;
1395                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1396                         clocks = <&cpg CPG_MOD 629>;
1397                         power-domains = <&sysc R8A7795_PD_A3VP>;
1398
1399                         renesas,fcp = <&fcpvi2>;
1400                 };
1401
1402                 fcpvi2: fcp@fe9cf000 {
1403                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1404                         reg = <0 0xfe9cf000 0 0x200>;
1405                         clocks = <&cpg CPG_MOD 609>;
1406                         power-domains = <&sysc R8A7795_PD_A3VP>;
1407                 };
1408
1409                 vspd0: vsp@fea20000 {
1410                         compatible = "renesas,vsp2";
1411                         reg = <0 0xfea20000 0 0x4000>;
1412                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1413                         clocks = <&cpg CPG_MOD 623>;
1414                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1415
1416                         renesas,fcp = <&fcpvd0>;
1417                 };
1418
1419                 fcpvd0: fcp@fea27000 {
1420                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1421                         reg = <0 0xfea27000 0 0x200>;
1422                         clocks = <&cpg CPG_MOD 603>;
1423                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1424                 };
1425
1426                 vspd1: vsp@fea28000 {
1427                         compatible = "renesas,vsp2";
1428                         reg = <0 0xfea28000 0 0x4000>;
1429                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1430                         clocks = <&cpg CPG_MOD 622>;
1431                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1432
1433                         renesas,fcp = <&fcpvd1>;
1434                 };
1435
1436                 fcpvd1: fcp@fea2f000 {
1437                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1438                         reg = <0 0xfea2f000 0 0x200>;
1439                         clocks = <&cpg CPG_MOD 602>;
1440                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1441                 };
1442
1443                 vspd2: vsp@fea30000 {
1444                         compatible = "renesas,vsp2";
1445                         reg = <0 0xfea30000 0 0x4000>;
1446                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1447                         clocks = <&cpg CPG_MOD 621>;
1448                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449
1450                         renesas,fcp = <&fcpvd2>;
1451                 };
1452
1453                 fcpvd2: fcp@fea37000 {
1454                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1455                         reg = <0 0xfea37000 0 0x200>;
1456                         clocks = <&cpg CPG_MOD 601>;
1457                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1458                 };
1459
1460                 vspd3: vsp@fea38000 {
1461                         compatible = "renesas,vsp2";
1462                         reg = <0 0xfea38000 0 0x4000>;
1463                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1464                         clocks = <&cpg CPG_MOD 620>;
1465                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1466
1467                         renesas,fcp = <&fcpvd3>;
1468                 };
1469
1470                 fcpvd3: fcp@fea3f000 {
1471                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1472                         reg = <0 0xfea3f000 0 0x200>;
1473                         clocks = <&cpg CPG_MOD 600>;
1474                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1475                 };
1476
1477                 fdp1@fe940000 {
1478                         compatible = "renesas,fdp1";
1479                         reg = <0 0xfe940000 0 0x2400>;
1480                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1481                         clocks = <&cpg CPG_MOD 119>;
1482                         power-domains = <&sysc R8A7795_PD_A3VP>;
1483                         renesas,fcp = <&fcpf0>;
1484                 };
1485
1486                 fdp1@fe944000 {
1487                         compatible = "renesas,fdp1";
1488                         reg = <0 0xfe944000 0 0x2400>;
1489                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1490                         clocks = <&cpg CPG_MOD 118>;
1491                         power-domains = <&sysc R8A7795_PD_A3VP>;
1492                         renesas,fcp = <&fcpf1>;
1493                 };
1494
1495                 fdp1@fe948000 {
1496                         compatible = "renesas,fdp1";
1497                         reg = <0 0xfe948000 0 0x2400>;
1498                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1499                         clocks = <&cpg CPG_MOD 117>;
1500                         power-domains = <&sysc R8A7795_PD_A3VP>;
1501                         renesas,fcp = <&fcpf2>;
1502                 };
1503
1504                 du: display@feb00000 {
1505                         compatible = "renesas,du-r8a7795";
1506                         reg = <0 0xfeb00000 0 0x80000>,
1507                               <0 0xfeb90000 0 0x14>;
1508                         reg-names = "du", "lvds.0";
1509                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1510                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1511                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1512                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1513                         clocks = <&cpg CPG_MOD 724>,
1514                                  <&cpg CPG_MOD 723>,
1515                                  <&cpg CPG_MOD 722>,
1516                                  <&cpg CPG_MOD 721>,
1517                                  <&cpg CPG_MOD 727>;
1518                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1519                         status = "disabled";
1520
1521                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1522
1523                         ports {
1524                                 #address-cells = <1>;
1525                                 #size-cells = <0>;
1526
1527                                 port@0 {
1528                                         reg = <0>;
1529                                         du_out_rgb: endpoint {
1530                                         };
1531                                 };
1532                                 port@1 {
1533                                         reg = <1>;
1534                                         du_out_hdmi0: endpoint {
1535                                         };
1536                                 };
1537                                 port@2 {
1538                                         reg = <2>;
1539                                         du_out_hdmi1: endpoint {
1540                                         };
1541                                 };
1542                                 port@3 {
1543                                         reg = <3>;
1544                                         du_out_lvds0: endpoint {
1545                                         };
1546                                 };
1547                         };
1548                 };
1549         };
1550 };